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authoranish <none@none>2007-01-17 21:24:57 -0800
committeranish <none@none>2007-01-17 21:24:57 -0800
commit2f15eac90d333799a61f99c8b0f11a8524a716b9 (patch)
tree05f6b784e75439f77ad144cdf232137b7a629885 /usr/src
parentd8c870b0de5416eb7c3dbc6e97d93a26a5a5f299 (diff)
downloadillumos-joyent-2f15eac90d333799a61f99c8b0f11a8524a716b9.tar.gz
6452694 x64: npe_fix_aer_ptr() cleanup
6507882 Incorrect subsystem vendor ID for some devices
Diffstat (limited to 'usr/src')
-rw-r--r--usr/src/uts/i86pc/io/pciex/npe_misc.c22
-rw-r--r--usr/src/uts/i86pc/io/pciex/pcie_error.c32
-rw-r--r--usr/src/uts/i86pc/io/pciex/pcie_nvidia.h3
3 files changed, 42 insertions, 15 deletions
diff --git a/usr/src/uts/i86pc/io/pciex/npe_misc.c b/usr/src/uts/i86pc/io/pciex/npe_misc.c
index 8ec68b3ea3..892bfbb09e 100644
--- a/usr/src/uts/i86pc/io/pciex/npe_misc.c
+++ b/usr/src/uts/i86pc/io/pciex/npe_misc.c
@@ -20,7 +20,7 @@
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -105,15 +105,17 @@ npe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl)
{
ushort_t cya1;
- if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) != NVIDIA_VENDOR_ID) &&
- (pci_config_get16(cfg_hdl, PCI_CONF_DEVID) !=
- NVIDIA_CK804_DEVICE_ID))
- return;
-
- cya1 = pci_config_get16(cfg_hdl, NVIDIA_CK804_VEND_CYA1_OFF);
- if (!(cya1 & ~NVIDIA_CK804_VEND_CYA1_ERPT_MASK))
- (void) pci_config_put16(cfg_hdl, NVIDIA_CK804_VEND_CYA1_OFF,
- cya1 | NVIDIA_CK804_VEND_CYA1_ERPT_VAL);
+ if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) == NVIDIA_VENDOR_ID) &&
+ (pci_config_get16(cfg_hdl, PCI_CONF_DEVID) ==
+ NVIDIA_CK804_DEVICE_ID) &&
+ (pci_config_get8(cfg_hdl, PCI_CONF_REVID) >=
+ NVIDIA_CK804_AER_VALID_REVID)) {
+ cya1 = pci_config_get16(cfg_hdl, NVIDIA_CK804_VEND_CYA1_OFF);
+ if (!(cya1 & ~NVIDIA_CK804_VEND_CYA1_ERPT_MASK))
+ (void) pci_config_put16(cfg_hdl,
+ NVIDIA_CK804_VEND_CYA1_OFF,
+ cya1 | NVIDIA_CK804_VEND_CYA1_ERPT_VAL);
+ }
}
diff --git a/usr/src/uts/i86pc/io/pciex/pcie_error.c b/usr/src/uts/i86pc/io/pciex/pcie_error.c
index 8f7b04c0de..e688c7885c 100644
--- a/usr/src/uts/i86pc/io/pciex/pcie_error.c
+++ b/usr/src/uts/i86pc/io/pciex/pcie_error.c
@@ -195,6 +195,7 @@ pcie_error_enable(dev_info_t *cdip, ddi_acc_handle_t cfg_hdl)
uint16_t aer_ptr = 0;
uint16_t device_ctl;
uint16_t dev_type = 0;
+ uint16_t vendor_id, device_id;
uint32_t aer_reg;
uint32_t uce_mask = pcie_aer_uce_mask;
boolean_t empty_io_range = B_FALSE;
@@ -305,14 +306,25 @@ pcie_error_enable(dev_info_t *cdip, ddi_acc_handle_t cfg_hdl)
device_ctl &= ~PCIE_DEVCTL_UR_REPORTING_EN;
/*
+ * Disable AER for CK8-04 devices with revid < 0xA3
+ */
+ vendor_id = pci_config_get16(cfg_hdl, PCI_CONF_VENID);
+ device_id = pci_config_get16(cfg_hdl, PCI_CONF_DEVID);
+ if ((vendor_id == NVIDIA_VENDOR_ID) &&
+ (device_id == NVIDIA_CK804_DEVICE_ID) &&
+ (pci_config_get8(cfg_hdl, PCI_CONF_REVID) <
+ NVIDIA_CK804_AER_VALID_REVID)) {
+ aer_ptr = PCIE_EXT_CAP_NEXT_PTR_NULL;
+ }
+
+ /*
* For Nvidia chipset, call pcie_nvidia_error_init().
*
* For non-Nvidia Root Ports, disable UR for all child devices by
* changing the default ue mask (for AER devices) and the default
* device control value (for non-AER device).
*/
- if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) == NVIDIA_VENDOR_ID) &&
- NVIDIA_PCIE_RC_DEV_ID(pci_config_get16(cfg_hdl, PCI_CONF_DEVID)))
+ if ((vendor_id == NVIDIA_VENDOR_ID) && NVIDIA_PCIE_RC_DEV_ID(device_id))
pcie_nvidia_error_init(cdip, cfg_hdl, cap_ptr, aer_ptr);
else if (dev_type == PCIE_PCIECAP_DEV_TYPE_ROOT) {
pcie_expected_ue_mask |= PCIE_AER_UCE_UR;
@@ -470,6 +482,7 @@ pcie_error_disable(dev_info_t *cdip, ddi_acc_handle_t cfg_hdl)
uint8_t header_type;
uint8_t bcr;
uint16_t command_reg, status_reg;
+ uint16_t vendor_id, device_id;
if (pcie_error_disable_flag)
return;
@@ -514,10 +527,21 @@ pcie_error_disable(dev_info_t *cdip, ddi_acc_handle_t cfg_hdl)
"pcie-aer-pointer", PCIE_EXT_CAP_NEXT_PTR_NULL);
/*
+ * Disable AER for CK8-04 devices with revid < 0xA3
+ */
+ vendor_id = pci_config_get16(cfg_hdl, PCI_CONF_VENID);
+ device_id = pci_config_get16(cfg_hdl, PCI_CONF_DEVID);
+ if ((vendor_id == NVIDIA_VENDOR_ID) &&
+ (device_id == NVIDIA_CK804_DEVICE_ID) &&
+ (pci_config_get8(cfg_hdl, PCI_CONF_REVID) <
+ NVIDIA_CK804_AER_VALID_REVID)) {
+ aer_ptr = PCIE_EXT_CAP_NEXT_PTR_NULL;
+ }
+
+ /*
* Only disable these set of errors for CK8-04/IO-4 devices
*/
- if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) == NVIDIA_VENDOR_ID) &&
- NVIDIA_PCIE_RC_DEV_ID(pci_config_get16(cfg_hdl, PCI_CONF_DEVID)))
+ if ((vendor_id == NVIDIA_VENDOR_ID) && NVIDIA_PCIE_RC_DEV_ID(device_id))
pcie_nvidia_error_fini(cfg_hdl, cap_ptr, aer_ptr);
if (aer_ptr == PCIE_EXT_CAP_NEXT_PTR_NULL)
diff --git a/usr/src/uts/i86pc/io/pciex/pcie_nvidia.h b/usr/src/uts/i86pc/io/pciex/pcie_nvidia.h
index 8dbfa74e0a..b3550a878f 100644
--- a/usr/src/uts/i86pc/io/pciex/pcie_nvidia.h
+++ b/usr/src/uts/i86pc/io/pciex/pcie_nvidia.h
@@ -20,7 +20,7 @@
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -52,6 +52,7 @@ void add_nvidia_isa_bridge_props(dev_info_t *, uchar_t, uchar_t,
#define NVIDIA_CK804_DEFAULT_ISA_BRIDGE_DEVID 0x50 /* LPC Default Bridge */
#define NVIDIA_CK804_PRO_ISA_BRIDGE_DEVID 0x51 /* LPC Bridge */
#define NVIDIA_CK804_SLAVE_ISA_BRIDGE_DEVID 0xd3 /* Slave LPC Bridge */
+#define NVIDIA_CK804_AER_VALID_REVID 0xa3 /* RID w/ AER enabled */
#define NVIDIA_CK804_LPC2PCI_DEVICE_ID(did) \
(((did) == NVIDIA_CK804_DEFAULT_ISA_BRIDGE_DEVID) || \