14820 Want SMBIOS 3.6 Support

14872 smbios_info_processor forgot ext clock speed
Reviewed by: Garrett D'Amore <garrett@damore.org>
Reviewed by: Toomas Soome <tsoome@me.com>
Approved by: Rich Lowe <richlowe@richlowe.net>

9 files changed, 521 insertions, 9 deletions

diff --git a/usr/src/cmd/smbios/smbios.c b/usr/src/cmd/smbios/smbios.c
index c0adfb6ae4..b93e647e25 100644
--- a/usr/src/cmd/smbios/smbios.c
+++ b/usr/src/cmd/smbios/smbios.c
@@ -22,7 +22,7 @@
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
  * Copyright (c) 2017, Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -644,6 +644,12 @@ print_processor(smbios_hdl_t *shp, id_t id, FILE *fp)
 	id_printf(fp, "  L1 Cache Handle: ", p.smbp_l1cache);
 	id_printf(fp, "  L2 Cache Handle: ", p.smbp_l2cache);
 	id_printf(fp, "  L3 Cache Handle: ", p.smbp_l3cache);
+
+	if (p.smbp_threadsenabled != 0) {
+		oprintf(fp, "  Threads Enabled: %u\n", p.smbp_threadsenabled);
+	} else {
+		oprintf(fp, "  Threads Enabled: Unknown\n");
+	}
 }
 
 static void
diff --git a/usr/src/common/smbios/smb_info.c b/usr/src/common/smbios/smb_info.c
index 09d7d5374a..9ced5687b2 100644
--- a/usr/src/common/smbios/smb_info.c
+++ b/usr/src/common/smbios/smb_info.c
@@ -22,7 +22,7 @@
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
  * Copyright 2019 Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -696,6 +696,7 @@ smbios_info_processor(smbios_hdl_t *shp, id_t id, smbios_processor_t *pp)
 	pp->smbp_type = p.smbpr_type;
 	pp->smbp_family = p.smbpr_family;
 	pp->smbp_voltage = p.smbpr_voltage;
+	pp->smbp_clkspeed = p.smbpr_clkspeed;
 	pp->smbp_maxspeed = p.smbpr_maxspeed;
 	pp->smbp_curspeed = p.smbpr_curspeed;
 	pp->smbp_status = p.smbpr_status;
@@ -729,6 +730,10 @@ smbios_info_processor(smbios_hdl_t *shp, id_t id, smbios_processor_t *pp)
 		}
 	}
 
+	if (smb_libgteq(shp, SMB_VERSION_36)) {
+		pp->smbp_threadsenabled = p.smpbr_threaden;
+	}
+
 	return (0);
 }
 
diff --git a/usr/src/common/smbios/smb_open.c b/usr/src/common/smbios/smb_open.c
index 454fb61b8b..0ecd0fac0e 100644
--- a/usr/src/common/smbios/smb_open.c
+++ b/usr/src/common/smbios/smb_open.c
@@ -22,7 +22,7 @@
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
  * Copyright 2018 Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -234,6 +234,7 @@ smbios_bufopen(const smbios_entry_t *ep, const void *buf, size_t len,
 	case SMB_VERSION_33:
 	case SMB_VERSION_34:
 	case SMB_VERSION_35:
+	case SMB_VERSION_36:
 		break;
 	default:
 		return (smb_open_error(shp, errp, ESMB_VERSION));
diff --git a/usr/src/test/util-tests/tests/smbios/Makefile b/usr/src/test/util-tests/tests/smbios/Makefile
index 819ebe5be6..593a2dc1c4 100644
--- a/usr/src/test/util-tests/tests/smbios/Makefile
+++ b/usr/src/test/util-tests/tests/smbios/Makefile
@@ -11,7 +11,7 @@
 
 #
 # Copyright (c) 2018, Joyent, Inc.
-# Copyright 2021 Oxide Computer Company
+# Copyright 2022 Oxide Computer Company
 #
 
 include $(SRC)/Makefile.master
@@ -24,6 +24,7 @@ OBJS =	smbios.o \
 	smbios_test_errors.o \
 	smbios_test_fwinfo.o \
 	smbios_test_memdevice.o \
+	smbios_test_proc.o \
 	smbios_test_pinfo.o \
 	smbios_test_slot.o \
 	smbios_test_strings.o \
diff --git a/usr/src/test/util-tests/tests/smbios/smbios.c b/usr/src/test/util-tests/tests/smbios/smbios.c
index 73958dda71..a0a9c4fded 100644
--- a/usr/src/test/util-tests/tests/smbios/smbios.c
+++ b/usr/src/test/util-tests/tests/smbios/smbios.c
@@ -11,7 +11,7 @@
 
 /*
  * Copyright (c) 2018, Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  */
 
 /*
@@ -520,6 +520,30 @@ static const smbios_test_t smbios_tests[] = {
 	    .st_canopen = B_TRUE,
 	    .st_verify = smbios_test_chassis_verify_sku_nocomps,
 	    .st_desc = "chassis - sku + comps"
+	}, {
+	    .st_entry = SMBIOS_ENTRY_POINT_30,
+	    .st_tvers = SMB_VERSION_25,
+	    .st_libvers = SMB_VERSION,
+	    .st_mktable = smbios_test_proc_mktable_25,
+	    .st_canopen = B_TRUE,
+	    .st_verify = smbios_test_proc_verify_25,
+	    .st_desc = "SMBIOS 2.5 processor"
+	}, {
+	    .st_entry = SMBIOS_ENTRY_POINT_30,
+	    .st_tvers = SMB_VERSION_36,
+	    .st_libvers = SMB_VERSION,
+	    .st_mktable = smbios_test_proc_mktable_36,
+	    .st_canopen = B_TRUE,
+	    .st_verify = smbios_test_proc_verify_36,
+	    .st_desc = "SMBIOS 3.6 processor"
+	}, {
+	    .st_entry = SMBIOS_ENTRY_POINT_30,
+	    .st_tvers = SMB_VERSION_36,
+	    .st_libvers = SMB_VERSION_25,
+	    .st_mktable = smbios_test_proc_mktable_36,
+	    .st_canopen = B_TRUE,
+	    .st_verify = smbios_test_proc_verify_36_25,
+	    .st_desc = "SMBIOS 3.6 processor, 2.5 client"
 	}
 };
 
diff --git a/usr/src/test/util-tests/tests/smbios/smbios_test.h b/usr/src/test/util-tests/tests/smbios/smbios_test.h
index 341eb47255..6c7c0eb941 100644
--- a/usr/src/test/util-tests/tests/smbios/smbios_test.h
+++ b/usr/src/test/util-tests/tests/smbios/smbios_test.h
@@ -11,7 +11,7 @@
 
 /*
  * Copyright 2019 Robert Mustacchi
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  */
 
 #ifndef _SMBIOS_TEST_H
@@ -147,6 +147,13 @@ extern boolean_t smbios_test_chassis_verify_comps(smbios_hdl_t *);
 extern boolean_t smbios_test_chassis_verify_sku_nocomps(smbios_hdl_t *);
 extern boolean_t smbios_test_chassis_verify_sku(smbios_hdl_t *);
 
+
+extern boolean_t smbios_test_proc_mktable_25(smbios_test_table_t *);
+extern boolean_t smbios_test_proc_mktable_36(smbios_test_table_t *);
+extern boolean_t smbios_test_proc_verify_25(smbios_hdl_t *);
+extern boolean_t smbios_test_proc_verify_36(smbios_hdl_t *);
+extern boolean_t smbios_test_proc_verify_36_25(smbios_hdl_t *);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/usr/src/test/util-tests/tests/smbios/smbios_test_proc.c b/usr/src/test/util-tests/tests/smbios/smbios_test_proc.c
new file mode 100644
index 0000000000..e03b8c00b4
--- /dev/null
+++ b/usr/src/test/util-tests/tests/smbios/smbios_test_proc.c
@@ -0,0 +1,434 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright 2022 Oxide Computer Company
+ */
+
+/*
+ * SMBIOS processor tests. We build two main processors:
+ *
+ *   1. An early SMBIOS one based on 2.5 that has the initial core count and
+ *     related. A modern client should see the current values.
+ *   2. One based on SMBIOS 3.6 that has different values for the processor
+ *     counts to verify we use the newer fields both for cores counts and also
+ *     the processor family. Most of those were 3.x based. We use 3.6 so we can
+ *     get the newer threads enabled field. A pre-3.x client should not see the
+ *     same core values as something 3.0+.
+ */
+
+#include <stdlib.h>
+#include "smbios_test.h"
+
+/*
+ * Older revisions lengths per the SMBIOS spec.
+ */
+#define	SMBIOS_PROC_LEN_25	0x28
+
+static const char *smbios_proc_sock = "Gideon";
+static const char *smbios_proc_mfg = "Harrow";
+static const char *smbios_proc_vers = "Nona";
+static const char *smbios_proc_serial = "Alecto";
+static const char *smbios_proc_asset = "Matthias";
+static const char *smbios_proc_pn = "Ortus";
+static const uint64_t smbios_proc_cpuid = 0x09099090;
+
+/*
+ * Construct a processor that we'll use throughout our tests. This fills in most
+ * of the fields. Some bits may override it and others will only copy a smaller
+ * length.
+ */
+static void
+smbios_test_proc_fill(smb_processor_t *proc)
+{
+	proc->smbpr_hdr.smbh_type = SMB_TYPE_PROCESSOR;
+	proc->smbpr_hdr.smbh_len = sizeof (smb_processor_t);
+	proc->smbpr_socket = 1;
+	proc->smbpr_type = SMB_PRT_CENTRAL;
+	proc->smbpr_family = SMB_PRF_HOBBIT;
+	proc->smbpr_manufacturer = 2;
+	proc->smbpr_cpuid = htole64(smbios_proc_cpuid);
+	proc->smbpr_version = 3;
+	proc->smbpr_voltage = 0x8b;
+	proc->smbpr_clkspeed = htole16(0x1234);
+	proc->smbpr_maxspeed = htole16(0x5678);
+	proc->smbpr_curspeed = htole16(0x3210);
+	proc->smbpr_status = SMB_PRS_ENABLED | 0x40;
+	proc->smbpr_upgrade = SMB_PRU_SP3;
+	proc->smbpr_l1cache = htole16(0x11ca);
+	proc->smbpr_l2cache = htole16(0x12ca);
+	proc->smbpr_l3cache = htole16(0x13ca);
+	proc->smbpr_serial = 4;
+	proc->smbpr_asset = 5;
+	proc->smbpr_part = 6;
+	proc->smbpr_corecount = 0x77;
+	proc->smbpr_coresenabled = 0x3;
+	proc->smbpr_threadcount = 0x19;
+	proc->smbpr_cflags = htole16(SMB_PRC_64BIT | SMB_PRC_NX);
+	proc->smbpr_family2 = htole16(0);
+	proc->smbpr_corecount2 = htole16(0);
+	proc->smbpr_coresenabled2 = htole16(0);
+	proc->smbpr_threadcount2 = htole16(0);
+	proc->smpbr_threaden = htole16(11);
+
+}
+
+boolean_t
+smbios_test_proc_mktable_25(smbios_test_table_t *table)
+{
+	smb_processor_t proc;
+
+	smbios_test_proc_fill(&proc);
+	proc.smbpr_hdr.smbh_len = SMBIOS_PROC_LEN_25;
+	(void) smbios_test_table_append(table, &proc, SMBIOS_PROC_LEN_25);
+	smbios_test_table_append_string(table, smbios_proc_sock);
+	smbios_test_table_append_string(table, smbios_proc_mfg);
+	smbios_test_table_append_string(table, smbios_proc_vers);
+	smbios_test_table_append_string(table, smbios_proc_serial);
+	smbios_test_table_append_string(table, smbios_proc_asset);
+	smbios_test_table_append_string(table, smbios_proc_pn);
+	smbios_test_table_str_fini(table);
+	smbios_test_table_append_eot(table);
+
+	return (B_TRUE);
+}
+
+/*
+ * This is a 3.0 based table. The biggest difference here is that this table
+ * fills in the values that allows us to use family 2, core count 2, etc.
+ * fields.
+ */
+boolean_t
+smbios_test_proc_mktable_36(smbios_test_table_t *table)
+{
+	smb_processor_t proc;
+
+	smbios_test_proc_fill(&proc);
+	proc.smbpr_hdr.smbh_len = sizeof (smb_processor_t);
+	proc.smbpr_family = 0xfe;
+	proc.smbpr_family2 = htole16(SMB_PRF_RV64);
+	proc.smbpr_corecount = 0xff;
+	proc.smbpr_corecount2 = htole16(0x171);
+	proc.smbpr_coresenabled = 0xff;
+	proc.smbpr_coresenabled2 = htole16(0x717);
+	proc.smbpr_threadcount = 0xff;
+	proc.smbpr_threadcount2 = htole16(0x5445);
+	proc.smpbr_threaden = htole16(0x2232);
+	(void) smbios_test_table_append(table, &proc, sizeof (smb_processor_t));
+	smbios_test_table_append_string(table, smbios_proc_sock);
+	smbios_test_table_append_string(table, smbios_proc_mfg);
+	smbios_test_table_append_string(table, smbios_proc_vers);
+	smbios_test_table_append_string(table, smbios_proc_serial);
+	smbios_test_table_append_string(table, smbios_proc_asset);
+	smbios_test_table_append_string(table, smbios_proc_pn);
+	smbios_test_table_str_fini(table);
+	smbios_test_table_append_eot(table);
+
+	return (B_TRUE);
+}
+
+
+/*
+ * Verify common fields that'll be true across all tests. Verifying core,
+ * thread, and related is left to higher level logic as those are changed up
+ * between tests to cover the extensions.
+ */
+static boolean_t
+smbios_test_proc_verify_common(smbios_hdl_t *hdl, smbios_struct_t *sp,
+    smbios_processor_t *proc)
+{
+	boolean_t ret = B_TRUE;
+	smbios_info_t info;
+
+	if (proc->smbp_cpuid != smbios_proc_cpuid) {
+		warnx("processor state mismatch, found unexpected cpuid: 0x%x",
+		    proc->smbp_cpuid);
+		ret = B_FALSE;
+	}
+
+	if (SMB_PRV_LEGACY(proc->smbp_voltage)) {
+		warnx("processor state mismatch, found legacy foltage: 0x%x",
+		    proc->smbp_voltage);
+		ret = B_FALSE;
+	}
+
+	if (SMB_PRV_VOLTAGE(proc->smbp_voltage) != 0xb) {
+		warnx("processor state mismatch, found legacy foltage: 0x%x",
+		    SMB_PRV_VOLTAGE(proc->smbp_voltage));
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_status != (SMB_PRS_ENABLED | 0x40)) {
+		warnx("processor state mismatch, found unexpected processor "
+		    "status: 0x%x", proc->smbp_status);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_upgrade != SMB_PRU_SP3) {
+		warnx("processor state mismatch, found unexpected processor "
+		    "socket: 0x%x", proc->smbp_upgrade);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_clkspeed != 0x1234) {
+		warnx("processor state mismatch, found unexpected clock speed: "
+		    "0x%x", proc->smbp_clkspeed);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_maxspeed != 0x5678) {
+		warnx("processor state mismatch, found unexpected max speed: "
+		    "0x%x", proc->smbp_maxspeed);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_curspeed != 0x3210) {
+		warnx("processor state mismatch, found unexpected current "
+		    "speed: 0x%x", proc->smbp_curspeed);
+		ret = B_FALSE;
+	}
+
+
+	if (proc->smbp_l1cache != 0x11ca) {
+		warnx("processor state mismatch, found unexpected l1 cache id: "
+		    "0x%x", proc->smbp_l1cache);
+		ret = B_FALSE;
+	}
+
+
+	if (proc->smbp_l2cache != 0x12ca) {
+		warnx("processor state mismatch, found unexpected l2 cache id: "
+		    "0x%x", proc->smbp_l2cache);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_l3cache != 0x13ca) {
+		warnx("processor state mismatch, found unexpected l3 cache id: "
+		    "0x%x", proc->smbp_l3cache);
+		ret = B_FALSE;
+	}
+
+	if (proc->smbp_cflags != (SMB_PRC_64BIT | SMB_PRC_NX)) {
+		warnx("processor state mismatch, found unexpected "
+		    "characteristic flags: 0x%x", proc->smbp_cflags);
+		ret = B_FALSE;
+	}
+
+	if (smbios_info_common(hdl, sp->smbstr_id, &info) != 0) {
+		warnx("failed to get common chassis info: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (strcmp(info.smbi_manufacturer, smbios_proc_mfg) != 0) {
+		warnx("processor state mismatch, found unexpected mfg: %s",
+		    info.smbi_manufacturer);
+		ret = B_FALSE;
+	}
+
+
+	if (strcmp(info.smbi_version, smbios_proc_vers) != 0) {
+		warnx("processor state mismatch, found unexpected vers: %s",
+		    info.smbi_version);
+		ret = B_FALSE;
+	}
+
+	if (strcmp(info.smbi_serial, smbios_proc_serial) != 0) {
+		warnx("processor state mismatch, found unexpected serial: %s",
+		    info.smbi_serial);
+		ret = B_FALSE;
+	}
+
+	if (strcmp(info.smbi_asset, smbios_proc_asset) != 0) {
+		warnx("processor state mismatch, found unexpected asset: %s",
+		    info.smbi_asset);
+		ret = B_FALSE;
+	}
+
+	if (strcmp(info.smbi_location, smbios_proc_sock) != 0) {
+		warnx("processor state mismatch, found unexpected sock: %s",
+		    info.smbi_location);
+		ret = B_FALSE;
+	}
+
+	if (strcmp(info.smbi_part, smbios_proc_pn) != 0) {
+		warnx("processor state mismatch, found unexpected pn: %s",
+		    info.smbi_part);
+		ret = B_FALSE;
+	}
+
+	return (ret);
+}
+
+boolean_t
+smbios_test_proc_verify_25(smbios_hdl_t *hdl)
+{
+	boolean_t ret = B_TRUE;
+	smbios_struct_t sp;
+	smbios_processor_t proc;
+
+	if (smbios_lookup_type(hdl, SMB_TYPE_PROCESSOR, &sp) == -1) {
+		warnx("failed to lookup SMBIOS processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (smbios_info_processor(hdl, sp.smbstr_id, &proc) == -1) {
+		warnx("failed to get processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (!smbios_test_proc_verify_common(hdl, &sp, &proc)) {
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_family != SMB_PRF_HOBBIT) {
+		warnx("processor state mismatch, found unexpected family: 0x%x",
+		    proc.smbp_family);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_corecount != 0x77) {
+		warnx("processor state mismatch, found unexpected core count: "
+		    "0x%x",  proc.smbp_corecount);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_coresenabled != 0x3) {
+		warnx("processor state mismatch, found unexpected cores "
+		    "enabled count: 0x%x",  proc.smbp_coresenabled);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_threadcount != 0x19) {
+		warnx("processor state mismatch, found unexpected thread "
+		    "count: 0x%x",  proc.smbp_threadcount);
+		ret = B_FALSE;
+	}
+
+	return (ret);
+}
+
+/*
+ * This verifies that the 3.6 based table with a 3.0+ client always sees the
+ * values from the uint16_t extension values.
+ */
+boolean_t
+smbios_test_proc_verify_36(smbios_hdl_t *hdl)
+{
+	boolean_t ret = B_TRUE;
+	smbios_struct_t sp;
+	smbios_processor_t proc;
+
+	if (smbios_lookup_type(hdl, SMB_TYPE_PROCESSOR, &sp) == -1) {
+		warnx("failed to lookup SMBIOS processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (smbios_info_processor(hdl, sp.smbstr_id, &proc) == -1) {
+		warnx("failed to get processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (!smbios_test_proc_verify_common(hdl, &sp, &proc)) {
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_family != SMB_PRF_RV64) {
+		warnx("processor state mismatch, found unexpected family: 0x%x",
+		    proc.smbp_family);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_corecount != 0x171) {
+		warnx("processor state mismatch, found unexpected core count: "
+		    "0x%x",  proc.smbp_corecount);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_coresenabled != 0x717) {
+		warnx("processor state mismatch, found unexpected cores "
+		    "enabled count: 0x%x",  proc.smbp_coresenabled);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_threadcount != 0x5445) {
+		warnx("processor state mismatch, found unexpected thread "
+		    "count: 0x%x",  proc.smbp_threadcount);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_threadsenabled != 0x2232) {
+		warnx("processor state mismatch, found unexpected thread "
+		    "enabled coun: 0x%x",  proc.smbp_threadsenabled);
+		ret = B_FALSE;
+	}
+
+	return (ret);
+}
+
+/*
+ * This verifies that when a 2.5 based client uses a 3.x based table, we don't
+ * know about the second flags and instead seed data just based off of the
+ * original field with reserved and all.
+ */
+boolean_t
+smbios_test_proc_verify_36_25(smbios_hdl_t *hdl)
+{
+	boolean_t ret = B_TRUE;
+	smbios_struct_t sp;
+	smbios_processor_t proc;
+
+	if (smbios_lookup_type(hdl, SMB_TYPE_PROCESSOR, &sp) == -1) {
+		warnx("failed to lookup SMBIOS processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (smbios_info_processor(hdl, sp.smbstr_id, &proc) == -1) {
+		warnx("failed to get processor: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+		return (B_FALSE);
+	}
+
+	if (!smbios_test_proc_verify_common(hdl, &sp, &proc)) {
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_family != 0xfe) {
+		warnx("processor state mismatch, found unexpected family: 0x%x",
+		    proc.smbp_family);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_corecount != 0xff) {
+		warnx("processor state mismatch, found unexpected core count: "
+		    "0x%x",  proc.smbp_corecount);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_coresenabled != 0xff) {
+		warnx("processor state mismatch, found unexpected cores "
+		    "enabled count: 0x%x",  proc.smbp_coresenabled);
+		ret = B_FALSE;
+	}
+
+	if (proc.smbp_threadcount != 0xff) {
+		warnx("processor state mismatch, found unexpected thread "
+		    "count: 0x%x",  proc.smbp_threadcount);
+		ret = B_FALSE;
+	}
+
+	return (ret);
+}
diff --git a/usr/src/uts/common/sys/smbios.h b/usr/src/uts/common/sys/smbios.h
index 257956b047..29055a775c 100644
--- a/usr/src/uts/common/sys/smbios.h
+++ b/usr/src/uts/common/sys/smbios.h
@@ -22,7 +22,7 @@
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
  * Copyright (c) 2018, Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -455,6 +455,7 @@ typedef struct smbios_processor {
 		/* number of threads per processor socket */
 	uint16_t smbp_cflags;
 		/* processor characteristics (SMB_PRC_*) */
+	uint32_t smbp_threadsenabled;	/* number of enabled threads */
 } smbios_processor_t;
 
 #define	SMB_PRT_OTHER		0x01	/* other */
@@ -546,6 +547,15 @@ typedef struct smbios_processor {
 #define	SMB_PRU_LGA4189		0x3D	/* Socket LGA4189 */
 #define	SMB_PRU_LGA1200		0x3E	/* Socket LGA1200 */
 #define	SMB_PRU_LGA4677		0x3F	/* Socket LGA4677 */
+#define	SMB_PRU_LGA1700		0x40	/* Socket LGA1700 */
+#define	SMB_PRU_BGA1744		0x41	/* Socket BGA1744 */
+#define	SMB_PRU_BGA1781		0x42	/* Socket BGA1781 */
+#define	SMB_PRU_BGA1211		0x43	/* Socket BGA1211 */
+#define	SMB_PRU_BGA2422		0x44	/* Socket BGA2422 */
+#define	SMB_PRU_LGA1211		0x45	/* Socket LGA1211 */
+#define	SMB_PRU_LGA2422		0x46	/* Socket LGA2422 */
+#define	SMB_PRU_LGA5773		0x47	/* Socket LGA5773 */
+#define	SMB_PRU_BGA5773		0x48	/* Socket BGA5773 */
 
 #define	SMB_PRC_RESERVED	0x0001	/* reserved */
 #define	SMB_PRC_UNKNOWN		0x0002	/* unknown */
@@ -759,6 +769,7 @@ typedef struct smbios_processor {
 #define	SMB_PRF_I960		0xFB	/* i960 */
 #define	SMB_PRF_ARMv7		0x100	/* ARMv7 */
 #define	SMB_PRF_ARMv8		0x101	/* ARMv8 */
+#define	SMB_PRF_ARMv9		0x102	/* ARMv9 */
 #define	SMB_PRF_SH3		0x104	/* SH-3 */
 #define	SMB_PRF_SH4		0x105	/* SH-4 */
 #define	SMB_PRF_ARM		0x118	/* ARM */
@@ -772,6 +783,24 @@ typedef struct smbios_processor {
 #define	SMB_PRF_RV32		0x200	/* RISC-V RV32 */
 #define	SMB_PRF_RV64		0x201	/* RISC-V RV64 */
 #define	SMB_PRF_RV128		0x202	/* RISC-V RV128 */
+#define	SMG_PRF_LOONG_ARCH	0x258	/* LoongArch */
+#define	SMG_PRF_LOONG_1		0x259	/* Loongson 1 Processor Family */
+#define	SMG_PRF_LOONG_2		0x25A	/* Loongson 1 Processor Family */
+#define	SMG_PRF_LOONG_3		0x25B	/* Loongson 3 Processor Family */
+#define	SMG_PRF_LOONG_2K	0x25C	/* Loongson 2K Processor Family */
+#define	SMG_PRF_LOONG_3A	0x25D	/* Loongson 3A Processor Family */
+#define	SMG_PRF_LOONG_3B	0x25E	/* Loongson 3B Processor Family */
+#define	SMG_PRF_LOONG_3C	0x25F	/* Loongson 3C Processor Family */
+#define	SMG_PRF_LOONG_3D	0x260	/* Loongson 3E Processor Family */
+/* BEGIN CSTYLED */
+#define	SMG_PRF_LOONG_2K_DC	0x261	/* Dual-Core Loongson 2K Processor 2xxx Series */
+#define	SMG_PRF_LOONG_3A_QC	0x26C	/* Quad-Core Loongson 3A Processor 5xxx Series */
+#define	SMG_PRF_LOONG_3A_MC	0x26D	/* Multi-Core Loongson 3A Processor 5xxx Series */
+#define	SMG_PRF_LOONG_3B_QC	0x26E	/* Quad-Core Loongson 3B Processor 5xxx Series */
+#define	SMG_PRF_LOONG_3B_MC	0x26F	/* Multi-Core Loongson 3B Processor 5xxx Series */
+#define	SMG_PRF_LOONG_3C_MC	0x270	/* Multi-Core Loongson 3C Processor 5xxx Series */
+#define	SMG_PRF_LOONG_3D_MC	0x271	/* Multi-Core Loongson 3D Processor 5xxx Series */
+/* END CSTYLED */
 
 /*
  * SMBIOS Cache Information.  See DSP0134 Section 7.8 for more information.
@@ -1335,6 +1364,7 @@ typedef struct smbios_memdevice {
 #define	SMB_MDT_HBM2		0x21	/* High Bandwidth Memory 2 */
 #define	SMB_MDT_DDR5		0x22	/* DDR5 */
 #define	SMB_MDT_LPDDR5		0x23	/* LPDDR5 */
+#define	SMB_MDT_HBM3		0x24	/* HBM3 */
 
 #define	SMB_MDF_OTHER		0x0002	/* other */
 #define	SMB_MDF_UNKNOWN		0x0004	/* unknown */
@@ -1772,6 +1802,8 @@ typedef struct smbios_processor_info {
 #define	SMB_PROCINFO_T_RV32	0x06	/* 32-bit RISC-V (RV32) */
 #define	SMB_PROCINFO_T_RV64	0x07	/* 64-bit RISC-V (RV64) */
 #define	SMB_PROCINFO_T_RV128	0x08	/* 128-bit RISC-V (RV128) */
+#define	SMB_PROCINFO_T_LA32	0x09	/* 32-bit LoongArch */
+#define	SMB_PROCINFO_T_LA64	0x0A	/* 64-bit LoongArch */
 /* END CSTYLED */
 
 typedef struct smbios_processor_info_riscv {
@@ -1976,7 +2008,8 @@ typedef struct smbios_memdevice_ext {
 #define	SMB_VERSION_33	0x0303		/* SMBIOS encoding for DMTF spec 3.3 */
 #define	SMB_VERSION_34	0x0304		/* SMBIOS encoding for DMTF spec 3.4 */
 #define	SMB_VERSION_35	0x0305		/* SMBIOS encoding for DMTF spec 3.5 */
-#define	SMB_VERSION	SMB_VERSION_35	/* SMBIOS latest version definitions */
+#define	SMB_VERSION_36	0x0306		/* SMBIOS encoding for DMTF spec 3.6 */
+#define	SMB_VERSION	SMB_VERSION_36	/* SMBIOS latest version definitions */
 
 #define	SMB_O_NOCKSUM	0x1		/* do not verify header checksums */
 #define	SMB_O_NOVERS	0x2		/* do not verify header versions */
diff --git a/usr/src/uts/common/sys/smbios_impl.h b/usr/src/uts/common/sys/smbios_impl.h
index 41424aa03a..d38c3d1065 100644
--- a/usr/src/uts/common/sys/smbios_impl.h
+++ b/usr/src/uts/common/sys/smbios_impl.h
@@ -22,7 +22,7 @@
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
  * Copyright (c) 2018, Joyent, Inc.
- * Copyright 2021 Oxide Computer Company
+ * Copyright 2022 Oxide Computer Company
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -179,6 +179,7 @@ typedef struct smb_processor {
 	uint16_t smbpr_corecount2;	/* second number of cores per socket */
 	uint16_t smbpr_coresenabled2;	/* second number of enabled cores */
 	uint16_t smbpr_threadcount2;	/* second number of enabled threads */
+	uint16_t smpbr_threaden;	/* enabled thread count */
 } smb_processor_t;
 
 /*