diff options
| -rw-r--r-- | usr/src/cmd/mdb/common/modules/genunix/pg.c | 7 | ||||
| -rw-r--r-- | usr/src/uts/common/os/pghw.c | 2 | ||||
| -rw-r--r-- | usr/src/uts/common/sys/lgrp.h | 1 | ||||
| -rw-r--r-- | usr/src/uts/sun4v/cpu/generic.c | 6 | ||||
| -rw-r--r-- | usr/src/uts/sun4v/cpu/niagara2.c | 4 | ||||
| -rw-r--r-- | usr/src/uts/sun4v/os/cmp.c | 2 | ||||
| -rw-r--r-- | usr/src/uts/sun4v/os/mpo.c | 28 |
7 files changed, 37 insertions, 13 deletions
diff --git a/usr/src/cmd/mdb/common/modules/genunix/pg.c b/usr/src/cmd/mdb/common/modules/genunix/pg.c index 4d23c08bc5..4e36430f04 100644 --- a/usr/src/cmd/mdb/common/modules/genunix/pg.c +++ b/usr/src/cmd/mdb/common/modules/genunix/pg.c @@ -43,7 +43,8 @@ char *pg_hw_names[] = { "ipipe", "cache", "fpu", - "mpipe/chip", + "mpipe", + "chip", "memory", }; @@ -78,7 +79,7 @@ pg(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) if (mdb_getopts(argc, argv, 'q', MDB_OPT_SETBITS, TRUE, &opt_q, - NULL) != argc) + NULL) != argc) return (DCMD_USAGE); if (flags & DCMD_PIPE_OUT) @@ -111,7 +112,7 @@ pg(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) } if (mdb_vread(&pg_class, sizeof (struct pg_class), - (uintptr_t)pg.pg_class) == -1) { + (uintptr_t)pg.pg_class) == -1) { mdb_warn("unable to read 'pg_class' at %p", pg.pg_class); return (DCMD_ERR); } diff --git a/usr/src/uts/common/os/pghw.c b/usr/src/uts/common/os/pghw.c index e2dc2a38f2..8b98bb7e7c 100644 --- a/usr/src/uts/common/os/pghw.c +++ b/usr/src/uts/common/os/pghw.c @@ -365,6 +365,8 @@ pghw_type_string(pghw_type_t hw) return ("cache"); case PGHW_FPU: return ("fpu"); + case PGHW_MPIPE: + return ("mpipe"); case PGHW_CHIP: return ("chip"); case PGHW_MEMORY: diff --git a/usr/src/uts/common/sys/lgrp.h b/usr/src/uts/common/sys/lgrp.h index 48ad8e8757..a7bc5e5d97 100644 --- a/usr/src/uts/common/sys/lgrp.h +++ b/usr/src/uts/common/sys/lgrp.h @@ -605,7 +605,6 @@ extern uint32_t lgrp_loadavg_tolerance; extern uint32_t lgrp_loadavg_max_effect; extern uint32_t lgrp_load_thresh; extern lgrp_mem_policy_t lgrp_mem_policy_root; -extern int tsb_lgrp_affinity; #endif /* _KERNEL && _KMEMUSER */ diff --git a/usr/src/uts/sun4v/cpu/generic.c b/usr/src/uts/sun4v/cpu/generic.c index 21771a5f71..b9467c4a5c 100644 --- a/usr/src/uts/sun4v/cpu/generic.c +++ b/usr/src/uts/sun4v/cpu/generic.c @@ -168,6 +168,12 @@ cpu_map_exec_units(struct cpu *cp) if (cp->cpu_m.cpu_fpu == NO_EU_MAPPING_FOUND) cp->cpu_m.cpu_fpu = (id_t)(cp->cpu_id); + /* + * The cpu_chip field is initialized based on the information + * in the MD and assume that all cpus within a chip + * share the same L2 cache. If no such info is available, we + * set the cpu to belong to the defacto chip 0. + */ cp->cpu_m.cpu_mpipe = cpunodes[cp->cpu_id].l2_cache_mapping; if (cp->cpu_m.cpu_mpipe == NO_L2_CACHE_MAPPING_FOUND) cp->cpu_m.cpu_mpipe = CPU_L2_CACHEID_INVALID; diff --git a/usr/src/uts/sun4v/cpu/niagara2.c b/usr/src/uts/sun4v/cpu/niagara2.c index e77b2ef3b4..1f0d3b65b8 100644 --- a/usr/src/uts/sun4v/cpu/niagara2.c +++ b/usr/src/uts/sun4v/cpu/niagara2.c @@ -201,6 +201,10 @@ cpu_map_exec_units(struct cpu *cp) cp->cpu_m.cpu_mpipe = cpunodes[cp->cpu_id].l2_cache_mapping; if (cp->cpu_m.cpu_mpipe == NO_L2_CACHE_MAPPING_FOUND) cp->cpu_m.cpu_mpipe = CPU_L2_CACHEID_INVALID; + + cp->cpu_m.cpu_chip = cpunodes[cp->cpu_id].l2_cache_mapping; + if (cp->cpu_m.cpu_chip == NO_L2_CACHE_MAPPING_FOUND) + cp->cpu_m.cpu_chip = CPU_CHIPID_INVALID; } static int cpucnt; diff --git a/usr/src/uts/sun4v/os/cmp.c b/usr/src/uts/sun4v/os/cmp.c index d5a9e3087d..681afab583 100644 --- a/usr/src/uts/sun4v/os/cmp.c +++ b/usr/src/uts/sun4v/os/cmp.c @@ -120,6 +120,8 @@ pg_plat_hw_instance_id(cpu_t *cpu, pghw_type_t hw) switch (hw) { case PGHW_IPIPE: return (cpu->cpu_m.cpu_ipipe); + case PGHW_CHIP: + return (cpu->cpu_m.cpu_chip); case PGHW_MPIPE: return (cpu->cpu_m.cpu_mpipe); case PGHW_FPU: diff --git a/usr/src/uts/sun4v/os/mpo.c b/usr/src/uts/sun4v/os/mpo.c index d98ce96438..b2776f3e93 100644 --- a/usr/src/uts/sun4v/os/mpo.c +++ b/usr/src/uts/sun4v/os/mpo.c @@ -37,6 +37,7 @@ #include <sys/mdesc.h> #include <sys/mpo.h> #include <vm/vm_dep.h> +#include <vm/hat_sfmmu.h> /* * MPO and the sun4v memory representation @@ -728,10 +729,12 @@ plat_build_mem_nodes(u_longlong_t *list, size_t nelems) uint64_t stripe, frag, remove; mem_stripe_t *ms; - /* Check for non-MPO sun4v platforms */ + /* Pre-reserve space for plat_assign_lgrphand_to_mem_node */ + max_mem_nodes = max_locality_groups; + /* Check for non-MPO sun4v platforms */ if (n_locality_groups <= 1) { - mpo_plat_assign_lgrphand_to_mem_node((lgrp_handle_t)0, 0); + mpo_plat_assign_lgrphand_to_mem_node(LGRP_DEFAULT_HANDLE, 0); for (elem = 0; elem < nelems; elem += 2) { base = list[elem]; len = list[elem+1]; @@ -742,11 +745,10 @@ plat_build_mem_nodes(u_longlong_t *list, size_t nelems) mem_node_pfn_shift = 0; mem_node_physalign = 0; n_mem_stripes = 0; - return; + if (n_mblocks == 1) + return; } - /* Pre-reserve space for plat_assign_lgrphand_to_mem_node */ - max_mem_nodes = max_locality_groups; bzero(mem_stripes, sizeof (mem_stripes)); stripe = ptob(mnode_pages); stride = max_locality_groups * stripe; @@ -808,9 +810,17 @@ plat_build_mem_nodes(u_longlong_t *list, size_t nelems) ms->offset = btop(offset); ms->exists = 1; - mpo_plat_assign_lgrphand_to_mem_node(lgrphand, mnode); - mpo_mem_node_add_slice(ms->physbase, ms->physmax); - + /* + * If we have only 1 lgroup and multiple mblocks, + * then we have already established our lgrp handle + * to mem_node and mem_node_config values above. + */ + if (n_locality_groups > 1) { + mpo_plat_assign_lgrphand_to_mem_node(lgrphand, + mnode); + mpo_mem_node_add_slice(ms->physbase, + ms->physmax); + } base = stripe_end; stripe_end += stripe; offset = 0; @@ -837,7 +847,7 @@ plat_lgrp_cpu_to_hand(processorid_t id) if (n_locality_groups > 1) { return ((lgrp_handle_t)mpo_cpu[(int)id].home); } else { - return ((lgrp_handle_t)0); /* Default */ + return ((lgrp_handle_t)LGRP_DEFAULT_HANDLE); /* Default */ } } |