diff options
Diffstat (limited to 'usr/src/uts/sparc')
| -rw-r--r-- | usr/src/uts/sparc/fpu/fpu_simulator.c | 1 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/Makefile | 3 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/fpu/fpu_simulator.h | 2 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/fpu/fpusystm.h | 4 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/mcontext.h | 304 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/procfs_isa.h | 6 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/regset.h | 427 | ||||
| -rw-r--r-- | usr/src/uts/sparc/sys/ucontext.h | 6 | ||||
| -rw-r--r-- | usr/src/uts/sparc/syscall/getcontext.c | 8 | ||||
| -rw-r--r-- | usr/src/uts/sparc/v7/sys/machpcb.h | 6 | ||||
| -rw-r--r-- | usr/src/uts/sparc/v9/fpu/fpu.c | 14 | ||||
| -rw-r--r-- | usr/src/uts/sparc/v9/os/v9dep.c | 14 | ||||
| -rw-r--r-- | usr/src/uts/sparc/v9/sys/machpcb.h | 2 |
13 files changed, 344 insertions, 453 deletions
diff --git a/usr/src/uts/sparc/fpu/fpu_simulator.c b/usr/src/uts/sparc/fpu/fpu_simulator.c index aeafdc515d..7a5a7adc73 100644 --- a/usr/src/uts/sparc/fpu/fpu_simulator.c +++ b/usr/src/uts/sparc/fpu/fpu_simulator.c @@ -35,6 +35,7 @@ #include <sys/cpuvar.h> #include <sys/cmn_err.h> #include <sys/atomic.h> +#include <sys/regset.h> #include <sys/privregs.h> #include <sys/vis_simulator.h> diff --git a/usr/src/uts/sparc/sys/Makefile b/usr/src/uts/sparc/sys/Makefile index 1ae69ac3cc..975639fa06 100644 --- a/usr/src/uts/sparc/sys/Makefile +++ b/usr/src/uts/sparc/sys/Makefile @@ -22,8 +22,6 @@ # Copyright 2008 Sun Microsystems, Inc. All rights reserved. # Use is subject to license terms. # -#ident "%Z%%M% %I% %E% SMI" -# include ../../../Makefile.master @@ -41,6 +39,7 @@ HDRS= \ machlock.h \ machsig.h \ machtypes.h \ + mcontext.h \ old_procfs.h \ pcb.h \ procfs_isa.h \ diff --git a/usr/src/uts/sparc/sys/fpu/fpu_simulator.h b/usr/src/uts/sparc/sys/fpu/fpu_simulator.h index 4d83a2c795..0087877f55 100644 --- a/usr/src/uts/sparc/sys/fpu/fpu_simulator.h +++ b/usr/src/uts/sparc/sys/fpu/fpu_simulator.h @@ -455,7 +455,7 @@ extern enum ftt_type fp_emulator( fp_inst_type *pinst, /* Pointer to FPU instruction to simulate. */ struct regs *pregs, /* Pointer to PCB image of registers. */ struct rwindow *pwindow, /* Pointer to locals and ins. */ - struct fpu *pfpu); /* Pointer to FPU register block. */ + struct _fpu *pfpu); /* Pointer to FPU register block. */ /* * fp_traps handles passing exception conditions to the kernel. diff --git a/usr/src/uts/sparc/sys/fpu/fpusystm.h b/usr/src/uts/sparc/sys/fpu/fpusystm.h index 6b013aa52d..cf178fa87f 100644 --- a/usr/src/uts/sparc/sys/fpu/fpusystm.h +++ b/usr/src/uts/sparc/sys/fpu/fpusystm.h @@ -27,8 +27,6 @@ #ifndef _SYS_FPU_FPUSYSTM_H #define _SYS_FPU_FPUSYSTM_H -#pragma ident "%Z%%M% %I% %E% SMI" - /* * ISA-dependent FPU interfaces */ @@ -39,7 +37,7 @@ extern "C" { #ifdef _KERNEL -struct fpu; +struct _fpu; struct regs; #if !defined(DEBUG) && !defined(NEED_FPU_EXISTS) diff --git a/usr/src/uts/sparc/sys/mcontext.h b/usr/src/uts/sparc/sys/mcontext.h new file mode 100644 index 0000000000..f35d0c1d22 --- /dev/null +++ b/usr/src/uts/sparc/sys/mcontext.h @@ -0,0 +1,304 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ +/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ +/* All Rights Reserved */ + + +/* + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + * + * Copyright 2015 Nexenta Systems, Inc. All rights reserved. + */ + +/* + * Essential struct definitions for mcontext_t needed by ucontext.h + * These were formerly in regset.h, which now includes this file. + */ + +#ifndef _SYS_MCONTEXT_H +#define _SYS_MCONTEXT_H + +#include <sys/feature_tests.h> + +#if !defined(_ASM) +#include <sys/int_types.h> +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * A gregset_t is defined as an array type for compatibility with the reference + * source. This is important due to differences in the way the C language + * treats arrays and structures as parameters. + * + * Note that NGREG is really (sizeof (struct regs) / sizeof (greg_t)), + * but that the SPARC V8 ABI defines it absolutely to be 19. + */ +#if defined(__sparcv9) +#define _NGREG 21 +#else /* __sparcv9 */ +#define _NGREG 19 +#endif /* __sparcv9 */ + +#ifndef _ASM + +#if defined(_LP64) || defined(_I32LPx) +typedef long greg_t; +#else +typedef int greg_t; +#endif + +#if defined(_SYSCALL32) + +typedef int32_t greg32_t; +typedef int64_t greg64_t; + +#endif /* _SYSCALL32 */ + +typedef greg_t gregset_t[_NGREG]; + +#if defined(_SYSCALL32) + +#define _NGREG32 19 +#define _NGREG64 21 + +typedef greg32_t gregset32_t[_NGREG32]; +typedef greg64_t gregset64_t[_NGREG64]; + +#endif /* _SYSCALL32 */ + +/* + * Floating point definitions. + */ + +#define _MAXFPQ 16 /* max # of fpu queue entries currently supported */ + +/* + * struct _fq defines the minimal format of a floating point instruction queue + * entry. The size of entries in the floating point queue are implementation + * dependent. The union FQu is guarenteed to be the first field in any ABI + * conformant system implementation. Any additional fields provided by an + * implementation should not be used applications designed to be ABI conformant. + */ + +struct _fpq { + unsigned int *fpq_addr; /* address */ + unsigned int fpq_instr; /* instruction */ +}; + +struct _fq { + union { /* FPU inst/addr queue */ + double whole; + struct _fpq fpq; + } FQu; +}; + +#if defined(_SYSCALL32) + +struct fpq32 { + caddr32_t fpq_addr; /* address */ + uint32_t fpq_instr; /* instruction */ +}; + +struct fq32 { + union { /* FPU inst/addr queue */ + double whole; + struct fpq32 fpq; + } FQu; +}; + +#endif /* _SYSCALL32 */ + +/* + * struct fpu is the floating point processor state. struct fpu is the sum + * total of all possible floating point state which includes the state of + * external floating point hardware, fpa registers, etc..., if it exists. + * + * A floating point instuction queue may or may not be associated with + * the floating point processor state. If a queue does exist, the field + * fpu_q will point to an array of fpu_qcnt entries where each entry is + * fpu_q_entrysize long. fpu_q_entry has a lower bound of sizeof (union FQu) + * and no upper bound. If no floating point queue entries are associated + * with the processor state, fpu_qcnt will be zeo and fpu_q will be NULL. + */ + +#if defined(__sparcv9) + +struct _fpu { + union { /* FPU floating point regs */ + uint32_t fpu_regs[32]; /* 32 singles */ + double fpu_dregs[32]; /* 32 doubles */ + long double fpu_qregs[16]; /* 16 quads */ + } fpu_fr; + struct _fq *fpu_q; /* ptr to array of FQ entries */ + uint64_t fpu_fsr; /* FPU status register */ + uint8_t fpu_qcnt; /* # of entries in saved FQ */ + uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ + uint8_t fpu_en; /* flag specifying fpu in use */ +}; + +#else /* __sparcv9 */ + +struct _fpu { + union { /* FPU floating point regs */ + uint32_t fpu_regs[32]; /* 32 singles */ + double fpu_dregs[16]; /* 16 doubles */ + } fpu_fr; + struct _fq *fpu_q; /* ptr to array of FQ entries */ + uint32_t fpu_fsr; /* FPU status register */ + uint8_t fpu_qcnt; /* # of entries in saved FQ */ + uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ + uint8_t fpu_en; /* flag signifying fpu in use */ +}; + +#endif /* __sparcv9 */ + +typedef struct _fpu fpregset_t; + +#if defined(_SYSCALL32) + +/* Kernel view of user sparcv7/v8 fpu structure */ + +struct fpu32 { + union { /* FPU floating point regs */ + uint32_t fpu_regs[32]; /* 32 singles */ + double fpu_dregs[16]; /* 16 doubles */ + } fpu_fr; + caddr32_t fpu_q; /* ptr to array of FQ entries */ + uint32_t fpu_fsr; /* FPU status register */ + uint8_t fpu_qcnt; /* # of entries in saved FQ */ + uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ + uint8_t fpu_en; /* flag signifying fpu in use */ +}; + +typedef struct fpu32 fpregset32_t; + +#endif /* _SYSCALL32 */ + +#if defined(_KERNEL) || defined(_KMDB) +/* + * The ABI uses struct fpu, so we use this to describe the kernel's view of the + * fpu. + */ +typedef struct { + union _fpu_fr { /* V9 FPU floating point regs */ + uint32_t fpu_regs[32]; /* 32 singles */ + uint64_t fpu_dregs[32]; /* 32 doubles */ + long double fpu_qregs[16]; /* 16 quads */ + } fpu_fr; + uint64_t fpu_fsr; /* FPU status register */ + uint32_t fpu_fprs; /* fprs register */ + struct _fq *fpu_q; + uint8_t fpu_qcnt; + uint8_t fpu_q_entrysize; + uint8_t fpu_en; /* flag signifying fpu in use */ +} kfpu_t; +#endif /* _KERNEL || _KMDB */ + +/* + * The following structure is for associating extra register state with + * the ucontext structure and is kept within the uc_mcontext filler area. + * + * If (xrs_id == XRS_ID) then the xrs_ptr field is a valid pointer to + * extra register state. The exact format of the extra register state + * pointed to by xrs_ptr is platform-dependent. + * + * Note: a platform may or may not manage extra register state. + */ +typedef struct { + unsigned int xrs_id; /* indicates xrs_ptr validity */ + caddr_t xrs_ptr; /* ptr to extra reg state */ +} xrs_t; + +#define _XRS_ID 0x78727300 /* the string "xrs" */ + +#if defined(_SYSCALL32) + +typedef struct { + uint32_t xrs_id; /* indicates xrs_ptr validity */ + caddr32_t xrs_ptr; /* ptr to extra reg state */ +} xrs32_t; + +#endif /* _SYSCALL32 */ + +#if defined(__sparcv9) + +/* + * Ancillary State Registers + * + * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31. + * ASRs 16 through 31 are available to user programs, though the meaning + * and content of these registers is implementation dependent. + */ +typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */ + +#endif /* __sparcv9 */ + +/* + * Structure mcontext defines the complete hardware machine state. If + * the field `gwins' is non NULL, it points to a save area for register + * window frames. If `gwins' is NULL, the register windows were saved + * on the user's stack. + * + * The filler of 21 longs is historical (now filler[19] plus the xrs_t + * field). The value was selected to provide binary compatibility with + * statically linked ICL binaries. It is in the ABI (do not change). It + * actually appears in the ABI as a single filler of 44 is in the field + * uc_filler of struct ucontext. It is split here so that ucontext.h can + * (hopefully) remain architecture independent. + * + * Note that 2 longs of the filler are used to hold extra register state info. + */ +typedef struct { + gregset_t gregs; /* general register set */ + struct _gwindows *gwins; /* POSSIBLE pointer to register windows */ + fpregset_t fpregs; /* floating point register set */ + xrs_t xrs; /* POSSIBLE extra register state association */ +#if defined(__sparcv9) + asrset_t asrs; /* ancillary registers */ + long filler[4]; /* room for expansion */ +#else /* __sparcv9 */ + long filler[19]; +#endif /* __sparcv9 */ +} mcontext_t; + +#if defined(_SYSCALL32) + +typedef struct { + gregset32_t gregs; /* general register set */ + caddr32_t gwins; /* POSSIBLE pointer to register windows */ + fpregset32_t fpregs; /* floating point register set */ + xrs32_t xrs; /* POSSIBLE extra register state association */ + int32_t filler[19]; +} mcontext32_t; + +#endif /* _SYSCALL32 */ + +#endif /* _ASM */ + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_MCONTEXT_H */ diff --git a/usr/src/uts/sparc/sys/procfs_isa.h b/usr/src/uts/sparc/sys/procfs_isa.h index a1c98655b5..4c9ffec7c1 100644 --- a/usr/src/uts/sparc/sys/procfs_isa.h +++ b/usr/src/uts/sparc/sys/procfs_isa.h @@ -27,8 +27,6 @@ #ifndef _SYS_PROCFS_ISA_H #define _SYS_PROCFS_ISA_H -#pragma ident "%Z%%M% %I% %E% SMI" - /* * Instruction Set Architecture specific component of <sys/procfs.h> * sparc v8/v9 version @@ -169,7 +167,7 @@ typedef struct prfpregset { uint8_t pr_q_entrysize; /* # of bytes per FQ entry */ uint8_t pr_en; /* flag signifying fpu in use */ char pr_pad[13]; /* ensure sizeof(prfpregset)%16 == 0 */ - struct fq pr_q[16]; /* contains the FQ array */ + struct _fq pr_q[16]; /* contains the FQ array */ } prfpregset_t; #else typedef struct prfpregset { @@ -182,7 +180,7 @@ typedef struct prfpregset { uint8_t pr_qcnt; /* # of entries in saved FQ */ uint8_t pr_q_entrysize; /* # of bytes per FQ entry */ uint8_t pr_en; /* flag signifying fpu in use */ - struct fq pr_q[32]; /* contains the FQ array */ + struct _fq pr_q[32]; /* contains the FQ array */ } prfpregset_t; #endif /* __sparcv9 */ diff --git a/usr/src/uts/sparc/sys/regset.h b/usr/src/uts/sparc/sys/regset.h index 26e7119a38..cebf5939a3 100644 --- a/usr/src/uts/sparc/sys/regset.h +++ b/usr/src/uts/sparc/sys/regset.h @@ -23,6 +23,8 @@ /* + * Copyright 2015 Nexenta Systems, Inc. All rights reserved. + * * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -30,13 +32,12 @@ #ifndef _SYS_REGSET_H #define _SYS_REGSET_H -#pragma ident "%Z%%M% %I% %E% SMI" /* SVr4.0 1.1 */ - #include <sys/feature_tests.h> #if !defined(_ASM) #include <sys/int_types.h> #endif +#include <sys/mcontext.h> #ifdef __cplusplus extern "C" { @@ -46,8 +47,6 @@ extern "C" { * Location of the users' stored registers relative to R0. * Usage is as an index into a gregset_t array or as u.u_ar0[XX]. */ -#if !defined(_XPG4_2) || defined(__EXTENSIONS__) - #if defined(__sparcv9) #define REG_CCR (0) #if defined(_SYSCALL32) @@ -87,53 +86,12 @@ extern "C" { #define REG_SP REG_O6 #define REG_R0 REG_O0 #define REG_R1 REG_O1 -#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */ - -/* - * A gregset_t is defined as an array type for compatibility with the reference - * source. This is important due to differences in the way the C language - * treats arrays and structures as parameters. - * - * Note that NGREG is really (sizeof (struct regs) / sizeof (greg_t)), - * but that the SPARC V8 ABI defines it absolutely to be 19. - */ -#if defined(__sparcv9) -#define _NGREG 21 -#else /* __sparcv9 */ -#define _NGREG 19 -#endif /* __sparcv9 */ -#if !defined(_XPG4_2) || defined(__EXTENSIONS__) -#define NGREG _NGREG -#endif #ifndef _ASM -#if defined(_LP64) || defined(_I32LPx) -typedef long greg_t; -#else -typedef int greg_t; -#endif - -#if defined(_SYSCALL32) - -typedef int32_t greg32_t; -typedef int64_t greg64_t; - -#endif /* _SYSCALL32 */ - -typedef greg_t gregset_t[_NGREG]; - -#if defined(_SYSCALL32) - -#define _NGREG32 19 -#define _NGREG64 21 - -typedef greg32_t gregset32_t[_NGREG32]; -typedef greg64_t gregset64_t[_NGREG64]; - -#endif /* _SYSCALL32 */ +#define NGREG _NGREG +#define MAXFPQ _MAXFPQ -#if !defined(_XPG4_2) || defined(__EXTENSIONS__) /* * The following structures define how a register window can appear on the * stack. This structure is available (when required) through the `gwins' @@ -143,7 +101,7 @@ typedef greg64_t gregset64_t[_NGREG64]; */ #define SPARC_MAXREGWINDOW 31 /* max windows in SPARC arch. */ -struct rwindow { +struct rwindow { greg_t rw_local[8]; /* locals */ greg_t rw_in[8]; /* ins */ }; @@ -170,7 +128,7 @@ extern void rwindow_32ton(struct rwindow32 *, struct rwindow *); #define rw_fp rw_in[6] /* frame pointer */ #define rw_rtn rw_in[7] /* return address */ -typedef struct gwindows { +typedef struct _gwindows { int wbcnt; greg_t *spbuf[SPARC_MAXREGWINDOW]; struct rwindow wbuf[SPARC_MAXREGWINDOW]; @@ -192,62 +150,6 @@ typedef struct gwindows64 { #endif /* _SYSCALL32 */ - -/* - * Floating point definitions. - */ - -#define MAXFPQ 16 /* max # of fpu queue entries currently supported */ - -/* - * struct fq defines the minimal format of a floating point instruction queue - * entry. The size of entries in the floating point queue are implementation - * dependent. The union FQu is guarenteed to be the first field in any ABI - * conformant system implementation. Any additional fields provided by an - * implementation should not be used applications designed to be ABI conformant. - */ - -struct fpq { - unsigned int *fpq_addr; /* address */ - unsigned int fpq_instr; /* instruction */ -}; - -struct fq { - union { /* FPU inst/addr queue */ - double whole; - struct fpq fpq; - } FQu; -}; - -#if defined(_SYSCALL32) - -struct fpq32 { - caddr32_t fpq_addr; /* address */ - uint32_t fpq_instr; /* instruction */ -}; - -struct fq32 { - union { /* FPU inst/addr queue */ - double whole; - struct fpq32 fpq; - } FQu; -}; - -#endif /* _SYSCALL32 */ - -/* - * struct fpu is the floating point processor state. struct fpu is the sum - * total of all possible floating point state which includes the state of - * external floating point hardware, fpa registers, etc..., if it exists. - * - * A floating point instuction queue may or may not be associated with - * the floating point processor state. If a queue does exist, the field - * fpu_q will point to an array of fpu_qcnt entries where each entry is - * fpu_q_entrysize long. fpu_q_entry has a lower bound of sizeof (union FQu) - * and no upper bound. If no floating point queue entries are associated - * with the processor state, fpu_qcnt will be zeo and fpu_q will be NULL. - */ - /* * The following #define's are obsolete and may be removed in a future release. * The corresponding integer types should be used instead (i.e. uint64_t). @@ -258,160 +160,9 @@ struct fq32 { #define V9_FPU_FSR_TYPE uint64_t #define V9_FPU_FPRS_TYPE uint32_t -#if defined(__sparcv9) - -struct fpu { - union { /* FPU floating point regs */ - uint32_t fpu_regs[32]; /* 32 singles */ - double fpu_dregs[32]; /* 32 doubles */ - long double fpu_qregs[16]; /* 16 quads */ - } fpu_fr; - struct fq *fpu_q; /* ptr to array of FQ entries */ - uint64_t fpu_fsr; /* FPU status register */ - uint8_t fpu_qcnt; /* # of entries in saved FQ */ - uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ - uint8_t fpu_en; /* flag specifying fpu in use */ -}; - -#else /* __sparcv9 */ - -struct fpu { - union { /* FPU floating point regs */ - uint32_t fpu_regs[32]; /* 32 singles */ - double fpu_dregs[16]; /* 16 doubles */ - } fpu_fr; - struct fq *fpu_q; /* ptr to array of FQ entries */ - uint32_t fpu_fsr; /* FPU status register */ - uint8_t fpu_qcnt; /* # of entries in saved FQ */ - uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ - uint8_t fpu_en; /* flag signifying fpu in use */ -}; - -#endif /* __sparcv9 */ - -typedef struct fpu fpregset_t; - -#if defined(_SYSCALL32) - -/* Kernel view of user sparcv7/v8 fpu structure */ - -struct fpu32 { - union { /* FPU floating point regs */ - uint32_t fpu_regs[32]; /* 32 singles */ - double fpu_dregs[16]; /* 16 doubles */ - } fpu_fr; - caddr32_t fpu_q; /* ptr to array of FQ entries */ - uint32_t fpu_fsr; /* FPU status register */ - uint8_t fpu_qcnt; /* # of entries in saved FQ */ - uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */ - uint8_t fpu_en; /* flag signifying fpu in use */ -}; - -typedef struct fpu32 fpregset32_t; - -#endif /* _SYSCALL32 */ +#define XRS_ID _XRS_ID -#if defined(_KERNEL) || defined(_KMDB) -/* - * The ABI uses struct fpu, so we use this to describe the kernel's view of the - * fpu. - */ -typedef struct { - union _fpu_fr { /* V9 FPU floating point regs */ - uint32_t fpu_regs[32]; /* 32 singles */ - uint64_t fpu_dregs[32]; /* 32 doubles */ - long double fpu_qregs[16]; /* 16 quads */ - } fpu_fr; - uint64_t fpu_fsr; /* FPU status register */ - uint32_t fpu_fprs; /* fprs register */ - struct fq *fpu_q; - uint8_t fpu_qcnt; - uint8_t fpu_q_entrysize; - uint8_t fpu_en; /* flag signifying fpu in use */ -} kfpu_t; -#endif /* _KERNEL || _KMDB */ - -/* - * The following structure is for associating extra register state with - * the ucontext structure and is kept within the uc_mcontext filler area. - * - * If (xrs_id == XRS_ID) then the xrs_ptr field is a valid pointer to - * extra register state. The exact format of the extra register state - * pointed to by xrs_ptr is platform-dependent. - * - * Note: a platform may or may not manage extra register state. - */ -typedef struct { - unsigned int xrs_id; /* indicates xrs_ptr validity */ - caddr_t xrs_ptr; /* ptr to extra reg state */ -} xrs_t; - -#define XRS_ID 0x78727300 /* the string "xrs" */ - -#if defined(_SYSCALL32) - -typedef struct { - uint32_t xrs_id; /* indicates xrs_ptr validity */ - caddr32_t xrs_ptr; /* ptr to extra reg state */ -} xrs32_t; - -#endif /* _SYSCALL32 */ - -#if defined(__sparcv9) - -/* - * Ancillary State Registers - * - * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31. - * ASRs 16 through 31 are available to user programs, though the meaning - * and content of these registers is implementation dependent. - */ -typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */ - -#endif /* __sparcv9 */ - -/* - * Structure mcontext defines the complete hardware machine state. If - * the field `gwins' is non NULL, it points to a save area for register - * window frames. If `gwins' is NULL, the register windows were saved - * on the user's stack. - * - * The filler of 21 longs is historical (now filler[19] plus the xrs_t - * field). The value was selected to provide binary compatibility with - * statically linked ICL binaries. It is in the ABI (do not change). It - * actually appears in the ABI as a single filler of 44 is in the field - * uc_filler of struct ucontext. It is split here so that ucontext.h can - * (hopefully) remain architecture independent. - * - * Note that 2 longs of the filler are used to hold extra register state info. - */ -typedef struct { - gregset_t gregs; /* general register set */ - gwindows_t *gwins; /* POSSIBLE pointer to register windows */ - fpregset_t fpregs; /* floating point register set */ - xrs_t xrs; /* POSSIBLE extra register state association */ -#if defined(__sparcv9) - asrset_t asrs; /* ancillary registers */ - long filler[4]; /* room for expansion */ -#else /* __sparcv9 */ - long filler[19]; -#endif /* __sparcv9 */ -} mcontext_t; - -#if defined(_SYSCALL32) - -typedef struct { - gregset32_t gregs; /* general register set */ - caddr32_t gwins; /* POSSIBLE pointer to register windows */ - fpregset32_t fpregs; /* floating point register set */ - xrs32_t xrs; /* POSSIBLE extra register state association */ - int32_t filler[19]; -} mcontext32_t; - -#endif /* _SYSCALL32 */ - -#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */ -#endif /* _ASM */ +#endif /* !_ASM */ /* * The version of privregs.h that is used on implementations that run @@ -428,7 +179,7 @@ typedef struct { * 'struct regs' to match the content of a 32-bit core file, or a ucontext_t. * * Note that the ucontext_t actually describes the general registers in - * terms of the gregset_t data type, as described in this file. Note also + * terms of the gregset_t data type, as described in mcontex.h. Note also * that the core file content is defined by core(4) in terms of data types * defined by procfs -- see proc(4). */ @@ -438,164 +189,6 @@ typedef struct { #endif /* !_KERNEL && !_XPG4_2 || __EXTENSIONS__ */ #endif /* __sparcv9 */ -/* - * The following is here for XPG4.2 standards compliance. - * regset.h is included in ucontext.h for the definition of - * mcontext_t, all of which breaks XPG4.2 namespace. - */ - -#if defined(_XPG4_2) && !defined(__EXTENSIONS__) -/* - * The following is here for UNIX 95 compliance (XPG Issue 4, Version 2 - * System Interfaces and Headers. The structures included here are identical - * to those visible elsewhere in this header except that the structure - * element names have been changed in accordance with the X/Open namespace - * rules. Specifically, depending on the name and scope, the names have - * been prepended with a single or double underscore (_ or __). See the - * structure definitions in the non-X/Open namespace for more detailed - * comments describing each of these structures. - */ - -#ifndef _ASM - -/* - * The following structures define how a register window can appear on the - * stack. - */ -#define _SPARC_MAXREGWINDOW 31 /* max windows in SPARC arch. */ - -struct __rwindow { - greg_t __rw_local[8]; /* locals */ - greg_t __rw_in[8]; /* ins */ -}; - -#define __rw_fp __rw_in[6] /* frame pointer */ -#define __rw_rtn __rw_in[7] /* return address */ - -struct __gwindows { - int __wbcnt; - greg_t *__spbuf[_SPARC_MAXREGWINDOW]; - struct __rwindow __wbuf[_SPARC_MAXREGWINDOW]; -}; - -typedef struct __gwindows gwindows_t; - -/* - * The fq structure defines the minimal format of a floating point - * instruction queue entry. - */ - -struct __fpq { - unsigned int *__fpq_addr; /* address */ - unsigned int __fpq_instr; /* instruction */ -}; - -struct __fq { - union { /* FPU inst/addr queue */ - double __whole; - struct __fpq __fpq; - } _FQu; -}; - -/* - * The fpu structure is the floating point processor state. - */ - -/* - * The following #define's are obsolete and may be removed in a future release. - * The corresponding integer types should be used instead (i.e. uint64_t). - */ -#define _FPU_REGS_TYPE uint32_t -#define _FPU_DREGS_TYPE uint64_t -#define _V7_FPU_FSR_TYPE uint32_t -#define _V9_FPU_FSR_TYPE uint64_t -#define _V9_FPU_FPRS_TYPE uint32_t - -#if defined(__sparcv9) - -/* - * SPARC Version 9 floating point - */ - -struct __fpu { - union { /* FPU floating point regs */ - uint32_t __fpu_regs[32]; /* 32 singles */ - double __fpu_dregs[32]; /* 32 doubles */ - long double __fpu_qregs[16]; /* 16 quads */ - } __fpu_fr; - struct __fq *__fpu_q; /* ptr to array of FQ entries */ - uint64_t __fpu_fsr; /* FPU status register */ - uint8_t __fpu_qcnt; /* # of entries in saved FQ */ - uint8_t __fpu_q_entrysize; /* # of bytes per FQ entry */ - uint8_t __fpu_en; /* flag signifying fpu in use */ -}; - -#else /* __sparcv9 */ - -/* - * SPARC Version 7 and 8 floating point - */ - -struct __fpu { - union { /* FPU floating point regs */ - uint32_t __fpu_regs[32]; /* 32 singles */ - double __fpu_dregs[16]; /* 16 doubles */ - } __fpu_fr; - struct __fq *__fpu_q; /* ptr to array of FQ entries */ - uint32_t __fpu_fsr; /* FPU status register */ - uint8_t __fpu_qcnt; /* # of entries in saved FQ */ - uint8_t __fpu_q_entrysize; /* # of bytes per FQ entry */ - uint8_t __fpu_en; /* flag signifying fpu in use */ -}; - -#endif /* __sparcv9 */ - -typedef struct __fpu fpregset_t; - -/* - * The xrs_t structure is for associating extra register state with - * the ucontext structure and is kept within the uc_mcontext filler area. - */ -typedef struct { - unsigned int __xrs_id; /* indicates xrs_ptr validity */ - caddr_t __xrs_ptr; /* ptr to extra reg state */ -} xrs_t; - -#define _XRS_ID 0x78727300 /* the string "xrs" */ - -#if defined(__sparcv9) - -/* - * Ancillary State Registers - * - * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31. - * ASRs 16 through 31 are available to user programs, though the meaning - * and content of these registers is implementation dependent. - */ -typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */ - -#endif /* __sparcv9 */ - -/* - * Structure mcontext defines the complete hardware machine state. - */ -typedef struct { - gregset_t __gregs; /* general register set */ - gwindows_t *__gwins; /* POSSIBLE pointer to register windows */ - fpregset_t __fpregs; /* floating point register set */ - xrs_t __xrs; /* POSSIBLE extra register state association */ -#if defined(__sparcv9) - asrset_t __asrs; /* ancillary registers */ - long __filler[4]; /* room for expansion */ -#else /* __sparcv9 */ - long __filler[19]; -#endif /* __sparcv9 */ -} mcontext_t; - -#endif /* _ASM */ -#endif /* defined(_XPG4_2) && !defined(__EXTENSIONS__) */ - - #ifdef __cplusplus } #endif diff --git a/usr/src/uts/sparc/sys/ucontext.h b/usr/src/uts/sparc/sys/ucontext.h index e0cfea55bd..35eff287af 100644 --- a/usr/src/uts/sparc/sys/ucontext.h +++ b/usr/src/uts/sparc/sys/ucontext.h @@ -20,6 +20,8 @@ */ /* + * Copyright 2015 Nexenta Systems, Inc. All rights reserved. + * * Copyright 2010 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -33,7 +35,7 @@ #include <sys/feature_tests.h> #include <sys/types.h> -#include <sys/regset.h> +#include <sys/mcontext.h> #if !defined(_XPG4_2) || defined(__EXTENSIONS__) #include <sys/signal.h> #endif @@ -105,7 +107,7 @@ typedef struct ucontext32 { #ifdef _KERNEL extern void ucontext_32ton(const ucontext32_t *, ucontext_t *, - const struct fq32 *, struct fq *); + const struct fq32 *, struct _fq *); extern void fpuregset_nto32(const fpregset_t *, fpregset32_t *, struct fq32 *); #endif diff --git a/usr/src/uts/sparc/syscall/getcontext.c b/usr/src/uts/sparc/syscall/getcontext.c index 437eef5e1a..c9adb54b86 100644 --- a/usr/src/uts/sparc/syscall/getcontext.c +++ b/usr/src/uts/sparc/syscall/getcontext.c @@ -176,7 +176,7 @@ int getsetcontext(int flag, void *arg) { ucontext_t uc; - struct fq fpu_q[MAXFPQ]; /* to hold floating queue */ + struct _fq fpu_q[MAXFPQ]; /* to hold floating queue */ fpregset_t *fpp; gwindows_t *gwin = NULL; /* to hold windows */ caddr_t xregs = NULL; @@ -214,7 +214,7 @@ getsetcontext(int flag, void *arg) * a later setcontext(2). */ uc.uc_mcontext.fpregs.fpu_qcnt = 0; - uc.uc_mcontext.fpregs.fpu_q = (struct fq *)NULL; + uc.uc_mcontext.fpregs.fpu_q = (struct _fq *)NULL; if (copyout(&uc, arg, sizeof (ucontext_t))) return (set_errno(EFAULT)); @@ -255,7 +255,7 @@ getsetcontext(int flag, void *arg) if ((fpp->fpu_q) && (fpp->fpu_qcnt)) { if (fpp->fpu_qcnt > MAXFPQ || fpp->fpu_q_entrysize <= 0 || - fpp->fpu_q_entrysize > sizeof (struct fq)) + fpp->fpu_q_entrysize > sizeof (struct _fq)) return (set_errno(EINVAL)); if (copyin(fpp->fpu_q, fpu_q, fpp->fpu_qcnt * fpp->fpu_q_entrysize)) @@ -424,7 +424,7 @@ getsetcontext32(int flag, void *arg) { ucontext32_t uc; ucontext_t ucnat; - struct fq fpu_qnat[MAXFPQ]; /* to hold "native" floating queue */ + struct _fq fpu_qnat[MAXFPQ]; /* to hold "native" floating queue */ struct fq32 fpu_q[MAXFPQ]; /* to hold 32 bit floating queue */ fpregset32_t *fpp; gwindows32_t *gwin = NULL; /* to hold windows */ diff --git a/usr/src/uts/sparc/v7/sys/machpcb.h b/usr/src/uts/sparc/v7/sys/machpcb.h index a964018519..f0b76ee7a6 100644 --- a/usr/src/uts/sparc/v7/sys/machpcb.h +++ b/usr/src/uts/sparc/v7/sys/machpcb.h @@ -26,8 +26,6 @@ #ifndef _SYS_MACHPCB_H #define _SYS_MACHPCB_H -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/stack.h> #include <sys/regset.h> #include <sys/privregs.h> @@ -71,8 +69,8 @@ typedef struct machpcb { int mpcb_uwm; /* user window mask */ int mpcb_swm; /* shared user/kernel window mask */ int mpcb_wbcnt; /* number of saved windows in pcb_wbuf */ - struct fpu mpcb_fpu; /* fpu state */ - struct fq mpcb_fpu_q[MAXFPQ]; /* fpu exception queue */ + struct _fpu mpcb_fpu; /* fpu state */ + struct _fq mpcb_fpu_q[_MAXFPQ]; /* fpu exception queue */ int mpcb_flags; /* various state flags */ int mpcb_wocnt; /* window overflow count */ int mpcb_wucnt; /* window underflow count */ diff --git a/usr/src/uts/sparc/v9/fpu/fpu.c b/usr/src/uts/sparc/v9/fpu/fpu.c index a341eb120d..a84612e030 100644 --- a/usr/src/uts/sparc/v9/fpu/fpu.c +++ b/usr/src/uts/sparc/v9/fpu/fpu.c @@ -24,8 +24,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/param.h> #include <sys/signal.h> @@ -291,7 +289,7 @@ fp_disabled(struct regs *rp) } if (ftt = fp_emulator(&fpsd, (fp_inst_type *)rp->r_pc, rp, (ulong_t *)rp->r_sp, fp)) { - fp->fpu_q_entrysize = sizeof (struct fpq); + fp->fpu_q_entrysize = sizeof (struct _fpq); fp_traps(&fpsd, ftt, rp); } } @@ -320,7 +318,7 @@ void fp_runq(struct regs *rp) { kfpu_t *fp = lwptofpu(curthread->t_lwp); - struct fq *fqp = fp->fpu_q; + struct _fq *fqp = fp->fpu_q; fp_simd_type fpsd; uint64_t gsr = get_gsr(fp); @@ -345,7 +343,7 @@ fp_runq(struct regs *rp) */ if (fqp != fp->fpu_q) { int i; - struct fq *fqdp; + struct _fq *fqdp; /* * We need to normalize the floating queue so @@ -359,7 +357,7 @@ fp_runq(struct regs *rp) } fqp = fp->fpu_q; } - fp->fpu_q_entrysize = sizeof (struct fpq); + fp->fpu_q_entrysize = sizeof (struct _fpq); /* * fpu_simulator uses the fp registers directly but it @@ -467,14 +465,14 @@ fp_precise(struct regs *rp) * problem for a restorecontext of a v8 fp queue on a * v9 system, which seems like the .000000001% case (on v9)! */ - struct fpq *pfpq = &fp->fpu_q->FQu.fpq; + struct _fpq *pfpq = &fp->fpu_q->FQu.fpq; fp_simd_type fpsd; int fptrap; pfpq->fpq_addr = (uint_t *)rp->r_pc; pfpq->fpq_instr = kluge.i; fp->fpu_qcnt = 1; - fp->fpu_q_entrysize = sizeof (struct fpq); + fp->fpu_q_entrysize = sizeof (struct _fpq); kpreempt_disable(); (void) flush_user_windows_to_stack(NULL); diff --git a/usr/src/uts/sparc/v9/os/v9dep.c b/usr/src/uts/sparc/v9/os/v9dep.c index 751837788e..f54dab4f5d 100644 --- a/usr/src/uts/sparc/v9/os/v9dep.c +++ b/usr/src/uts/sparc/v9/os/v9dep.c @@ -73,7 +73,7 @@ static uint_t mkpsr(uint64_t tstate, uint32_t fprs); #ifdef _SYSCALL32_IMPL static void fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, - const struct fq32 *sfq, struct fq *dfq); + const struct fq32 *sfq, struct _fq *dfq); #endif /* _SYSCALL32_IMPL */ /* @@ -122,7 +122,7 @@ setfpregs(klwp_t *lwp, fpregset_t *fp) */ if (fp->fpu_qcnt > MAXFPQ) /* plug security holes */ fp->fpu_qcnt = MAXFPQ; - fp->fpu_q_entrysize = sizeof (struct fq); + fp->fpu_q_entrysize = sizeof (struct _fq); /* * For v9 kernel, copy all of the fp regs. @@ -1098,7 +1098,7 @@ sendsig(int sig, k_siginfo_t *sip, void (*hdlr)()) sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)NULL); if (fpq_size != 0) { - struct fq *fqp = (struct fq *)sp; + struct _fq *fqp = (struct _fq *)sp; sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)fqp); copyout_noerr(mpcb->mpcb_fpu_q, fqp, fpq_size); @@ -1730,7 +1730,7 @@ fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq) dest->fpu_en = src->fpu_en; if ((src->fpu_qcnt) && (dfq != NULL)) { - struct fq *sfq = src->fpu_q; + struct _fq *sfq = src->fpu_q; for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) { dfq->FQu.fpq.fpq_addr = (caddr32_t)(uintptr_t)sfq->FQu.fpq.fpq_addr; @@ -1748,7 +1748,7 @@ fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq) */ static void fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, - const struct fq32 *sfq, struct fq *dfq) + const struct fq32 *sfq, struct _fq *dfq) { int i; @@ -1758,7 +1758,7 @@ fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, dest->fpu_q = dfq; dest->fpu_fsr = (uint64_t)src->fpu_fsr; if ((dest->fpu_qcnt = src->fpu_qcnt) > 0) - dest->fpu_q_entrysize = sizeof (struct fpq); + dest->fpu_q_entrysize = sizeof (struct _fpq); else dest->fpu_q_entrysize = 0; dest->fpu_en = src->fpu_en; @@ -1774,7 +1774,7 @@ fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest, void ucontext_32ton(const ucontext32_t *src, ucontext_t *dest, - const struct fq32 *sfq, struct fq *dfq) + const struct fq32 *sfq, struct _fq *dfq) { int i; diff --git a/usr/src/uts/sparc/v9/sys/machpcb.h b/usr/src/uts/sparc/v9/sys/machpcb.h index 298dae5100..e4b1972d8a 100644 --- a/usr/src/uts/sparc/v9/sys/machpcb.h +++ b/usr/src/uts/sparc/v9/sys/machpcb.h @@ -72,7 +72,7 @@ typedef struct machpcb { int mpcb_wbcnt; /* number of saved windows in pcb_wbuf */ uint_t mpcb_wstate; /* per-lwp %wstate */ kfpu_t *mpcb_fpu; /* fpu state */ - struct fq mpcb_fpu_q[MAXFPQ]; /* fpu exception queue */ + struct _fq mpcb_fpu_q[_MAXFPQ]; /* fpu exception queue */ caddr_t mpcb_illexcaddr; /* address of last illegal instruction */ uint_t mpcb_illexcinsn; /* last illegal instruction */ uint_t mpcb_illexccnt; /* count of illegal instruction attempts */ |