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Diffstat (limited to 'usr/src/uts/sun4/io/px/px_msi.c')
-rw-r--r--usr/src/uts/sun4/io/px/px_msi.c194
1 files changed, 39 insertions, 155 deletions
diff --git a/usr/src/uts/sun4/io/px/px_msi.c b/usr/src/uts/sun4/io/px/px_msi.c
index 2f84fdd986..996b3a9288 100644
--- a/usr/src/uts/sun4/io/px/px_msi.c
+++ b/usr/src/uts/sun4/io/px/px_msi.c
@@ -107,23 +107,8 @@ px_msi_detach(px_t *px_p)
DBG(DBG_MSIQ, dip, "px_msi_detach\n");
- if (msi_state_p->msi_pool_p) {
+ if (msi_state_p->msi_pool_p)
(void) ndi_irm_destroy(msi_state_p->msi_pool_p);
- }
-
- if (msi_state_p->msi_addr64 && msi_state_p->msi_mem_flg) {
- ndi_ra_free(dip, msi_state_p->msi_addr64,
- msi_state_p->msi_addr64_len,
- NDI_RA_TYPE_MEM, NDI_RA_PASS);
- }
-
- if (msi_state_p->msi_addr32 && msi_state_p->msi_mem_flg) {
- ndi_ra_free(dip, msi_state_p->msi_addr32,
- msi_state_p->msi_addr32_len,
- NDI_RA_TYPE_MEM, NDI_RA_PASS);
-
- pci_resource_destroy(dip);
- }
if (msi_state_p->msi_p) {
kmem_free(msi_state_p->msi_p,
@@ -336,50 +321,45 @@ px_msi_get_msinum(px_t *px_p, dev_info_t *rdip, int inum, msinum_t *msi_num_p)
static int
px_msi_get_props(px_t *px_p)
{
- dev_info_t *dip = px_p->px_dip;
- px_msi_state_t *msi_state_p = &px_p->px_ib_p->ib_msi_state;
- int ret = DDI_SUCCESS;
- int length = sizeof (int);
- int *valuep = NULL;
- uint64_t msi_addr_hi, msi_addr_lo;
- uint64_t mem_answer, mem_alen;
- ndi_ra_request_t request;
+ dev_info_t *dip = px_p->px_dip;
+ px_msi_state_t *msi_state_p = &px_p->px_ib_p->ib_msi_state;
+ int length = sizeof (int);
+ int *valuep = NULL;
+ uint64_t msi_addr_hi, msi_addr_lo;
DBG(DBG_MSIQ, dip, "px_msi_get_props\n");
/* #msi */
msi_state_p->msi_cnt = ddi_getprop(DDI_DEV_T_ANY, dip,
- DDI_PROP_DONTPASS, "#msi", PX_DEFAULT_MSI_CNT);
+ DDI_PROP_DONTPASS, "#msi", 0);
- DBG(DBG_MSIQ, dip, "obp: #msi=%d\n",
- msi_state_p->msi_cnt);
+ DBG(DBG_MSIQ, dip, "#msi=%d\n", msi_state_p->msi_cnt);
+ if (msi_state_p->msi_cnt == 0)
+ return (DDI_FAILURE);
/* msi-ranges: msi# field */
- ret = ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_ALLOC,
- DDI_PROP_DONTPASS, "msi-ranges", (caddr_t)&valuep, &length);
+ if (ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_ALLOC,
+ DDI_PROP_DONTPASS, "msi-ranges", (caddr_t)&valuep, &length)
+ != DDI_PROP_SUCCESS)
+ return (DDI_FAILURE);
- if (ret == DDI_PROP_SUCCESS) {
- msi_state_p->msi_1st_msinum =
- ((px_msi_ranges_t *)valuep)->msi_no;
- kmem_free(valuep, (size_t)length);
- } else
- msi_state_p->msi_1st_msinum = PX_DEFAULT_MSI_1ST_MSINUM;
+ msi_state_p->msi_1st_msinum = ((px_msi_ranges_t *)valuep)->msi_no;
+ kmem_free(valuep, (size_t)length);
- DBG(DBG_MSIQ, dip, "obp: msi_1st_msinum=%d\n",
- msi_state_p->msi_1st_msinum);
+ DBG(DBG_MSIQ, dip, "msi_1st_msinum=%d\n", msi_state_p->msi_1st_msinum);
/* msi-data-mask */
msi_state_p->msi_data_mask = ddi_getprop(DDI_DEV_T_ANY, dip,
- DDI_PROP_DONTPASS, "msi-data-mask", PX_DEFAULT_MSI_DATA_MASK);
+ DDI_PROP_DONTPASS, "msi-data-mask", 0);
- DBG(DBG_MSIQ, dip, "obp: msi-data-mask=0x%x\n",
+ DBG(DBG_MSIQ, dip, "msi-data-mask=0x%x\n",
msi_state_p->msi_data_mask);
/* msi-data-width */
msi_state_p->msi_data_width = ddi_getprop(DDI_DEV_T_ANY, dip,
- DDI_PROP_DONTPASS, "msix-data-width", PX_DEFAULT_MSI_DATA_WIDTH);
+ DDI_PROP_DONTPASS, "msix-data-width", 0);
- DBG(DBG_MSIQ, dip, "obp: msix-data-width=%d\n",
+ DBG(DBG_MSIQ, dip, "msix-data-width=%d\n",
msi_state_p->msi_data_width);
/*
@@ -389,127 +369,31 @@ px_msi_get_props(px_t *px_p)
msi_state_p->msi_type = DDI_INTR_TYPE_MSI;
if (msi_state_p->msi_data_width == PX_MSIX_WIDTH)
msi_state_p->msi_type |= DDI_INTR_TYPE_MSIX;
- }
-
- /* msi-address-ranges */
- ret = ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_ALLOC,
- DDI_PROP_DONTPASS, "msi-address-ranges", (caddr_t)&valuep,
- &length);
-
- if (ret == DDI_PROP_SUCCESS) {
- msi_addr_hi =
- ((px_msi_address_ranges_t *)valuep)->msi_addr32_hi;
- msi_addr_lo =
- ((px_msi_address_ranges_t *)valuep)->msi_addr32_lo;
- msi_state_p->msi_addr32 =
- (msi_addr_hi << 32) | msi_addr_lo;
-
- msi_state_p->msi_addr32_len =
- ((px_msi_address_ranges_t *)valuep)->msi_addr32_len;
-
- msi_addr_hi =
- ((px_msi_address_ranges_t *)valuep)->msi_addr64_hi;
- msi_addr_lo =
- ((px_msi_address_ranges_t *)valuep)->msi_addr64_lo;
- msi_state_p->msi_addr64 =
- (msi_addr_hi << 32) | msi_addr_lo;
-
- msi_state_p->msi_addr64_len =
- ((px_msi_address_ranges_t *)valuep)->msi_addr64_len;
-
- kmem_free(valuep, (size_t)length);
-
- msi_state_p->msi_mem_flg = B_FALSE;
-
- DBG(DBG_MSIQ, dip, "obp: msi_addr32=0x%llx\n",
- msi_state_p->msi_addr32);
-
- DBG(DBG_MSIQ, dip, "obp: msi_addr64=0x%llx\n",
- msi_state_p->msi_addr64);
-
- return (ret);
- }
-
- /*
- * If msi-address-ranges property does not exist in OBP, Fire
- * driver will need to allocate memory.
- *
- * Allocate 64KB of memory from unused PCI-E address space for the MSI
- * transactions and program MSI 32-bit address register.
- *
- * This register is used by the Fire hardware to compare against the
- * address of incoming PCI-E 32-bit addressed memory write commands.
- * If the address matches bits 31:16 then PCI-E command is considered
- * to be MSI transaction.
- *
- * pci_resource_setup() is called in context of PCI hotplug
- * initialization.
- *
- * Setup resource maps for this bus node.
- */
- if (pci_resource_setup(dip) != NDI_SUCCESS) {
- DBG(DBG_MSIQ, dip, "px_msi_getprops: dip=%s%d"
- "pci_resource_setup failed\n",
- ddi_driver_name(dip), ddi_get_instance(dip));
-
+ } else {
return (DDI_FAILURE);
}
- msi_state_p->msi_mem_flg = B_TRUE;
-
- /*
- * Reserve PCI MEM 32 resources to perform 32 bit MSI transactions.
- */
- bzero((caddr_t)&request, sizeof (ndi_ra_request_t));
- request.ra_flags = NDI_RA_ALLOC_BOUNDED;
- request.ra_boundbase = 0;
- request.ra_boundlen = PX_MSI_4GIG_LIMIT;
- request.ra_len = PX_MSI_ADDR_LEN;
- request.ra_align_mask = 0;
-
- if (ndi_ra_alloc(dip, &request, &mem_answer, &mem_alen,
- NDI_RA_TYPE_MEM, NDI_RA_PASS) != NDI_SUCCESS) {
- DBG(DBG_MSIQ, dip, "px_msi_getprops: Failed to allocate "
- "64KB mem\n");
-
+ /* msi-address-ranges */
+ if (ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_ALLOC,
+ DDI_PROP_DONTPASS, "msi-address-ranges", (caddr_t)&valuep, &length)
+ != DDI_PROP_SUCCESS)
return (DDI_FAILURE);
- }
-
- msi_state_p->msi_addr32 = mem_answer;
- msi_state_p->msi_addr32_len = mem_alen;
-
- DBG(DBG_MSIQ, dip, "px_msi_getprops: 32 Addr 0x%llx\n",
- msi_state_p->msi_addr32);
- /*
- * Reserve PCI MEM 64 resources to perform 64 bit MSI transactions.
- *
- * NOTE:
- *
- * Currently OBP do not export any "available" property or range in
- * the MEM64 space. Hence ndi_ra_alloc() request will return failure.
- * So, for time being ignore this failure.
- */
- bzero((caddr_t)&request, sizeof (ndi_ra_request_t));
- request.ra_flags = NDI_RA_ALLOC_BOUNDED;
- request.ra_boundbase = PX_MSI_4GIG_LIMIT + 1;
- request.ra_boundlen = PX_MSI_4GIG_LIMIT;
- request.ra_len = PX_MSI_ADDR_LEN;
- request.ra_align_mask = 0;
-
- if (ndi_ra_alloc(dip, &request, &mem_answer, &mem_alen,
- NDI_RA_TYPE_MEM, NDI_RA_PASS) != NDI_SUCCESS) {
- DBG(DBG_MSIQ, dip, "px_msi_getprops: Failed to allocate "
- "64KB mem\n");
-
- return (DDI_SUCCESS);
- }
+ msi_addr_hi = ((px_msi_address_ranges_t *)valuep)->msi_addr32_hi;
+ msi_addr_lo = ((px_msi_address_ranges_t *)valuep)->msi_addr32_lo;
+ msi_state_p->msi_addr32 = (msi_addr_hi << 32) | msi_addr_lo;
+ msi_state_p->msi_addr32_len =
+ ((px_msi_address_ranges_t *)valuep)->msi_addr32_len;
- msi_state_p->msi_addr64 = mem_answer;
- msi_state_p->msi_addr64_len = mem_alen;
+ msi_addr_hi = ((px_msi_address_ranges_t *)valuep)->msi_addr64_hi;
+ msi_addr_lo = ((px_msi_address_ranges_t *)valuep)->msi_addr64_lo;
+ msi_state_p->msi_addr64 = (msi_addr_hi << 32) | msi_addr_lo;
+ msi_state_p->msi_addr64_len =
+ ((px_msi_address_ranges_t *)valuep)->msi_addr64_len;
- DBG(DBG_MSIQ, dip, "px_msi_getprops: 64 Addr 0x%llx\n",
- msi_state_p->msi_addr64);
+ DBG(DBG_MSIQ, dip, "msi_addr32=0x%llx\n", msi_state_p->msi_addr32);
+ DBG(DBG_MSIQ, dip, "msi_addr64=0x%llx\n", msi_state_p->msi_addr64);
+ kmem_free(valuep, (size_t)length);
return (DDI_SUCCESS);
}