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-rw-r--r--usr/src/uts/common/krtld/reloc.h6
-rw-r--r--usr/src/uts/common/sys/fm/protocol.h11
-rw-r--r--usr/src/uts/i86pc/os/cpuid_subr.c66
-rw-r--r--usr/src/uts/intel/ia32/sys/Makefile6
-rw-r--r--usr/src/uts/intel/ia32/sys/kdi_regs.h73
-rw-r--r--usr/src/uts/intel/ia32/sys/privmregs.h67
-rw-r--r--usr/src/uts/intel/io/amdf17nbdf/amdf17nbdf.c31
-rw-r--r--usr/src/uts/intel/os/driver_aliases5
-rw-r--r--usr/src/uts/intel/sys/x86_archext.h18
-rw-r--r--usr/src/uts/sparc/krtld/kobj_reloc.c13
10 files changed, 279 insertions, 17 deletions
diff --git a/usr/src/uts/common/krtld/reloc.h b/usr/src/uts/common/krtld/reloc.h
index 4f0c576203..c269cf41bd 100644
--- a/usr/src/uts/common/krtld/reloc.h
+++ b/usr/src/uts/common/krtld/reloc.h
@@ -256,7 +256,7 @@ extern const char *conv_reloc_SPARC_type(Word);
_kobj_printf(ops, MSG_REL_PREGEN, CONV_RELOC_TYPE((rtype))); \
_kobj_printf(ops, MSG_REL_FILE, (file)); \
_kobj_printf(ops, MSG_REL_SYM, ((sym) ? (sym) : MSG_STR_UNKNOWN)); \
- _kobj_printf(ops, MSG_REL_NONALIGN, EC_OFF((off)))
+ _kobj_printf(ops, MSG_REL_NONALIGN, (u_longlong_t)EC_OFF((off)))
#define REL_ERR_UNNOBITS(lml, file, sym, rtype, nbits) \
_kobj_printf(ops, MSG_REL_PREGEN, CONV_RELOC_TYPE((rtype))); \
@@ -268,9 +268,9 @@ extern const char *conv_reloc_SPARC_type(Word);
_kobj_printf(ops, MSG_REL_PREGEN, CONV_RELOC_TYPE((rtype))); \
_kobj_printf(ops, MSG_REL_FILE, (file)); \
_kobj_printf(ops, MSG_REL_SYM, ((sym) ? (sym) : MSG_STR_UNKNOWN)); \
- _kobj_printf(ops, MSG_REL_VALUE, EC_XWORD((uvalue))); \
+ _kobj_printf(ops, MSG_REL_VALUE, (u_longlong_t)EC_XWORD((uvalue))); \
_kobj_printf(ops, MSG_REL_LOSEBITS, (int)(nbits)); \
- _kobj_printf(ops, MSG_REL_OFFSET, EC_NATPTR((off)))
+ _kobj_printf(ops, MSG_REL_OFFSET, (u_longlong_t)EC_NATPTR((off)))
#define REL_ERR_NOFIT(lml, file, sym, rtype, uvalue) \
_kobj_printf(ops, MSG_REL_PREGEN, CONV_RELOC_TYPE((rtype))); \
diff --git a/usr/src/uts/common/sys/fm/protocol.h b/usr/src/uts/common/sys/fm/protocol.h
index 5eca760dad..e0140bb0fb 100644
--- a/usr/src/uts/common/sys/fm/protocol.h
+++ b/usr/src/uts/common/sys/fm/protocol.h
@@ -21,6 +21,7 @@
/*
* Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2020 Joyent, Inc.
*/
#ifndef _SYS_FM_PROTOCOL_H
@@ -200,6 +201,7 @@ extern "C" {
#define FM_FMRI_SCHEME_LEGACY "legacy-hc"
#define FM_FMRI_SCHEME_ZFS "zfs"
#define FM_FMRI_SCHEME_SW "sw"
+#define FM_FMRI_SCHEME_PATH "path"
/* Scheme versions */
#define FMD_SCHEME_VERSION0 0
@@ -225,6 +227,8 @@ extern "C" {
#define FM_ZFS_SCHEME_VERSION ZFS_SCHEME_VERSION0
#define SW_SCHEME_VERSION0 0
#define FM_SW_SCHEME_VERSION SW_SCHEME_VERSION0
+#define PATH_SCHEME_VERSION0 0
+#define FM_PATH_SCHEME_VERSION PATH_SCHEME_VERSION0
/* hc scheme member names */
#define FM_FMRI_HC_SERIAL_ID "serial"
@@ -328,6 +332,13 @@ extern "C" {
#define FM_FMRI_SW_CTXT_CTID "ctid"
#define FM_FMRI_SW_CTXT_STACK "stack"
+/* path scheme member names */
+#define FM_FMRI_PATH_VERSION "path-scheme-version"
+#define FM_FMRI_PATH "path"
+#define FM_FMRI_PATH_NAME "path-name"
+#define FM_FMRI_PATH_INST "path-instance"
+#define FM_FMRI_PATH_DIGRAPH_SCHEME "path-digraph-scheme"
+
extern nv_alloc_t *fm_nva_xcreate(char *, size_t);
extern void fm_nva_xdestroy(nv_alloc_t *);
diff --git a/usr/src/uts/i86pc/os/cpuid_subr.c b/usr/src/uts/i86pc/os/cpuid_subr.c
index c4230f6e07..6343051ef2 100644
--- a/usr/src/uts/i86pc/os/cpuid_subr.c
+++ b/usr/src/uts/i86pc/os/cpuid_subr.c
@@ -33,7 +33,7 @@
/*
* Copyright 2012 Jens Elkner <jel+illumos@cs.uni-magdeburg.de>
* Copyright 2012 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
- * Copyright 2018, Joyent, Inc.
+ * Copyright 2019 Joyent, Inc.
*/
/*
@@ -82,10 +82,13 @@
* 11 for family 0x16, models 00 - 0f
* 12 for family 0x16, models 30 - 3f
* 13 for family 0x17, models 00 - 0f
+ * 14 for family 0x17, models 10 - 1f
+ * 15 for family 0x17, models 30 - 3f
+ * 16 for family 0x17, models 70 - 7f
* Second index by (model & 0x3) for family 0fh,
* CPUID pkg bits (Fn8000_0001_EBX[31:28]) for later families.
*/
-static uint32_t amd_skts[14][8] = {
+static uint32_t amd_skts[17][8] = {
/*
* Family 0xf revisions B through E
*/
@@ -280,7 +283,7 @@ static uint32_t amd_skts[14][8] = {
},
/*
- * Family 0x17 models 00-0f
+ * Family 0x17 models 00-0f (Zen 1 - Naples, Ryzen)
*/
#define A_SKTS_13 13
{
@@ -294,6 +297,50 @@ static uint32_t amd_skts[14][8] = {
X86_SOCKET_SP3R2 /* 0b111 */
},
+ /*
+ * Family 0x17 models 10-1f (Zen 1 - APU: Raven Ridge)
+ */
+#define A_SKTS_14 14
+ {
+ X86_SOCKET_FP5, /* 0b000 */
+ X86_SOCKET_UNKNOWN, /* 0b001 */
+ X86_SOCKET_AM4, /* 0b010 */
+ X86_SOCKET_UNKNOWN, /* 0b011 */
+ X86_SOCKET_UNKNOWN, /* 0b100 */
+ X86_SOCKET_UNKNOWN, /* 0b101 */
+ X86_SOCKET_UNKNOWN, /* 0b110 */
+ X86_SOCKET_UNKNOWN /* 0b111 */
+ },
+
+ /*
+ * Family 0x17 models 30-3f (Zen 2 - Rome)
+ */
+#define A_SKTS_15 15
+ {
+ X86_SOCKET_UNKNOWN, /* 0b000 */
+ X86_SOCKET_UNKNOWN, /* 0b001 */
+ X86_SOCKET_UNKNOWN, /* 0b010 */
+ X86_SOCKET_UNKNOWN, /* 0b011 */
+ X86_SOCKET_SP3, /* 0b100 */
+ X86_SOCKET_UNKNOWN, /* 0b101 */
+ X86_SOCKET_UNKNOWN, /* 0b110 */
+ X86_SOCKET_SP3R2 /* 0b111 */
+ },
+
+ /*
+ * Family 0x17 models 70-7f (Zen 2 - Matisse)
+ */
+#define A_SKTS_16 16
+ {
+ X86_SOCKET_UNKNOWN, /* 0b000 */
+ X86_SOCKET_UNKNOWN, /* 0b001 */
+ X86_SOCKET_AM4, /* 0b010 */
+ X86_SOCKET_UNKNOWN, /* 0b011 */
+ X86_SOCKET_UNKNOWN, /* 0b100 */
+ X86_SOCKET_UNKNOWN, /* 0b101 */
+ X86_SOCKET_UNKNOWN, /* 0b110 */
+ X86_SOCKET_UNKNOWN /* 0b111 */
+ },
};
struct amd_sktmap_s {
@@ -332,6 +379,7 @@ static struct amd_sktmap_s amd_sktmap[X86_NUM_SOCKETS_AMD + 1] = {
{ X86_SOCKET_FT3B, "FT3b" },
{ X86_SOCKET_SP3, "SP3" },
{ X86_SOCKET_SP3R2, "SP3r2" },
+ { X86_SOCKET_FP5, "FP5" },
{ X86_SOCKET_UNKNOWN, "Unknown" }
};
@@ -487,6 +535,18 @@ static const struct amd_rev_mapent {
A_SKTS_13 },
{ 0x17, 0x01, 0x01, 0x1, 0x1, X86_CHIPREV_AMD_17_PiR_B2, "PiR-B2",
A_SKTS_13 },
+
+ { 0x17, 0x11, 0x11, 0x0, 0x0, X86_CHIPREV_AMD_17_RV_B0, "RV-B0",
+ A_SKTS_14 },
+ { 0x17, 0x11, 0x11, 0x1, 0x1, X86_CHIPREV_AMD_17_RV_B1, "RV-B1",
+ A_SKTS_14 },
+ { 0x17, 0x18, 0x18, 0x1, 0x1, X86_CHIPREV_AMD_17_PCO_B1, "PCO-B1",
+ A_SKTS_14 },
+
+ { 0x17, 0x30, 0x30, 0x0, 0x0, X86_CHIPREV_AMD_17_SSP_A0, "SSP-A0",
+ A_SKTS_15 },
+ { 0x17, 0x31, 0x31, 0x0, 0x0, X86_CHIPREV_AMD_17_SSP_B0, "SSP-B0",
+ A_SKTS_15 },
};
static void
diff --git a/usr/src/uts/intel/ia32/sys/Makefile b/usr/src/uts/intel/ia32/sys/Makefile
index 5f4708436f..0ef2320b16 100644
--- a/usr/src/uts/intel/ia32/sys/Makefile
+++ b/usr/src/uts/intel/ia32/sys/Makefile
@@ -19,17 +19,21 @@
# CDDL HEADER END
#
#
+#pragma ident "%Z%%M% %I% %E% SMI"
+#
# Copyright 2007 Sun Microsystems, Inc. All rights reserved.
# Use is subject to license terms.
#
-# Copyright 2020 Joyent, Inc.
+# uts/intel/ia32/sys/Makefile
#
# include global definitions
include ../../../../Makefile.master
HDRS= \
asm_linkage.h \
+ kdi_regs.h \
machtypes.h \
+ privmregs.h \
privregs.h \
psw.h \
pte.h \
diff --git a/usr/src/uts/intel/ia32/sys/kdi_regs.h b/usr/src/uts/intel/ia32/sys/kdi_regs.h
new file mode 100644
index 0000000000..e87948189a
--- /dev/null
+++ b/usr/src/uts/intel/ia32/sys/kdi_regs.h
@@ -0,0 +1,73 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
+ * Use is subject to license terms.
+ *
+ * Copyright 2018 Joyent, Inc.
+ */
+
+#ifndef _IA32_SYS_KDI_REGS_H
+#define _IA32_SYS_KDI_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define KDIREG_NGREG 21
+
+/*
+ * %ss appears in a different place than a typical struct regs, since the
+ * machine won't save %ss on a trap entry from the same privilege level.
+ */
+
+#define KDIREG_SAVFP 0
+#define KDIREG_SAVPC 1
+#define KDIREG_SS 2
+#define KDIREG_GS 3
+#define KDIREG_FS 4
+#define KDIREG_ES 5
+#define KDIREG_DS 6
+#define KDIREG_EDI 7
+#define KDIREG_ESI 8
+#define KDIREG_EBP 9
+#define KDIREG_ESP 10
+#define KDIREG_EBX 11
+#define KDIREG_EDX 12
+#define KDIREG_ECX 13
+#define KDIREG_EAX 14
+#define KDIREG_TRAPNO 15
+#define KDIREG_ERR 16
+#define KDIREG_EIP 17
+#define KDIREG_CS 18
+#define KDIREG_EFLAGS 19
+#define KDIREG_UESP 20
+
+#define KDIREG_PC KDIREG_EIP
+#define KDIREG_SP KDIREG_ESP
+#define KDIREG_FP KDIREG_EBP
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _IA32_SYS_KDI_REGS_H */
diff --git a/usr/src/uts/intel/ia32/sys/privmregs.h b/usr/src/uts/intel/ia32/sys/privmregs.h
new file mode 100644
index 0000000000..87d9b74bfe
--- /dev/null
+++ b/usr/src/uts/intel/ia32/sys/privmregs.h
@@ -0,0 +1,67 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _IA32_SYS_PRIVMREGS_H
+#define _IA32_SYS_PRIVMREGS_H
+
+#pragma ident "%Z%%M% %I% %E% SMI"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(__i386)
+#error "non-i386 code depends on i386 privileged header!"
+#endif
+
+#ifndef _ASM
+
+#define PM_GREGS (1 << 0)
+#define PM_CRREGS (1 << 1)
+#define PM_DRREGS (1 << 2)
+
+/*
+ * This structure is intended to represent a complete machine state for a CPU,
+ * when that information is available. It is only for use internally between
+ * KMDB and the kernel, or within MDB. Note that this isn't yet finished.
+ */
+typedef struct privmregs {
+ ulong_t pm_flags;
+ /* general registers */
+ struct regs pm_gregs;
+ /* cr0-8 */
+ ulong_t pm_cr[8];
+ /* dr0-8 */
+ ulong_t pm_dr[8];
+} privmregs_t;
+
+#endif /* !_ASM */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !_IA32_SYS_PRIVMREGS_H */
diff --git a/usr/src/uts/intel/io/amdf17nbdf/amdf17nbdf.c b/usr/src/uts/intel/io/amdf17nbdf/amdf17nbdf.c
index 11bddfa515..b1191f8f9e 100644
--- a/usr/src/uts/intel/io/amdf17nbdf/amdf17nbdf.c
+++ b/usr/src/uts/intel/io/amdf17nbdf/amdf17nbdf.c
@@ -75,9 +75,9 @@
* value in the corresponding data fabric's AMDF17_DF_CFG_ADDR_CTL.
*
* This means that we can map a northbridge to a data fabric device and a data
- * fabric device to a die. Because these are 1:1 mappings, there is a transitive
- * relationship and therefore we know which northbridge is associated with which
- * processor die. This is summarized in the following image:
+ * fabric device to a die. Because these are generally 1:1 mappings, there is a
+ * transitive relationship and therefore we know which northbridge is associated
+ * with which processor die. This is summarized in the following image:
*
* +-------+ +----------------------------+ +--------------+
* | Die 0 | ---> | Data Fabric PCI BDF 0/18/0 |-------> | Northbridge |
@@ -93,6 +93,17 @@
* of the data fabric accurately models hardware. All of the BDF values are in
* hex.
*
+ * Starting with the Rome generation of processors (Family 17h Model 30-3Fh),
+ * AMD has multiple northbridges that exist on a given die. All of these
+ * northbridges share the same data fabric and system management network port.
+ * From our perspective this means that some of the northbridge devices will be
+ * redundant and that we will no longer have a 1:1 mapping between the
+ * northbridge and the data fabric devices. Every data fabric will have a
+ * northbridge, but not every northbridge will have a data fabric device mapped.
+ * Because we're always trying to map from a die to a northbridge and not the
+ * reverse, the fact that there are extra northbridge devices hanging around
+ * that we don't know about shouldn't be a problem.
+ *
* -------------------------------
* Attach and Detach Complications
* -------------------------------
@@ -246,6 +257,20 @@ static const amdf17nbdf_table_t amdf17nbdf_dev_map[] = {
/* Family 17h Ryzen, Epyc Models 00h-0fh (Zen uarch) */
{ 0x1450, AMD_NBDF_TYPE_NORTHBRIDGE },
{ 0x1460, AMD_NBDF_TYPE_DATA_FABRIC },
+ /* Family 17h Raven Ridge Models 10h-1fh (Zen uarch) */
+ { 0x15d0, AMD_NBDF_TYPE_NORTHBRIDGE },
+ { 0x15e8, AMD_NBDF_TYPE_DATA_FABRIC },
+ /* Family 17h Epyc Models 30h-3fh (Zen 2 uarch) */
+ { 0x1480, AMD_NBDF_TYPE_NORTHBRIDGE },
+ { 0x1490, AMD_NBDF_TYPE_DATA_FABRIC },
+ /*
+ * Family 17h Ryzen Models 70-7fh (Zen 2 uarch)
+ *
+ * While this family has its own PCI ID for the data fabric device, it
+ * shares the same northbridge ID as the Zen 2 EPYC models 30-3f --
+ * 0x1480.
+ */
+ { 0x1440, AMD_NBDF_TYPE_DATA_FABRIC },
{ PCI_EINVAL16 }
};
diff --git a/usr/src/uts/intel/os/driver_aliases b/usr/src/uts/intel/os/driver_aliases
index fdcac2292b..8f4c2f1bf2 100644
--- a/usr/src/uts/intel/os/driver_aliases
+++ b/usr/src/uts/intel/os/driver_aliases
@@ -67,8 +67,13 @@ amd64_gart "pci1022,1103"
amd8111s "pci1022,7462"
amd_iommu "pci1002,5a23"
amd_iommu "pci1022,11ff"
+amdf17nbdf "pci1022,1440,p"
amdf17nbdf "pci1022,1450,p"
amdf17nbdf "pci1022,1460,p"
+amdf17nbdf "pci1022,1480,p"
+amdf17nbdf "pci1022,1490,p"
+amdf17nbdf "pci1022,15d0,p"
+amdf17nbdf "pci1022,15e8,p"
amdnbtemp "pci1022,1203,p"
amdnbtemp "pci1022,1303,p"
amdnbtemp "pci1022,1403,p"
diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h
index bbf8ed2c57..d0efa8c384 100644
--- a/usr/src/uts/intel/sys/x86_archext.h
+++ b/usr/src/uts/intel/sys/x86_archext.h
@@ -944,6 +944,21 @@ extern "C" {
#define X86_CHIPREV_AMD_17_PiR_B2 \
_X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0003)
+#define X86_CHIPREV_AMD_17_RV_B0 \
+ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0004)
+
+#define X86_CHIPREV_AMD_17_RV_B1 \
+ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0005)
+
+#define X86_CHIPREV_AMD_17_PCO_B1 \
+ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0006)
+
+#define X86_CHIPREV_AMD_17_SSP_A0 \
+ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0007)
+
+#define X86_CHIPREV_AMD_17_SSP_B0 \
+ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x17, 0x0008)
+
/*
* Various socket/package types, extended as the need to distinguish
* a new type arises. The top 8 byte identfies the vendor and the
@@ -998,7 +1013,8 @@ extern "C" {
#define X86_SOCKET_FT3B _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x1e)
#define X86_SOCKET_SP3 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x1f)
#define X86_SOCKET_SP3R2 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x20)
-#define X86_NUM_SOCKETS_AMD 0x21
+#define X86_SOCKET_FP5 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x21)
+#define X86_NUM_SOCKETS_AMD 0x22
/*
diff --git a/usr/src/uts/sparc/krtld/kobj_reloc.c b/usr/src/uts/sparc/krtld/kobj_reloc.c
index cc7df40d7c..2fea631bd1 100644
--- a/usr/src/uts/sparc/krtld/kobj_reloc.c
+++ b/usr/src/uts/sparc/krtld/kobj_reloc.c
@@ -207,7 +207,7 @@ do_relocate(struct module *mp, char *reltbl, int nreloc, int relocsize,
if ((rtype > R_SPARC_NUM) || IS_TLS_INS(rtype)) {
_kobj_printf(ops, "krtld: invalid relocation type %d",
rtype);
- _kobj_printf(ops, " at 0x%llx:", off);
+ _kobj_printf(ops, " at 0x%llx:", (u_longlong_t)off);
_kobj_printf(ops, " file=%s\n", mp->filename);
err = 1;
continue;
@@ -223,8 +223,8 @@ do_relocate(struct module *mp, char *reltbl, int nreloc, int relocsize,
(mp->symtbl+(stndx * mp->symhdr->sh_entsize));
_kobj_printf(ops, "krtld:\t%s",
conv_reloc_SPARC_type(rtype));
- _kobj_printf(ops, "\t0x%8llx", off);
- _kobj_printf(ops, " 0x%8llx", addend);
+ _kobj_printf(ops, "\t0x%8llx", (u_longlong_t)off);
+ _kobj_printf(ops, " 0x%8llx", (u_longlong_t)addend);
_kobj_printf(ops, " %s\n",
(const char *)mp->strings + symp->st_name);
}
@@ -309,8 +309,9 @@ do_relocate(struct module *mp, char *reltbl, int nreloc, int relocsize,
#ifdef KOBJ_DEBUG
if (kobj_debug & D_RELOCATIONS) {
- _kobj_printf(ops, "krtld:\t\t\t\t0x%8llx", off);
- _kobj_printf(ops, " 0x%8llx\n", value);
+ _kobj_printf(ops, "krtld:\t\t\t\t0x%8llx",
+ (u_longlong_t)off);
+ _kobj_printf(ops, " 0x%8llx\n", (u_longlong_t)value);
}
#endif
if (do_reloc_krtld(rtype, (unsigned char *)off, (Xword *)&value,
@@ -353,7 +354,7 @@ do_relocations(struct module *mp)
}
if (rshp->sh_info >= mp->hdr.e_shnum) {
_kobj_printf(ops, "do_relocations: %s ", mp->filename);
- _kobj_printf(ops, " sh_info out of range %lld\n", shn);
+ _kobj_printf(ops, " sh_info out of range %d\n", shn);
goto bad;
}
nreloc = rshp->sh_size / rshp->sh_entsize;
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-26 09:56:35 +0000