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path: root/usr/src/uts/intel/pcbe/opteron_pcbe.c
AgeCommit message (Expand)AuthorFilesLines
2022-08-2414836 extend AMD chiprev mechanism to identify core revsKeith M Wesolowski1-3/+3
2022-02-0114091 Add AMD Cezanne infoRobert Mustacchi1-1/+2
2021-08-0213972 Want support for Zen 3 Ryzen CPC EventsRobert Mustacchi1-2/+5
2021-05-0613688 Want support for AMD Zen 3 Milan CPC EventsRobert Mustacchi1-3/+24
2020-12-2913339 Add support for Hygon Dhyana Family 18h processorPu Wen1-3/+7
2020-04-0712452 Want support for AMD Zen 2 CPC EventsRobert Mustacchi1-8/+30
2019-05-0910896 Want support for AMD Zen CPC eventsRobert Mustacchi1-84/+186
2009-12-226764832 Provide user-level processor groups observabilityAlexander Kolbasov1-20/+26
2009-12-226912153 some components of ON are not ss12u1 lint cleanSurya Prakki1-3/+3
2009-04-256672329 New performance counter events in Griffin processorKuriakose Kuruvilla1-213/+227
2008-09-19PSARC 2008/334 CPU Performance Counter Generic Event NamesJonathan Haslam1-10/+149
2008-08-016686448 Remove SCCS keyword %I% used in PCBE driverskk2085211-2/+2
2007-10-186617261 Nevada Opteron performance counter names are inconsistent with Solari...jhaslam1-2/+2
2007-10-126567332 Support for CPC on greyhound/barcelona processorsksadhukh1-61/+163
2007-09-18PSARC 2006/260 Solaris on Xenjohnlev1-8/+8
2006-10-276242048 Several events exported by Opteron pcbe need modifyingjhaslam1-90/+131
2006-09-225033325 x86 CPC backends should accept raw event codesrab1-2/+15
2006-08-166458883 Some Opteron hardware counters not completely implemented even after ...cwb1-5/+13
2005-11-186352844 cpustat always returns same value for all events in single event spec...kucharsk1-1/+1
2005-10-276311933 rdmsr/wrmsr do not need to set/pass values via memory pointerskucharsk1-9/+7
2005-06-14OpenSolaris Launchstevel@tonic-gate1-0/+546
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