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path: root/usr/src/uts/intel/sys/x86_archext.h
AgeCommit message (Expand)AuthorFilesLines
2020-11-0213236 Want Zen 3 socket informationRobert Mustacchi1-1/+2
2020-11-0213238 vaes, vpclmulqdq should be plumbed through isainfoRobert Mustacchi1-1/+3
2020-10-0913198 Add AMD Dali, Renoir, and Banded Kestrel socket infoRobert Mustacchi1-1/+5
2020-07-3012999 MSR_AMD_DE_CFG is twice definedPatrick Mooney1-7/+0
2020-04-2812528 expand hypervisor management APIPatrick Mooney1-0/+37
2020-04-0612467 Add support for AMD PPINRobert Mustacchi1-5/+15
2020-04-0311975 Update AMD CPUID for F17 M10,30,70Robert Mustacchi1-1/+17
2020-01-1511967 need TAA mitigationJohn Levon1-2/+14
2019-10-2211787 Kernel needs to be built with retpolinesRobert Mustacchi1-10/+15
2019-06-2211184 Want CPU Temperature SensorsRobert Mustacchi1-11/+105
2019-05-1710953 Need mitigations for MDSRobert Mustacchi1-4/+18
2019-05-1510924 Need mitigation of L1TF (CVE-2018-3646)John Levon1-0/+2
2019-05-0910896 Want support for AMD Zen CPC eventsRobert Mustacchi1-1/+6
2019-05-0410893 Need support for new Cascade Lake InstructionsRobert Mustacchi1-2/+3
2019-01-2310263 Update cpuid detection for new EPYC Socket formatRobert Mustacchi1-22/+67
2019-01-2110212 Autogenerate Intel pcbe values from perfmon dataRobert Mustacchi1-7/+49
2019-01-1810226 Need support for new EPYC ISA extensionsRobert Mustacchi1-3/+67
2019-01-1110208 Add x86 features for L1TFJohn Levon1-7/+14
2019-01-109747 Implement CPU autoreplace based on Intel PPINRobert Mustacchi1-1/+26
2018-09-269792 support bhyve as a platformHans Rosenfeld1-1/+4
2018-09-269827 clean up some space-tab sequencesHans Rosenfeld1-4/+4
2018-09-119745 rescan cpuid after ucode updatesRobert Mustacchi1-2/+47
2018-08-139723 provide support for VMM's GDT handlingJohn Levon1-0/+4
2018-06-199596 Initial xsave xstate_bv should not include all featuresRobert Mustacchi1-0/+11
2018-06-159600 LDT still not happy under KPTIJohn Levon1-2/+2
2018-04-108956 Implement KPTIJohn Levon1-1/+9
2018-04-109215 update CPUID definesJohn Levon1-5/+14
2018-03-109251 p123_pcbe is useless and can be removedYuri Pankov1-21/+2
2017-08-168534 Want AVX-512 SupportJerry Jelinek1-4/+79
2017-02-277805 want faster clock_gettimePatrick Mooney1-9/+1
2016-08-047204 Want broadwell rdseed and adx supportRobert Mustacchi1-3/+7
2016-03-306789 Want SMAP supportRobert Mustacchi1-1/+3
2015-08-176116 remove unused FMT_CPUID_*Josef 'Jeff' Sipek1-28/+0
2015-05-155890 Enable Intel SMEP support when availableRobert Mustacchi1-2/+4
2015-03-275755 want support for Intel FMA instrsRobert Mustacchi1-3/+17
2014-04-294806 define x2apic feature flagJosef 'Jeff' Sipek1-3/+6
2014-01-134444 remove unused cpuid-related globals Reviewed by: Garrett D'Amore <garret...Josef 'Jeff' Sipek1-3/+0
2013-06-103506 Use "hypervisor" CPUID bit to detect hypervisor environmentYuri Pankov1-6/+29
2012-12-213408 detect socket type of newer AMD CPUsJens Elkner1-4/+42
2012-12-203414 Need a new word of AT_SUN_HWCAP bitsRobert Mustacchi1-5/+10
2012-05-032650 AMD family 0x15 PG supportHans Rosenfeld1-1/+6
2011-10-311687 Race in determine_platform / get_hwenv causes multi-CPU VM hang at bootMatt Amdur1-0/+4
2011-08-111347 isainfo should indicate presence of vmx/svm supportBryan Cantrill1-1/+6
2010-08-166970888 panic BAD TRAP: type=d (#gp General protection) due to incorrect use ...Kuriakose Kuruvilla1-2/+3
2010-08-166958308 XSAVE/XRSTOR mechanism to save and restore processor stateKuriakose Kuruvilla1-0/+29
2010-08-056932990 Support for TSC deadline timerKrishnendu Sadhukhan - Sun Microsystems1-1/+7
2010-07-146812663 Running out of bits in x86_featureKuriakose Kuruvilla1-44/+46
2010-01-256795177 AMD NorthBridge watchdog ereport does not include MC4_ADDR valueSrihari Venkatesan1-2/+7
2009-12-226764832 Provide user-level processor groups observabilityAlexander Kolbasov1-0/+1
2009-11-066887944 support for IA32_ENERGY_PERF_BIAS MSRaubrey.li@intel.com1-0/+6
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