1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
|
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
*/
#include <sys/asm_linkage.h>
#include <sys/x86_archext.h>
#include <sys/controlregs.h>
#if defined(__lint)
#include <sys/types.h>
uint32_t
bignum_use_sse2()
{ return (0); }
/* Not to be called by C code */
/* ARGSUSED */
uint32_t
big_mul_set_vec_sse2_r()
{ return (0); }
/* Not to be called by C code */
/* ARGSUSED */
uint32_t
big_mul_add_vec_sse2_r()
{ return (0); }
/* ARGSUSED */
uint32_t
big_mul_set_vec_sse2(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
/* ARGSUSED */
uint32_t
big_mul_add_vec_sse2(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
/* ARGSUSED */
void
big_mul_vec_sse2(uint32_t *r, uint32_t *a, int alen, uint32_t *b, int blen)
{}
/* ARGSUSED */
void
big_sqr_vec_sse2(uint32_t *r, uint32_t *a, int len)
{}
#if defined(MMX_MANAGE)
/* ARGSUSED */
uint32_t
big_mul_set_vec_sse2_nsv(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
/* ARGSUSED */
uint32_t
big_mul_add_vec_sse2_nsv(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
/* Not to be called by C code */
/* ARGSUSED */
void
big_sqr_vec_sse2_fc(uint32_t *r, uint32_t *a, int len)
{}
#endif /* MMX_MANAGE */
/*
* UMUL
*
*/
/* ARGSUSED */
uint32_t
big_mul_set_vec_umul(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
/* ARGSUSED */
uint32_t
big_mul_add_vec_umul(uint32_t *r, uint32_t *a, int len, uint32_t digit)
{ return (0); }
#else /* __lint */
#if defined(MMX_MANAGE)
#if defined(_KERNEL)
#define KPREEMPT_DISABLE call kpr_disable
#define KPREEMPT_ENABLE call kpr_enable
#define TEST_TS(reg) \
movl %cr0, reg; \
clts; \
testl $CR0_TS, reg
#else /* _KERNEL */
#define KPREEMPT_DISABLE
#define KPREEMPT_ENABLE
#define TEST_TS(reg) \
movl $0, reg; \
testl $CR0_TS, reg
#endif /* _KERNEL */
#define MMX_SIZE 8
#define MMX_ALIGN 8
#define SAVE_MMX_PROLOG(sreg, nreg) \
subl $_MUL(MMX_SIZE, nreg + MMX_ALIGN), %esp; \
movl %esp, sreg; \
addl $MMX_ALIGN, sreg; \
andl $-1![MMX_ALIGN-1], sreg;
#define RSTOR_MMX_EPILOG(nreg) \
addl $_MUL(MMX_SIZE, nreg + MMX_ALIGN), %esp;
#define SAVE_MMX_0TO4(sreg) \
SAVE_MMX_PROLOG(sreg, 5); \
movq %mm0, 0(sreg); \
movq %mm1, 8(sreg); \
movq %mm2, 16(sreg); \
movq %mm3, 24(sreg); \
movq %mm4, 32(sreg)
#define RSTOR_MMX_0TO4(sreg) \
movq 0(sreg), %mm0; \
movq 8(sreg), %mm1; \
movq 16(sreg), %mm2; \
movq 24(sreg), %mm3; \
movq 32(sreg), %mm4; \
RSTOR_MMX_EPILOG(5)
#endif /* MMX_MANAGE */
/ Note: this file contains implementations for
/ big_mul_set_vec()
/ big_mul_add_vec()
/ big_mul_vec()
/ big_sqr_vec()
/ One set of implementations is for SSE2-capable models.
/ The other uses no MMX, SSE, or SSE2 instructions, only
/ the x86 32 X 32 -> 64 unsigned multiply instruction, MUL.
/
/ The code for the implementations is grouped by SSE2 vs UMUL,
/ rather than grouping pairs of implementations for each function.
/ This is because the bignum implementation gets "imprinted"
/ on the correct implementation, at the time of first use,
/ so none of the code for the other implementations is ever
/ executed. So, it is a no-brainer to layout the code to minimize
/ the "footprint" of executed code.
/ Can we use SSE2 instructions? Return value is non-zero
/ if we can.
/
/ Note:
/ Using the cpuid instruction directly would work equally
/ well in userland and in the kernel, but we do not use the
/ cpuid instruction in the kernel, we use x86_featureset,
/ instead. This means we honor any decisions the kernel
/ startup code may have made in setting this variable,
/ including disabling SSE2. It might even be a good idea
/ to honor this kind of setting in userland, as well, but
/ the variable, x86_featureset is not readily available to
/ userland processes.
/
/ uint32_t
/ bignum_use_sse2()
ENTRY(bignum_use_sse2)
#if defined(_KERNEL)
xor %eax, %eax
bt $X86FSET_SSE2, x86_featureset
adc %eax, %eax
#else /* _KERNEL */
pushl %ebx
movl $1, %eax / Get feature information
cpuid
movl %edx, %eax / set return value
popl %ebx
andl $CPUID_INTC_EDX_SSE2, %eax
#endif /* _KERNEL */
ret
SET_SIZE(bignum_use_sse2)
/ ------------------------------------------------------------------------
/ SSE2 Implementations
/ ------------------------------------------------------------------------
/ r = a * digit, r and a are vectors of length len
/ returns the carry digit
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ uint32_t
/ big_mul_set_vec_sse2_r(uint32_t *r, uint32_t *a, int len, uint32_t digit)
/
/ r %edx
/ a %ebx
/ len %ecx
/ digit %mm3
/
/ Does not touch the following registers: %esi, %edi, %mm4
/
/ N.B.:
/ This is strictly for internal use.
/ The interface is very light-weight.
/ All parameters are passed in registers.
/ It does not conform to the SYSV x86 ABI.
/ So, don't even think about calling this function directly from C code.
/
/ The basic multiply digit loop is unrolled 8 times.
/ Each comment is preceded by an instance number.
/ Instructions that have been moved retain their original, "natural"
/ instance number. It should be easier this way to follow
/ the step-wise refinement process that went into constructing
/ the final code.
#define UNROLL 8
#define UNROLL32 32
ENTRY(big_mul_set_vec_sse2_r)
xorl %eax, %eax / if (len == 0) return (0);
testl %ecx, %ecx
jz .L17
pxor %mm0, %mm0 / cy = 0
.L15:
cmpl $UNROLL, %ecx
jl .L16
movd 0(%ebx), %mm1 / 1: mm1 = a[i]
pmuludq %mm3, %mm1 / 1: mm1 = digit * a[i]
paddq %mm1, %mm0 / 1: mm0 = digit * a[i] + cy;
movd 4(%ebx), %mm1 / 2: mm1 = a[i]
movd %mm0, 0(%edx) / 1: r[i] = product[31..0]
psrlq $32, %mm0 / 1: cy = product[63..32]
pmuludq %mm3, %mm1 / 2: mm1 = digit * a[i]
paddq %mm1, %mm0 / 2: mm0 = digit * a[i] + cy;
movd 8(%ebx), %mm1 / 3: mm1 = a[i]
movd %mm0, 4(%edx) / 2: r[i] = product[31..0]
psrlq $32, %mm0 / 2: cy = product[63..32]
pmuludq %mm3, %mm1 / 3: mm1 = digit * a[i]
paddq %mm1, %mm0 / 3: mm0 = digit * a[i] + cy;
movd 12(%ebx), %mm1 / 4: mm1 = a[i]
movd %mm0, 8(%edx) / 3: r[i] = product[31..0]
psrlq $32, %mm0 / 3: cy = product[63..32]
pmuludq %mm3, %mm1 / 4: mm1 = digit * a[i]
paddq %mm1, %mm0 / 4: mm0 = digit * a[i] + cy;
movd 16(%ebx), %mm1 / 5: mm1 = a[i]
movd %mm0, 12(%edx) / 4: r[i] = product[31..0]
psrlq $32, %mm0 / 4: cy = product[63..32]
pmuludq %mm3, %mm1 / 5: mm1 = digit * a[i]
paddq %mm1, %mm0 / 5: mm0 = digit * a[i] + cy;
movd 20(%ebx), %mm1 / 6: mm1 = a[i]
movd %mm0, 16(%edx) / 5: r[i] = product[31..0]
psrlq $32, %mm0 / 5: cy = product[63..32]
pmuludq %mm3, %mm1 / 6: mm1 = digit * a[i]
paddq %mm1, %mm0 / 6: mm0 = digit * a[i] + cy;
movd 24(%ebx), %mm1 / 7: mm1 = a[i]
movd %mm0, 20(%edx) / 6: r[i] = product[31..0]
psrlq $32, %mm0 / 6: cy = product[63..32]
pmuludq %mm3, %mm1 / 7: mm1 = digit * a[i]
paddq %mm1, %mm0 / 7: mm0 = digit * a[i] + cy;
movd 28(%ebx), %mm1 / 8: mm1 = a[i]
movd %mm0, 24(%edx) / 7: r[i] = product[31..0]
psrlq $32, %mm0 / 7: cy = product[63..32]
pmuludq %mm3, %mm1 / 8: mm1 = digit * a[i]
paddq %mm1, %mm0 / 8: mm0 = digit * a[i] + cy;
movd %mm0, 28(%edx) / 8: r[i] = product[31..0]
psrlq $32, %mm0 / 8: cy = product[63..32]
leal UNROLL32(%ebx), %ebx / a += UNROLL
leal UNROLL32(%edx), %edx / r += UNROLL
subl $UNROLL, %ecx / len -= UNROLL
jz .L17
jmp .L15
.L16:
movd 0(%ebx), %mm1 / 1: mm1 = a[i]
pmuludq %mm3, %mm1 / 1: mm1 = digit * a[i]
paddq %mm1, %mm0 / 1: mm0 = digit * a[i] + cy;
movd %mm0, 0(%edx) / 1: r[i] = product[31..0]
psrlq $32, %mm0 / 1: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 4(%ebx), %mm1 / 2: mm1 = a[i]
pmuludq %mm3, %mm1 / 2: mm1 = digit * a[i]
paddq %mm1, %mm0 / 2: mm0 = digit * a[i] + cy;
movd %mm0, 4(%edx) / 2: r[i] = product[31..0]
psrlq $32, %mm0 / 2: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 8(%ebx), %mm1 / 3: mm1 = a[i]
pmuludq %mm3, %mm1 / 3: mm1 = digit * a[i]
paddq %mm1, %mm0 / 3: mm0 = digit * a[i] + cy;
movd %mm0, 8(%edx) / 3: r[i] = product[31..0]
psrlq $32, %mm0 / 3: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 12(%ebx), %mm1 / 4: mm1 = a[i]
pmuludq %mm3, %mm1 / 4: mm1 = digit * a[i]
paddq %mm1, %mm0 / 4: mm0 = digit * a[i] + cy;
movd %mm0, 12(%edx) / 4: r[i] = product[31..0]
psrlq $32, %mm0 / 4: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 16(%ebx), %mm1 / 5: mm1 = a[i]
pmuludq %mm3, %mm1 / 5: mm1 = digit * a[i]
paddq %mm1, %mm0 / 5: mm0 = digit * a[i] + cy;
movd %mm0, 16(%edx) / 5: r[i] = product[31..0]
psrlq $32, %mm0 / 5: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 20(%ebx), %mm1 / 6: mm1 = a[i]
pmuludq %mm3, %mm1 / 6: mm1 = digit * a[i]
paddq %mm1, %mm0 / 6: mm0 = digit * a[i] + cy;
movd %mm0, 20(%edx) / 6: r[i] = product[31..0]
psrlq $32, %mm0 / 6: cy = product[63..32]
subl $1, %ecx
jz .L17
movd 24(%ebx), %mm1 / 7: mm1 = a[i]
pmuludq %mm3, %mm1 / 7: mm1 = digit * a[i]
paddq %mm1, %mm0 / 7: mm0 = digit * a[i] + cy;
movd %mm0, 24(%edx) / 7: r[i] = product[31..0]
psrlq $32, %mm0 / 7: cy = product[63..32]
.L17:
movd %mm0, %eax / return (cy)
/ no emms. caller is responsible for emms
ret
SET_SIZE(big_mul_set_vec_sse2_r)
/ r = a * digit, r and a are vectors of length len
/ returns the carry digit
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ r 8(%ebp) %edx
/ a 12(%ebp) %ebx
/ len 16(%ebp) %ecx
/ digit 20(%ebp) %mm3
/
/ In userland, there is just the one function, big_mul_set_vec_sse2().
/ But in the kernel, there are two variations:
/ 1. big_mul_set_vec_sse2() which does what is necessary to save and
/ restore state, if necessary, and to ensure that preemtion is
/ disabled.
/ 2. big_mul_set_vec_sse2_nsv() which just does the work;
/ it is the caller's responsibility to ensure that MMX state
/ does not need to be saved and restored and that preemption
/ is already disabled.
#if defined(MMX_MANAGE)
ENTRY(big_mul_set_vec_sse2)
pushl %ebp
movl %esp, %ebp
pushl %ebx
pushl %esi
KPREEMPT_DISABLE
TEST_TS(%ebx)
pushl %ebx
jnz .setvec_no_save
pushl %edi
SAVE_MMX_0TO4(%edi)
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_set_vec_sse2_r
movl %eax, %esi
RSTOR_MMX_0TO4(%edi)
popl %edi
jmp .setvec_rtn
.setvec_no_save:
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_set_vec_sse2_r
movl %eax, %esi
.setvec_rtn:
emms
popl %ebx
movl %ebx, %cr0
KPREEMPT_ENABLE
movl %esi, %eax
popl %esi
popl %ebx
leave
ret
SET_SIZE(big_mul_set_vec_sse2)
ENTRY(big_mul_set_vec_sse2_nsv)
pushl %ebp
movl %esp, %ebp
pushl %ebx
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_set_vec_sse2_r
popl %ebx
leave
ret
SET_SIZE(big_mul_set_vec_sse2_nsv)
#else /* !defined(MMX_MANAGE) */
/ r = a * digit, r and a are vectors of length len
/ returns the carry digit
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ r 8(%ebp) %edx
/ a 12(%ebp) %ebx
/ len 16(%ebp) %ecx
/ digit 20(%ebp) %mm3
ENTRY(big_mul_set_vec_sse2)
pushl %ebp
movl %esp, %ebp
pushl %ebx
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_set_vec_sse2_r
popl %ebx
emms
leave
ret
SET_SIZE(big_mul_set_vec_sse2)
#endif /* MMX_MANAGE */
/ r = r + a * digit, r and a are vectors of length len
/ returns the carry digit
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ uint32_t
/ big_mul_add_vec_sse2_r(uint32_t *r, uint32_t *a, int len, uint32_t digit)
/
/ r %edx
/ a %ebx
/ len %ecx
/ digit %mm3
/
/ N.B.:
/ This is strictly for internal use.
/ The interface is very light-weight.
/ All parameters are passed in registers.
/ It does not conform to the SYSV x86 ABI.
/ So, don't even think about calling this function directly from C code.
/
/ The basic multiply digit loop is unrolled 8 times.
/ Each comment is preceded by an instance number.
/ Instructions that have been moved retain their original, "natural"
/ instance number. It should be easier this way to follow
/ the step-wise refinement process that went into constructing
/ the final code.
ENTRY(big_mul_add_vec_sse2_r)
xorl %eax, %eax
testl %ecx, %ecx
jz .L27
pxor %mm0, %mm0 / cy = 0
.L25:
cmpl $UNROLL, %ecx
jl .L26
movd 0(%ebx), %mm1 / 1: mm1 = a[i]
movd 0(%edx), %mm2 / 1: mm2 = r[i]
pmuludq %mm3, %mm1 / 1: mm1 = digit * a[i]
paddq %mm1, %mm2 / 1: mm2 = digit * a[i] + r[i]
movd 4(%ebx), %mm1 / 2: mm1 = a[i]
paddq %mm2, %mm0 / 1: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 0(%edx) / 1: r[i] = product[31..0]
movd 4(%edx), %mm2 / 2: mm2 = r[i]
psrlq $32, %mm0 / 1: cy = product[63..32]
pmuludq %mm3, %mm1 / 2: mm1 = digit * a[i]
paddq %mm1, %mm2 / 2: mm2 = digit * a[i] + r[i]
movd 8(%ebx), %mm1 / 3: mm1 = a[i]
paddq %mm2, %mm0 / 2: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 4(%edx) / 2: r[i] = product[31..0]
movd 8(%edx), %mm2 / 3: mm2 = r[i]
psrlq $32, %mm0 / 2: cy = product[63..32]
pmuludq %mm3, %mm1 / 3: mm1 = digit * a[i]
paddq %mm1, %mm2 / 3: mm2 = digit * a[i] + r[i]
movd 12(%ebx), %mm1 / 4: mm1 = a[i]
paddq %mm2, %mm0 / 3: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 8(%edx) / 3: r[i] = product[31..0]
movd 12(%edx), %mm2 / 4: mm2 = r[i]
psrlq $32, %mm0 / 3: cy = product[63..32]
pmuludq %mm3, %mm1 / 4: mm1 = digit * a[i]
paddq %mm1, %mm2 / 4: mm2 = digit * a[i] + r[i]
movd 16(%ebx), %mm1 / 5: mm1 = a[i]
paddq %mm2, %mm0 / 4: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 12(%edx) / 4: r[i] = product[31..0]
movd 16(%edx), %mm2 / 5: mm2 = r[i]
psrlq $32, %mm0 / 4: cy = product[63..32]
pmuludq %mm3, %mm1 / 5: mm1 = digit * a[i]
paddq %mm1, %mm2 / 5: mm2 = digit * a[i] + r[i]
movd 20(%ebx), %mm1 / 6: mm1 = a[i]
paddq %mm2, %mm0 / 5: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 16(%edx) / 5: r[i] = product[31..0]
movd 20(%edx), %mm2 / 6: mm2 = r[i]
psrlq $32, %mm0 / 5: cy = product[63..32]
pmuludq %mm3, %mm1 / 6: mm1 = digit * a[i]
paddq %mm1, %mm2 / 6: mm2 = digit * a[i] + r[i]
movd 24(%ebx), %mm1 / 7: mm1 = a[i]
paddq %mm2, %mm0 / 6: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 20(%edx) / 6: r[i] = product[31..0]
movd 24(%edx), %mm2 / 7: mm2 = r[i]
psrlq $32, %mm0 / 6: cy = product[63..32]
pmuludq %mm3, %mm1 / 7: mm1 = digit * a[i]
paddq %mm1, %mm2 / 7: mm2 = digit * a[i] + r[i]
movd 28(%ebx), %mm1 / 8: mm1 = a[i]
paddq %mm2, %mm0 / 7: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 24(%edx) / 7: r[i] = product[31..0]
movd 28(%edx), %mm2 / 8: mm2 = r[i]
psrlq $32, %mm0 / 7: cy = product[63..32]
pmuludq %mm3, %mm1 / 8: mm1 = digit * a[i]
paddq %mm1, %mm2 / 8: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 8: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 28(%edx) / 8: r[i] = product[31..0]
psrlq $32, %mm0 / 8: cy = product[63..32]
leal UNROLL32(%ebx), %ebx / a += UNROLL
leal UNROLL32(%edx), %edx / r += UNROLL
subl $UNROLL, %ecx / len -= UNROLL
jz .L27
jmp .L25
.L26:
movd 0(%ebx), %mm1 / 1: mm1 = a[i]
movd 0(%edx), %mm2 / 1: mm2 = r[i]
pmuludq %mm3, %mm1 / 1: mm1 = digit * a[i]
paddq %mm1, %mm2 / 1: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 1: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 0(%edx) / 1: r[i] = product[31..0]
psrlq $32, %mm0 / 1: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 4(%ebx), %mm1 / 2: mm1 = a[i]
movd 4(%edx), %mm2 / 2: mm2 = r[i]
pmuludq %mm3, %mm1 / 2: mm1 = digit * a[i]
paddq %mm1, %mm2 / 2: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 2: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 4(%edx) / 2: r[i] = product[31..0]
psrlq $32, %mm0 / 2: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 8(%ebx), %mm1 / 3: mm1 = a[i]
movd 8(%edx), %mm2 / 3: mm2 = r[i]
pmuludq %mm3, %mm1 / 3: mm1 = digit * a[i]
paddq %mm1, %mm2 / 3: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 3: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 8(%edx) / 3: r[i] = product[31..0]
psrlq $32, %mm0 / 3: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 12(%ebx), %mm1 / 4: mm1 = a[i]
movd 12(%edx), %mm2 / 4: mm2 = r[i]
pmuludq %mm3, %mm1 / 4: mm1 = digit * a[i]
paddq %mm1, %mm2 / 4: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 4: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 12(%edx) / 4: r[i] = product[31..0]
psrlq $32, %mm0 / 4: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 16(%ebx), %mm1 / 5: mm1 = a[i]
movd 16(%edx), %mm2 / 5: mm2 = r[i]
pmuludq %mm3, %mm1 / 5: mm1 = digit * a[i]
paddq %mm1, %mm2 / 5: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 5: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 16(%edx) / 5: r[i] = product[31..0]
psrlq $32, %mm0 / 5: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 20(%ebx), %mm1 / 6: mm1 = a[i]
movd 20(%edx), %mm2 / 6: mm2 = r[i]
pmuludq %mm3, %mm1 / 6: mm1 = digit * a[i]
paddq %mm1, %mm2 / 6: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 6: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 20(%edx) / 6: r[i] = product[31..0]
psrlq $32, %mm0 / 6: cy = product[63..32]
subl $1, %ecx
jz .L27
movd 24(%ebx), %mm1 / 7: mm1 = a[i]
movd 24(%edx), %mm2 / 7: mm2 = r[i]
pmuludq %mm3, %mm1 / 7: mm1 = digit * a[i]
paddq %mm1, %mm2 / 7: mm2 = digit * a[i] + r[i]
paddq %mm2, %mm0 / 7: mm0 = digit * a[i] + r[i] + cy;
movd %mm0, 24(%edx) / 7: r[i] = product[31..0]
psrlq $32, %mm0 / 7: cy = product[63..32]
.L27:
movd %mm0, %eax
/ no emms. caller is responsible for emms
ret
SET_SIZE(big_mul_add_vec_sse2_r)
/ r = r + a * digit, r and a are vectors of length len
/ returns the carry digit
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ r 8(%ebp) %edx
/ a 12(%ebp) %ebx
/ len 16(%ebp) %ecx
/ digit 20(%ebp) %mm3
/
/ In userland, there is just the one function, big_mul_add_vec_sse2().
/ But in the kernel, there are two variations:
/ 1. big_mul_add_vec_sse2() which does what is necessary to save and
/ restore state, if necessary, and to ensure that preemtion is
/ disabled.
/ 2. big_mul_add_vec_sse2_nsv() which just does the work;
/ it is the caller's responsibility to ensure that MMX state
/ does not need to be saved and restored and that preemption
/ is already disabled.
#if defined(MMX_MANAGE)
ENTRY(big_mul_add_vec_sse2)
pushl %ebp
movl %esp, %ebp
pushl %ebx
pushl %esi
KPREEMPT_DISABLE
TEST_TS(%ebx)
pushl %ebx
jnz .addvec_no_save
pushl %edi
SAVE_MMX_0TO4(%edi)
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_add_vec_sse2_r
movl %eax, %esi
RSTOR_MMX_0TO4(%edi)
popl %edi
jmp .addvec_rtn
.addvec_no_save:
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_add_vec_sse2_r
movl %eax, %esi
.addvec_rtn:
emms
popl %ebx
movl %ebx, %cr0
KPREEMPT_ENABLE
movl %esi, %eax
popl %esi
popl %ebx
leave
ret
SET_SIZE(big_mul_add_vec_sse2)
ENTRY(big_mul_add_vec_sse2_nsv)
pushl %ebp
movl %esp, %ebp
pushl %ebx
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_add_vec_sse2_r
popl %ebx
leave
ret
SET_SIZE(big_mul_add_vec_sse2_nsv)
#else /* !defined(MMX_MANAGE) */
ENTRY(big_mul_add_vec_sse2)
pushl %ebp
movl %esp, %ebp
pushl %ebx
movl 8(%ebp), %edx
movl 12(%ebp), %ebx
movl 16(%ebp), %ecx
movd 20(%ebp), %mm3
call big_mul_add_vec_sse2_r
popl %ebx
emms
leave
ret
SET_SIZE(big_mul_add_vec_sse2)
#endif /* MMX_MANAGE */
/ void
/ big_mul_vec_sse2(uint32_t *r, uint32_t *a, int alen, uint32_t *b, int blen)
/ {
/ int i;
/
/ r[alen] = big_mul_set_vec_sse2(r, a, alen, b[0]);
/ for (i = 1; i < blen; ++i)
/ r[alen + i] = big_mul_add_vec_sse2(r+i, a, alen, b[i]);
/ }
#if defined(MMX_MANAGE)
ENTRY(big_mul_vec_sse2_fc)
#else
ENTRY(big_mul_vec_sse2)
#endif
subl $0x8, %esp
pushl %ebx
pushl %ebp
pushl %esi
pushl %edi
movl 40(%esp), %eax
movl %eax, 20(%esp)
pushl (%eax)
movl 40(%esp), %edi
pushl %edi
movl 40(%esp), %esi
pushl %esi
movl 40(%esp), %ebx
pushl %ebx
#if defined(MMX_MANAGE)
call big_mul_set_vec_sse2_nsv
#else
call big_mul_set_vec_sse2
#endif
addl $0x10, %esp
movl %eax, (%ebx,%edi,4)
movl 44(%esp), %eax
movl %eax, 16(%esp)
cmpl $0x1, %eax
jle .mulvec_rtn
movl $0x1, %ebp
.align 16
.mulvec_add:
movl 20(%esp), %eax
pushl (%eax,%ebp,4)
pushl %edi
pushl %esi
leal (%ebx,%ebp,4), %eax
pushl %eax
#if defined(MMX_MANAGE)
call big_mul_add_vec_sse2_nsv
#else
call big_mul_add_vec_sse2
#endif
addl $0x10, %esp
leal (%ebp,%edi), %ecx
movl %eax, (%ebx,%ecx,4)
incl %ebp
cmpl 16(%esp), %ebp
jl .mulvec_add
.mulvec_rtn:
#if defined(MMX_MANAGE)
emms
#endif
popl %edi
popl %esi
popl %ebp
popl %ebx
addl $0x8, %esp
ret
#if defined(MMX_MANAGE)
SET_SIZE(big_mul_vec_sse2_fc)
#else
SET_SIZE(big_mul_vec_sse2)
#endif
#if defined(MMX_MANAGE)
ENTRY(big_mul_vec_sse2)
pushl %ebp
movl %esp, %ebp
subl $8, %esp
pushl %edi
KPREEMPT_DISABLE
TEST_TS(%eax)
movl %eax, -8(%ebp)
jnz .mulvec_no_save
SAVE_MMX_0TO4(%edi)
movl %edi, -4(%ebp)
.mulvec_no_save:
movl 24(%ebp), %eax / blen
pushl %eax
movl 20(%ebp), %eax / b
pushl %eax
movl 16(%ebp), %eax / alen
pushl %eax
movl 12(%ebp), %eax / a
pushl %eax
movl 8(%ebp), %eax / r
pushl %eax
call big_mul_vec_sse2_fc
addl $20, %esp
movl -8(%ebp), %eax
testl $CR0_TS, %eax
jnz .mulvec_no_rstr
movl -4(%ebp), %edi
RSTOR_MMX_0TO4(%edi)
.mulvec_no_rstr:
movl %eax, %cr0
KPREEMPT_ENABLE
popl %edi
leave
ret
SET_SIZE(big_mul_vec_sse2)
#endif /* MMX_MANAGE */
#undef UNROLL
#undef UNROLL32
/ r = a * a, r and a are vectors of length len
/ Suitable only for x86 models that support SSE2 instruction set extensions
/
/ This function is not suitable for a truly general-purpose multiprecision
/ arithmetic library, because it does not work for "small" numbers, that is
/ numbers of 1 or 2 digits. big_mul() just uses the ordinary big_mul_vec()
/ for any small numbers.
#if defined(MMX_MANAGE)
ENTRY(big_sqr_vec_sse2_fc)
#else
ENTRY(big_sqr_vec_sse2)
pushl %ebp
movl %esp, %ebp
#endif
pushl %ebx
pushl %edi
pushl %esi
/ r[1..alen] = a[0] * a[1..alen-1]
movl 8(%ebp), %edi / r = arg(r)
movl 12(%ebp), %esi / a = arg(a)
movl 16(%ebp), %ecx / cnt = arg(alen)
movd %ecx, %mm4 / save_cnt = arg(alen)
leal 4(%edi), %edx / dst = &r[1]
movl %esi, %ebx / src = a
movd 0(%ebx), %mm3 / mm3 = a[0]
leal 4(%ebx), %ebx / src = &a[1]
subl $1, %ecx / --cnt
call big_mul_set_vec_sse2_r / r[1..alen-1] = a[0] * a[1..alen-1]
movl %edi, %edx / dst = r
movl %esi, %ebx / src = a
movd %mm4, %ecx / cnt = save_cnt
movl %eax, (%edx, %ecx, 4) / r[cnt] = cy
/ /* High-level vector C pseudocode */
/ for (i = 1; i < alen-1; ++i)
/ r[2*i + 1 ... ] += a[i] * a[i+1 .. alen-1]
/
/ /* Same thing, but slightly lower level C-like pseudocode */
/ i = 1;
/ r = &arg_r[2*i + 1];
/ a = &arg_a[i + 1];
/ digit = arg_a[i];
/ cnt = alen - 3;
/ while (cnt != 0) {
/ r[cnt] = big_mul_add_vec_sse2_r(r, a, cnt, digit);
/ r += 2;
/ ++a;
/ --cnt;
/ }
/
/ /* Same thing, but even lower level
/ * For example, pointers are raw pointers,
/ * with no scaling by object size.
/ */
/ r = arg_r + 12; /* i == 1; 2i + 1 == 3; 4*3 == 12; */
/ a = arg_a + 8;
/ digit = *(arg_a + 4);
/ cnt = alen - 3;
/ while (cnt != 0) {
/ cy = big_mul_add_vec_sse2_r();
/ *(r + 4 * cnt) = cy;
/ r += 8;
/ a += 4;
/ --cnt;
/ }
leal 4(%edi), %edi / r += 4; r = &r[1]
leal 4(%esi), %esi / a += 4; a = &a[1]
movd %mm4, %ecx / cnt = save
subl $2, %ecx / cnt = alen - 2; i in 1..alen-2
movd %ecx, %mm4 / save_cnt
jecxz .L32 / while (cnt != 0) {
.L31:
movd 0(%esi), %mm3 / digit = a[i]
leal 4(%esi), %esi / a += 4; a = &a[1]; a = &a[i + 1]
leal 8(%edi), %edi / r += 8; r = &r[2]; r = &r[2 * i + 1]
movl %edi, %edx / edx = r
movl %esi, %ebx / ebx = a
cmp $1, %ecx / The last triangle term is special
jz .L32
call big_mul_add_vec_sse2_r
movd %mm4, %ecx / cnt = save_cnt
movl %eax, (%edi, %ecx, 4) / r[cnt] = cy
subl $1, %ecx / --cnt
movd %ecx, %mm4 / save_cnt = cnt
jmp .L31 / }
.L32:
movd 0(%ebx), %mm1 / mm1 = a[i + 1]
movd 0(%edx), %mm2 / mm2 = r[2 * i + 1]
pmuludq %mm3, %mm1 / mm1 = p = digit * a[i + 1]
paddq %mm1, %mm2 / mm2 = r[2 * i + 1] + p
movd %mm2, 0(%edx) / r[2 * i + 1] += lo32(p)
psrlq $32, %mm2 / mm2 = cy
movd %mm2, 4(%edx) / r[2 * i + 2] = cy
pxor %mm2, %mm2
movd %mm2, 8(%edx) / r[2 * i + 3] = 0
movl 8(%ebp), %edx / r = arg(r)
movl 12(%ebp), %ebx / a = arg(a)
movl 16(%ebp), %ecx / cnt = arg(alen)
/ compute low-order corner
/ p = a[0]**2
/ r[0] = lo32(p)
/ cy = hi32(p)
movd 0(%ebx), %mm2 / mm2 = a[0]
pmuludq %mm2, %mm2 / mm2 = p = a[0]**2
movd %mm2, 0(%edx) / r[0] = lo32(p)
psrlq $32, %mm2 / mm2 = cy = hi32(p)
/ p = 2 * r[1]
/ t = p + cy
/ r[1] = lo32(t)
/ cy = hi32(t)
movd 4(%edx), %mm1 / mm1 = r[1]
psllq $1, %mm1 / mm1 = p = 2 * r[1]
paddq %mm1, %mm2 / mm2 = t = p + cy
movd %mm2, 4(%edx) / r[1] = low32(t)
psrlq $32, %mm2 / mm2 = cy = hi32(t)
/ r[2..$-3] = inner_diagonal[*]**2 + 2 * r[2..$-3]
subl $2, %ecx / cnt = alen - 2
.L34:
movd 4(%ebx), %mm0 / mm0 = diag = a[i+1]
pmuludq %mm0, %mm0 / mm0 = p = diag**2
paddq %mm0, %mm2 / mm2 = t = p + cy
movd %mm2, %eax
movd %eax, %mm1 / mm1 = lo32(t)
psrlq $32, %mm2 / mm2 = hi32(t)
movd 8(%edx), %mm3 / mm3 = r[2*i]
psllq $1, %mm3 / mm3 = 2*r[2*i]
paddq %mm3, %mm1 / mm1 = 2*r[2*i] + lo32(t)
movd %mm1, 8(%edx) / r[2*i] = 2*r[2*i] + lo32(t)
psrlq $32, %mm1
paddq %mm1, %mm2
movd 12(%edx), %mm3 / mm3 = r[2*i+1]
psllq $1, %mm3 / mm3 = 2*r[2*i+1]
paddq %mm3, %mm2 / mm2 = 2*r[2*i+1] + hi32(t)
movd %mm2, 12(%edx) / r[2*i+1] = mm2
psrlq $32, %mm2 / mm2 = cy
leal 8(%edx), %edx / r += 2
leal 4(%ebx), %ebx / ++a
subl $1, %ecx / --cnt
jnz .L34
/ Carry from last triangle term must participate in doubling,
/ but this step isn't paired up with a squaring the elements
/ of the inner diagonal.
/ r[$-3..$-2] += 2 * r[$-3..$-2] + cy
movd 8(%edx), %mm3 / mm3 = r[2*i]
psllq $1, %mm3 / mm3 = 2*r[2*i]
paddq %mm3, %mm2 / mm2 = 2*r[2*i] + cy
movd %mm2, 8(%edx) / r[2*i] = lo32(2*r[2*i] + cy)
psrlq $32, %mm2 / mm2 = cy = hi32(2*r[2*i] + cy)
movd 12(%edx), %mm3 / mm3 = r[2*i+1]
psllq $1, %mm3 / mm3 = 2*r[2*i+1]
paddq %mm3, %mm2 / mm2 = 2*r[2*i+1] + cy
movd %mm2, 12(%edx) / r[2*i+1] = mm2
psrlq $32, %mm2 / mm2 = cy
/ compute high-order corner and add it in
/ p = a[alen - 1]**2
/ t = p + cy
/ r[alen + alen - 2] += lo32(t)
/ cy = hi32(t)
/ r[alen + alen - 1] = cy
movd 4(%ebx), %mm0 / mm0 = a[$-1]
movd 8(%edx), %mm3 / mm3 = r[$-2]
pmuludq %mm0, %mm0 / mm0 = p = a[$-1]**2
paddq %mm0, %mm2 / mm2 = t = p + cy
paddq %mm3, %mm2 / mm2 = r[$-2] + t
movd %mm2, 8(%edx) / r[$-2] = lo32(r[$-2] + t)
psrlq $32, %mm2 / mm2 = cy = hi32(r[$-2] + t)
movd 12(%edx), %mm3
paddq %mm3, %mm2
movd %mm2, 12(%edx) / r[$-1] += cy
.L35:
emms
popl %esi
popl %edi
popl %ebx
#if defined(MMX_MANAGE)
ret
SET_SIZE(big_sqr_vec_sse2_fc)
#else
leave
ret
SET_SIZE(big_sqr_vec_sse2)
#endif
#if defined(MMX_MANAGE)
ENTRY(big_sqr_vec_sse2)
pushl %ebp
movl %esp, %ebp
KPREEMPT_DISABLE
TEST_TS(%ebx)
pushl %ebx
jnz .sqr_no_save
pushl %edi
SAVE_MMX_0TO4(%edi)
call big_sqr_vec_sse2_fc
RSTOR_MMX_0TO4(%edi)
popl %edi
jmp .sqr_rtn
.sqr_no_save:
call big_sqr_vec_sse2_fc
.sqr_rtn:
popl %ebx
movl %ebx, %cr0
KPREEMPT_ENABLE
leave
ret
SET_SIZE(big_sqr_vec_sse2)
#endif /* MMX_MANAGE */
/ ------------------------------------------------------------------------
/ UMUL Implementations
/ ------------------------------------------------------------------------
/ r = a * digit, r and a are vectors of length len
/ returns the carry digit
/ Does not use any MMX, SSE, or SSE2 instructions.
/ Uses x86 unsigned 32 X 32 -> 64 multiply instruction, MUL.
/ This is a fall-back implementation for x86 models that do not support
/ the PMULUDQ instruction.
/
/ uint32_t
/ big_mul_set_vec_umul(uint32_t *r, uint32_t *a, int len, uint32_t digit)
/
/ r 8(%ebp) %edx %edi
/ a 12(%ebp) %ebx %esi
/ len 16(%ebp) %ecx
/ digit 20(%ebp) %esi
ENTRY(big_mul_set_vec_umul)
pushl %ebp
movl %esp, %ebp
pushl %esi
pushl %edi
pushl %ebx
movl 16(%ebp), %ecx
xorl %ebx, %ebx / cy = 0
testl %ecx, %ecx
movl 8(%ebp), %edi
movl 12(%ebp), %esi
je .L57
.L55:
movl (%esi), %eax / eax = a[i]
leal 4(%esi), %esi / ++a
mull 20(%ebp) / edx:eax = a[i] * digit
addl %ebx, %eax
adcl $0, %edx / edx:eax = a[i] * digit + cy
movl %eax, (%edi) / r[i] = product[31..0]
movl %edx, %ebx / cy = product[63..32]
leal 4(%edi), %edi / ++r
decl %ecx / --len
jnz .L55 / while (len != 0)
.L57:
movl %ebx, %eax
popl %ebx
popl %edi
popl %esi
leave
ret
SET_SIZE(big_mul_set_vec_umul)
/ r = r + a * digit, r and a are vectors of length len
/ returns the carry digit
/ Does not use any MMX, SSE, or SSE2 instructions.
/ Uses x86 unsigned 32 X 32 -> 64 multiply instruction, MUL.
/ This is a fall-back implementation for x86 models that do not support
/ the PMULUDQ instruction.
/
/ uint32_t
/ big_mul_add_vec_umul(uint32_t *r, uint32_t *a, int len, uint32_t digit)
/
/ r 8(%ebp) %edx %edi
/ a 12(%ebp) %ebx %esi
/ len 16(%ebp) %ecx
/ digit 20(%ebp) %esi
ENTRY(big_mul_add_vec_umul)
pushl %ebp
movl %esp, %ebp
pushl %esi
pushl %edi
pushl %ebx
movl 16(%ebp), %ecx
xorl %ebx, %ebx / cy = 0
testl %ecx, %ecx
movl 8(%ebp), %edi
movl 12(%ebp), %esi
je .L67
.align 4
.L65:
movl (%esi), %eax / eax = a[i]
leal 4(%esi), %esi / ++a
mull 20(%ebp) / edx:eax = a[i] * digit
addl (%edi), %eax
adcl $0, %edx / edx:eax = a[i] * digit + r[i]
addl %ebx, %eax
adcl $0, %edx / edx:eax = a[i] * digit + r[i] + cy
movl %eax, (%edi) / r[i] = product[31..0]
movl %edx, %ebx / cy = product[63..32]
leal 4(%edi), %edi / ++r
decl %ecx / --len
jnz .L65 / while (len != 0)
.L67:
movl %ebx, %eax
popl %ebx
popl %edi
popl %esi
leave
ret
SET_SIZE(big_mul_add_vec_umul)
#endif /* __lint */
|