1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
|
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 2001 by Sun Microsystems, Inc.
* All rights reserved.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/promif.h>
#include <sys/promimpl.h>
/*
* This file contains the implementations of all Starfire-specific
* promif routines.
*/
/*
* Probe all of the devices on a board. The board number is
* computed from cpuid. All of the cpus on the board are
* brought into OBP's slave idle loop but are not started.
* Returns zero for success and non-zero for failure.
*/
int
prom_starfire_add_brd(uint_t cpuid)
{
cell_t ci[5];
int rv;
ci[0] = p1275_ptr2cell("SUNW,UE10000,add-brd"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)1; /* #result cells */
ci[3] = p1275_uint2cell(cpuid);
promif_preprom();
rv = p1275_cif_handler(&ci);
promif_postprom();
return ((rv) ? -1 : p1275_cell2int(ci[4]));
}
/*
* Prune the device tree nodes for all devices on the board
* represented by brdnum. Returns zero for success and non-zero
* for failure.
*/
int
prom_starfire_rm_brd(uint_t brdnum)
{
cell_t ci[5];
int rv;
ci[0] = p1275_ptr2cell("SUNW,UE10000,rm-brd"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)1; /* #result cells */
ci[3] = p1275_uint2cell(brdnum);
promif_preprom();
rv = p1275_cif_handler(&ci);
promif_postprom();
return ((rv) ? -1 : p1275_cell2int(ci[4]));
}
/*
* Prepare firmware internal state for the inclusion of the
* cpu represented by cpuid. This operation has no effect on
* the cpu hardware or behavior in the client.
*/
void
prom_starfire_add_cpu(uint_t cpuid)
{
cell_t ci[4];
ci[0] = p1275_ptr2cell("SUNW,UE10000,add-cpu"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)0; /* #result cells */
ci[3] = p1275_uint2cell(cpuid);
promif_preprom();
(void) p1275_cif_handler(&ci);
promif_postprom();
}
/*
* Prepare firmware internal state for the departure of the cpu
* represented by cpuid.
*/
void
prom_starfire_rm_cpu(uint_t cpuid)
{
cell_t ci[4];
ci[0] = p1275_ptr2cell("SUNW,UE10000,rm-cpu"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)0; /* #result cells */
ci[3] = p1275_uint2cell(cpuid);
promif_preprom();
(void) p1275_cif_handler(&ci);
promif_postprom();
}
/*
* Mark the cpu represented by cpuid as cpu0. Returns zero for
* success and non-zero for failure.
*/
int
prom_starfire_move_cpu0(uint_t cpuid)
{
cell_t ci[5];
int rv;
ci[0] = p1275_ptr2cell("SUNW,UE10000,move-cpu0"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)1; /* #result cells */
ci[3] = p1275_uint2cell(cpuid);
promif_preprom();
rv = p1275_cif_handler(&ci);
promif_postprom();
return ((rv) ? -1 : p1275_cell2int(ci[4]));
}
/*
* Perform initialization steps required for the console before
* moving cpu0. The console uses the bootbus SRAM of cpu0 for both
* input and output. The offsets of the console buffers are initialized
* for the bootbus SRAM of the new cpu0 represented by cpuid.
*/
void
prom_starfire_init_console(uint_t cpuid)
{
cell_t ci[4];
ci[0] = p1275_ptr2cell("SUNW,UE10000,init-console"); /* name */
ci[1] = (cell_t)1; /* #argument cells */
ci[2] = (cell_t)0; /* #result cells */
ci[3] = p1275_uint2cell(cpuid);
promif_preprom();
(void) p1275_cif_handler(&ci);
promif_postprom();
}
|
