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\
\ CDDL HEADER START
\
\ The contents of this file are subject to the terms of the
\ Common Development and Distribution License (the "License").
\ You may not use this file except in compliance with the License.
\
\ You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
\ or http://www.opensolaris.org/os/licensing.
\ See the License for the specific language governing permissions
\ and limitations under the License.
\
\ When distributing Covered Code, include this CDDL HEADER in each
\ file and include the License file at usr/src/OPENSOLARIS.LICENSE.
\ If applicable, add the following below this CDDL HEADER, with the
\ fields enclosed by brackets "[]" replaced with your own identifying
\ information: Portions Copyright [yyyy] [name of copyright owner]
\
\ CDDL HEADER END
\
\ Copyright 2009 Sun Microsystems, Inc. All rights reserved.
\ Use is subject to license terms.
\
\ offsets.in: input file to produce assym.h using the stabs program
\
\
\ Guidelines:
\
\ A blank line is required between structure/union/intrinsic names.
\
\ The general form is:
\
\ name size_define [shift_define]
\ [member_name [offset_define]]
\ {blank line}
\
\ If no individual member_name's are specified then all members are processed.
\ If offset_define is not specified then the member_name is
\ converted to all caps and used instead. If the size of an item is
\ a power of two then an optional shift count may be output using
\ shift_define as the name but only if shift_define was specified.
\
\ Arrays cause stabs to automatically output the per-array-item increment
\ in addition to the base address:
\
\ foo FOO_SIZE
\ array FOO_ARRAY
\
\ results in:
\
\ #define FOO_ARRAY 0x0
\ #define FOO_ARRAY_INCR 0x4
\
\ which allows \#define's to be used to specify array items:
\
\ #define FOO_0 (FOO_ARRAY + (0 * FOO_ARRAY_INCR))
\ #define FOO_1 (FOO_ARRAY + (1 * FOO_ARRAY_INCR))
\ ...
\ #define FOO_n (FOO_ARRAY + (n * FOO_ARRAY_INCR))
\
\ There are several examples below (search for _INCR).
\
\ There is currently no manner in which to identify "anonymous"
\ structures or unions so if they are to be used in assembly code
\ they must be given names.
\
\ When specifying the offsets of nested structures/unions each nested
\ structure or union must be listed separately then use the
\ "\#define" escapes to add the offsets from the base structure/union
\ and all of the nested structures/unions together. See the many
\ examples already in this file.
#ifndef _GENASSYM
#define _GENASSYM
#endif
#include <vm/hat_sfmmu.h>
#include <sys/traptrace.h>
#include <sys/lpad.h>
machcpu
intrstat MCPU_INTRSTAT
pil_high_start MCPU_PIL_HIGH_START
mpcb_pa MCPU_MPCB_PA
kwbuf_full MCPU_KWBUF_FULL
kwbuf_sp MCPU_KWBUF_SP
kwbuf MCPU_KWBUF
cpu_q_base_pa MCPU_CPU_Q_BASE
cpu_q_size MCPU_CPU_Q_SIZE
dev_q_base_pa MCPU_DEV_Q_BASE
dev_q_size MCPU_DEV_Q_SIZE
mondo_data MCPU_MONDO_DATA
mondo_data_ra MCPU_MONDO_DATA_RA
cpu_rq_va MCPU_RQ_BASE_VA
cpu_rq_base_pa MCPU_RQ_BASE
cpu_rq_size MCPU_RQ_SIZE
cpu_nrq_va MCPU_NRQ_BASE_VA
cpu_nrq_base_pa MCPU_NRQ_BASE
cpu_nrq_size MCPU_NRQ_SIZE
cpu_tstat_flags MCPU_TSTAT_FLAGS
\#define CPU_MPCB_PA (CPU_MCPU + MCPU_MPCB_PA)
\#define CPU_KWBUF_FULL (CPU_MCPU + MCPU_KWBUF_FULL)
\#define CPU_KWBUF_SP (CPU_MCPU + MCPU_KWBUF_SP)
\#define CPU_KWBUF (CPU_MCPU + MCPU_KWBUF)
\#define CPU_Q_BASE (CPU_MCPU + MCPU_CPU_Q_BASE)
\#define CPU_Q_SIZE (CPU_MCPU + MCPU_CPU_Q_SIZE)
\#define DEV_Q_BASE (CPU_MCPU + MCPU_DEV_Q_BASE)
\#define DEV_Q_SIZE (CPU_MCPU + MCPU_DEV_Q_SIZE)
\#define CPU_RQ_BASE_VA_OFF (CPU_MCPU + MCPU_RQ_BASE_VA)
\#define CPU_RQ_BASE_OFF (CPU_MCPU + MCPU_RQ_BASE)
\#define CPU_RQ_SIZE_OFF (CPU_MCPU + MCPU_RQ_SIZE)
\#define CPU_NRQ_BASE_VA_OFF (CPU_MCPU + MCPU_NRQ_BASE_VA)
\#define CPU_NRQ_BASE_OFF (CPU_MCPU + MCPU_NRQ_BASE)
\#define CPU_NRQ_SIZE_OFF (CPU_MCPU + MCPU_NRQ_SIZE)
\#define CPU_TSTAT_FLAGS (CPU_MCPU + MCPU_TSTAT_FLAGS)
trap_trace_record TRAP_ENT_SIZE
tt_gl TRAP_ENT_GL
tt_tl TRAP_ENT_TL
tt_tt TRAP_ENT_TT
tt_tpc TRAP_ENT_TPC
tt_tstate TRAP_ENT_TSTATE
tt_tick TRAP_ENT_TICK
tt_sp TRAP_ENT_SP
tt_tr TRAP_ENT_TR
tt_f1 TRAP_ENT_F1
tt_f2 TRAP_ENT_F2
tt_f3 TRAP_ENT_F3
tt_f4 TRAP_ENT_F4
htrap_trace_record HTRAP_ENT_SIZE
hat HAT_SIZE
sfmmu_cpusran
sfmmu_tsb
sfmmu_ismblkpa
sfmmu_tteflags
sfmmu_rtteflags
sfmmu_srdp
sfmmu_region_map.h_rmap_s.hmeregion_map SFMMU_HMERMAP
sfmmu_scdp
sfmmu_hvblock
sfmmu_cext
sfmmu_ctx_lock
sfmmu_ctxs
sf_scd SCD_SIZE
scd_sfmmup
scd_region_map.h_rmap_s.hmeregion_map SCD_HMERMAP
sfmmu_global_stat HATSTAT_SIZE
sf_pagefaults HATSTAT_PAGEFAULT
sf_uhash_searches HATSTAT_UHASH_SEARCH
sf_uhash_links HATSTAT_UHASH_LINKS
sf_khash_searches HATSTAT_KHASH_SEARCH
sf_khash_links HATSTAT_KHASH_LINKS
sf_hment SFHME_SIZE SFHME_SHIFT
hme_tte SFHME_TTE
tsbmiss TSBMISS_SIZE
ksfmmup TSBMISS_KHATID
usfmmup TSBMISS_UHATID
usrdp TSBMISS_SHARED_UHATID
tsbptr TSBMISS_TSBPTR
tsbptr4m TSBMISS_TSBPTR4M
tsbscdptr TSBMISS_TSBSCDPTR
tsbscdptr4m TSBMISS_TSBSCDPTR4M
ismblkpa TSBMISS_ISMBLKPA
khashstart TSBMISS_KHASHSTART
uhashstart TSBMISS_UHASHSTART
khashsz TSBMISS_KHASHSZ
uhashsz TSBMISS_UHASHSZ
uhat_tteflags TSBMISS_UTTEFLAGS
uhat_rtteflags TSBMISS_URTTEFLAGS
utsb_misses TSBMISS_UTSBMISS
ktsb_misses TSBMISS_KTSBMISS
uprot_traps TSBMISS_UPROTS
kprot_traps TSBMISS_KPROTS
scratch TSBMISS_SCRATCH
shmermap TSBMISS_SHMERMAP
scd_shmermap TSBMISS_SCDSHMERMAP
\#define TSB_TAGACC (0 * TSBMISS_SCRATCH_INCR)
\#define TSBMISS_HMEBP (1 * TSBMISS_SCRATCH_INCR)
\#define TSBMISS_HATID (2 * TSBMISS_SCRATCH_INCR)
kpmtsbm KPMTSBM_SIZE KPMTSBM_SHIFT
vbase KPMTSBM_VBASE
vend KPMTSBM_VEND
flags KPMTSBM_FLAGS
sz_shift KPMTSBM_SZSHIFT
kpmp_shift KPMTSBM_KPMPSHIFT
kpmp2pshft KPMTSBM_KPMP2PSHFT
kpmp_table_sz KPMTSBM_KPMPTABLESZ
kpmp_tablepa KPMTSBM_KPMPTABLEPA
msegphashpa KPMTSBM_MSEGPHASHPA
tsbptr KPMTSBM_TSBPTR
kpm_dtlb_misses KPMTSBM_DTLBMISS
kpm_tsb_misses KPMTSBM_TSBMISS
kpm_page KPMPAGE_SIZE KPMPAGE_SHIFT
kp_refcnt KPMPAGE_REFCNT
kp_refcnta KPMPAGE_REFCNTA
kp_refcntc KPMPAGE_REFCNTC
kp_refcnts KPMPAGE_REFCNTS
kpm_hlk KPMHLK_SIZE KPMHLK_SHIFT
khl_mutex KPMHLK_MUTEX
khl_lock KPMHLK_LOCK
kpm_spage KPMSPAGE_SIZE KPMSPAGE_SHIFT
kp_mapped_flag KPMSPAGE_MAPPED
kpm_shlk KPMSHLK_SIZE KPMSHLK_SHIFT
kshl_lock KPMSHLK_LOCK
memseg MEMSEG_SIZE
pages MEMSEG_PAGES
epages MEMSEG_EPAGES
pages_base MEMSEG_PAGES_BASE
pages_end MEMSEG_PAGES_END
next MEMSEG_NEXT
lnext MEMSEG_LNEXT
nextpa MEMSEG_NEXTPA
pagespa MEMSEG_PAGESPA
epagespa MEMSEG_EPAGESPA
kpm_pbase MEMSEG_KPM_PBASE
kpm_nkpmpgs MEMSEG_KPM_NKPMPGS
mseg_un
kpm_pagespa MEMSEG_KPM_PAGESPA
\#define MEMSEG_KPM_PAGES (MSEG_UN)
\#define MEMSEG_KPM_SPAGES (MSEG_UN)
page PAGE_SIZE
p_pagenum PAGE_PAGENUM
tsb_info TSBINFO_SIZE
tsb_tte TSBINFO_TTE
tsb_va TSBINFO_VADDR
tsb_pa TSBINFO_PADDR
tsb_szc TSBINFO_SZCODE
tsb_next TSBINFO_NEXTPTR
hv_tsb_block
hv_tsb_info_pa
hv_tsb_info_cnt
cpu_node CPU_NODE_SIZE
nodeid
clock_freq
tick_nsec_scale
ecache_size ECACHE_SIZE
ecache_linesize ECACHE_LINESIZE
device_id DEVICE_ID
ptl1_regs
ptl1_trap_regs
ptl1_gregs
ptl1_tick
ptl1_dmmu_type
ptl1_dmmu_addr
ptl1_dmmu_ctx
ptl1_immu_type
ptl1_immu_addr
ptl1_immu_ctx
ptl1_rwindow
ptl1_softint
ptl1_pstate
ptl1_pil
ptl1_cwp
ptl1_wstate
ptl1_otherwin
ptl1_cleanwin
ptl1_cansave
ptl1_canrestore
ptl1_gregs
ptl1_gl
ptl1_g1
ptl1_g2
ptl1_g3
ptl1_g4
ptl1_g5
ptl1_g6
ptl1_g7
lpad_data
magic LPAD_MAGIC
inuse LPAD_INUSE
mmfsa_ra LPAD_MMFSA_RA
pc LPAD_PC
arg LPAD_ARG
nmap LPAD_NMAP
map LPAD_MAP
lpad_map LPAD_MAP_SIZE
flags LPAD_MAP_FLAGS
va LPAD_MAP_VA
tte LPAD_MAP_TTE
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