For ARM, an additional binary is produced, so adjust the PLIST.

Fix mismatches between prototypes and implementations. Use unified ARM
syntax.

11 files changed, 187 insertions, 3 deletions

diff --git a/emulators/dgen/Makefile b/emulators/dgen/Makefile
index 031a4aa5f39..6ab05b8ac9c 100644
--- a/emulators/dgen/Makefile
+++ b/emulators/dgen/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.22 2015/03/31 15:15:02 joerg Exp $
+# $NetBSD: Makefile,v 1.23 2015/03/31 15:20:53 joerg Exp $
 #
 
 DISTNAME=	dgen-sdl-1.32
@@ -15,6 +15,12 @@ COMMENT=	Genesis/Megadrive emulator for Unix platforms
 DEPENDS+=	nasm-[0-9]*:../../devel/nasm
 .endif
 
+PLIST_VARS+=	arm
+
+.if ${MACHINE_CPU:U} == "arm"
+PLIST_VAR.arm=	yes
+.endif
+
 USE_LANGUAGES=	c c++
 USE_TOOLS+=	gmake
 GNU_CONFIGURE=	yes
diff --git a/emulators/dgen/PLIST b/emulators/dgen/PLIST
index 1222a068a99..465d57f9370 100644
--- a/emulators/dgen/PLIST
+++ b/emulators/dgen/PLIST
@@ -1,4 +1,5 @@
-@comment $NetBSD: PLIST,v 1.2 2012/01/08 15:10:49 wiz Exp $
+@comment $NetBSD: PLIST,v 1.3 2015/03/31 15:20:53 joerg Exp $
+${PLIST.arm}bin/cyclone
 bin/dgen
 bin/dgen_tobin
 man/man1/dgen.1
diff --git a/emulators/dgen/distinfo b/emulators/dgen/distinfo
index 3303c6f865e..83aebd3bfe7 100644
--- a/emulators/dgen/distinfo
+++ b/emulators/dgen/distinfo
@@ -1,5 +1,13 @@
-$NetBSD: distinfo,v 1.6 2013/05/25 16:49:03 shattered Exp $
+$NetBSD: distinfo,v 1.7 2015/03/31 15:20:53 joerg Exp $
 
 SHA1 (dgen-sdl-1.32.tar.gz) = 68ab5dcdc29e5172bc760a13724afb35e8ca4378
 RMD160 (dgen-sdl-1.32.tar.gz) = fcc0bf27a2360d6d26eec48da1483e4f99271e69
 Size (dgen-sdl-1.32.tar.gz) = 885601 bytes
+SHA1 (patch-cyclone_Cyclone.h) = 80922337ccb228b701a1f08a45d44f91a2f2da7b
+SHA1 (patch-cyclone_Ea.cpp) = 51314ba86c0f91f7a2e4f4f2e05dec8ec8847096
+SHA1 (patch-cyclone_Main.cpp) = 568c4515b78882b3a8601ca15c7ad883dfe432c1
+SHA1 (patch-cyclone_OpArith.cpp) = 9113408463bdb19c219e2c0207689d4ea2dbe1b7
+SHA1 (patch-cyclone_OpBranch.cpp) = 0e4dc6c1cfa973405e0a5b22905ca19b90b6ab0d
+SHA1 (patch-cyclone_OpLogic.cpp) = abb1e6433e04a7a3c3c6dbf0395df28bf0e44bc3
+SHA1 (patch-drz80_drz80.h) = 0758e21069346ab2712e707cdc4b7188ff4681f2
+SHA1 (patch-drz80_drz80.s) = d87a121797eb8ba4e330376bb6229850f09f91ab
diff --git a/emulators/dgen/patches/patch-cyclone_Cyclone.h b/emulators/dgen/patches/patch-cyclone_Cyclone.h
new file mode 100644
index 00000000000..ba044707de5
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_Cyclone.h
@@ -0,0 +1,13 @@
+$NetBSD: patch-cyclone_Cyclone.h,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/Cyclone.h.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/Cyclone.h
+@@ -35,7 +35,7 @@ struct Cyclone
+   int state_flags;      // [r7,#0x58] bit: 0: stopped state, 1: trace state, 2: activity bit, 3: addr error, 4: fatal halt
+   int cycles;           // [r7,#0x5c] Number of cycles to execute - 1. Updates to cycles left after CycloneRun()
+   int membase;          // [r7,#0x60] Memory Base (ARM address minus 68000 address)
+-  unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] called to recalc Memory Base+pc
++  uintptr_t (*checkpc)(uintptr_t pc); // [r7,#0x64] called to recalc Memory Base+pc
+   unsigned int (*read8  )(unsigned int a);  // [r7,#0x68]
+   unsigned int (*read16 )(unsigned int a);  // [r7,#0x6c]
+   unsigned int (*read32 )(unsigned int a);  // [r7,#0x70]
diff --git a/emulators/dgen/patches/patch-cyclone_Ea.cpp b/emulators/dgen/patches/patch-cyclone_Ea.cpp
new file mode 100644
index 00000000000..2bec1b1c694
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_Ea.cpp
@@ -0,0 +1,22 @@
+$NetBSD: patch-cyclone_Ea.cpp,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/Ea.cpp.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/Ea.cpp
+@@ -225,7 +225,7 @@ int EaCalc(int a,int mask,int ea,int siz
+     ot("  mov r2,r3,lsr #10\n");
+     ot("  tst r3,#0x0800 ;@ Is Rn Word or Long\n");
+     ot("  and r2,r2,#0x3c ;@ r2=Index of Rn\n");
+-    ot("  ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");
++    ot("  ldrsheq r2,[r7,r2] ;@ r2=Rn.w\n");
+     ot("  ldrne   r2,[r7,r2] ;@ r2=Rn.l\n");
+     ot("  mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");
+     ot("  add r3,r2,r0,asr #24 ;@ r3=Disp+Rn\n");
+@@ -274,7 +274,7 @@ int EaCalc(int a,int mask,int ea,int siz
+     ot("  mov r2,r3,lsr #10\n");
+     ot("  tst r3,#0x0800 ;@ Is Rn Word or Long\n");
+     ot("  and r2,r2,#0x3c ;@ r2=Index of Rn\n");
+-    ot("  ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");
++    ot("  ldrsheq r2,[r7,r2] ;@ r2=Rn.w\n");
+     ot("  ldrne   r2,[r7,r2] ;@ r2=Rn.l\n");
+     ot("  mov r3,r3,asl #24 ;@ r3=Get 8-bit signed Disp\n");
+     ot("  add r2,r2,r3,asr #24 ;@ r2=Disp+Rn\n");
diff --git a/emulators/dgen/patches/patch-cyclone_Main.cpp b/emulators/dgen/patches/patch-cyclone_Main.cpp
new file mode 100644
index 00000000000..b609f4aee58
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_Main.cpp
@@ -0,0 +1,22 @@
+$NetBSD: patch-cyclone_Main.cpp,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/Main.cpp.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/Main.cpp
+@@ -275,7 +275,7 @@ static void PrintFramework()
+   ot("  cmp r2,#0xf\n");
+   ot("  addeq r2,r2,#1 ;@ 0xf is really 0x10\n");
+   ot("  tst r2,r2\n");
+-  ot("  ldreqh r2,[r0],#2 ;@ counter is in next word\n");
++  ot("  ldrheq r2,[r0],#2 ;@ counter is in next word\n");
+   ot("  tst r2,r2\n");
+   ot("  beq unc_finish ;@ done decompressing\n");
+   ot("  tst r1,r1\n");
+@@ -570,7 +570,7 @@ static void PrintFramework()
+   ot("  ldr r3,[r7,#0x8c] ;@ IrqCallback\n");
+   ot("  add lr,pc,#4*3\n");
+   ot("  tst r3,r3\n");
+-  ot("  streqb r3,[r7,#0x47] ;@ just clear IRQ if there is no callback\n");
++  ot("  strbeq r3,[r7,#0x47] ;@ just clear IRQ if there is no callback\n");
+   ot("  mvneq r0,#0 ;@ and simulate -1 return\n");
+   ot("  bxne r3\n");
+ #if INT_ACK_CHANGES_CYCLES
diff --git a/emulators/dgen/patches/patch-cyclone_OpArith.cpp b/emulators/dgen/patches/patch-cyclone_OpArith.cpp
new file mode 100644
index 00000000000..478d3d6ca0a
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_OpArith.cpp
@@ -0,0 +1,13 @@
+$NetBSD: patch-cyclone_OpArith.cpp,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/OpArith.cpp.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/OpArith.cpp
+@@ -373,7 +373,7 @@ int GetXBit(int subtract)
+   ot(";@ Get X bit:\n");
+   ot("  ldr r2,[r7,#0x4c]\n");
+   if (subtract) ot("  mvn r2,r2 ;@ Invert it\n");
+-  ot("  msr cpsr_flg,r2 ;@ Get into Carry\n");
++  ot("  msr CPSR_f,r2 ;@ Get into Carry\n");
+   ot("\n");
+   return 0;
+ }
diff --git a/emulators/dgen/patches/patch-cyclone_OpBranch.cpp b/emulators/dgen/patches/patch-cyclone_OpBranch.cpp
new file mode 100644
index 00000000000..332e3d2a330
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_OpBranch.cpp
@@ -0,0 +1,22 @@
+$NetBSD: patch-cyclone_OpBranch.cpp,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/OpBranch.cpp.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/OpBranch.cpp
+@@ -336,7 +336,7 @@ int OpDbra(int op)
+       break;
+     default:
+       ot(";@ Is the condition true?\n");
+-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
++      ot("  msr CPSR_f,r10 ;@ ARM flags = 68000 flags\n");
+       ot(";@ If so, don't dbra\n");
+       ot("  b%s DbraTrue\n\n",Cond[cc]);
+       break;
+@@ -449,7 +449,7 @@ int OpBranch(int op)
+       break;
+     default:
+       ot(";@ Is the condition true?\n");
+-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
++      ot("  msr CPSR_f,r10 ;@ ARM flags = 68000 flags\n");
+       ot("  b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);
+       break;
+   }
diff --git a/emulators/dgen/patches/patch-cyclone_OpLogic.cpp b/emulators/dgen/patches/patch-cyclone_OpLogic.cpp
new file mode 100644
index 00000000000..033f2742ddf
--- /dev/null
+++ b/emulators/dgen/patches/patch-cyclone_OpLogic.cpp
@@ -0,0 +1,22 @@
+$NetBSD: patch-cyclone_OpLogic.cpp,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- cyclone/OpLogic.cpp.orig	2013-02-09 20:26:18.000000000 +0000
++++ cyclone/OpLogic.cpp
+@@ -362,7 +362,7 @@ int OpSet(int op)
+       break;
+     default:
+       ot(";@ Is the condition true?\n");
+-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
++      ot("  msr CPSR_f,r10 ;@ ARM flags = 68000 flags\n");
+       ot("  mvn%s r1,r1\n",cond[cc]);
+       if (ea<8) ot("  sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);
+       break;
+@@ -487,7 +487,7 @@ static int EmitAsr(int op,int type,int d
+       if (size==2)
+       {
+         ot("  subs r2,r2,#33\n");
+-        ot("  addmis r2,r2,#33 ;@ Now r2=0-%d\n",wide);
++        ot("  addsmi r2,r2,#33 ;@ Now r2=0-%d\n",wide);
+       }
+       else
+       {
diff --git a/emulators/dgen/patches/patch-drz80_drz80.h b/emulators/dgen/patches/patch-drz80_drz80.h
new file mode 100644
index 00000000000..a3fc72280ad
--- /dev/null
+++ b/emulators/dgen/patches/patch-drz80_drz80.h
@@ -0,0 +1,15 @@
+$NetBSD: patch-drz80_drz80.h,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- drz80/drz80.h.orig	2013-02-09 20:26:18.000000000 +0000
++++ drz80/drz80.h
+@@ -63,8 +63,8 @@ struct DrZ80
+   void (*z80_out )(unsigned short p,unsigned char d);
+   unsigned char (*z80_read8)(unsigned short a);
+   unsigned short (*z80_read16)(unsigned short a);
+-  unsigned int (*z80_rebaseSP)(unsigned short new_sp);
+-  unsigned int (*z80_rebasePC)(unsigned short new_pc);
++  uintptr_t (*z80_rebaseSP)(unsigned short new_sp);
++  uintptr_t (*z80_rebasePC)(unsigned short new_pc);
+   unsigned int bla;
+ };
+ 
diff --git a/emulators/dgen/patches/patch-drz80_drz80.s b/emulators/dgen/patches/patch-drz80_drz80.s
new file mode 100644
index 00000000000..435eda16a98
--- /dev/null
+++ b/emulators/dgen/patches/patch-drz80_drz80.s
@@ -0,0 +1,40 @@
+$NetBSD: patch-drz80_drz80.s,v 1.1 2015/03/31 15:20:53 joerg Exp $
+
+--- drz80/drz80.s.orig	2013-02-09 20:26:18.000000000 +0000
++++ drz80/drz80.s
+@@ -252,7 +252,7 @@ pico_z80_write16: @ data, addr
+ 	sub r2,z80pc,r1
+ 	str r2,[cpucontext,#previouspc]
+ .endif
+-	ldrplb r0,[z80pc],#1
++	ldrbpl r0,[z80pc],#1
+ 	ldrpl pc,[opcodes,r0, lsl #2]
+ 	bmi z80_execute_end
+ .endm
+@@ -1385,7 +1385,7 @@ DrZ80Run:
+ .if INTERRUPT_MODE == 0
+ 	;@ check ints
+ 	tst r0,#1
+-	movnes r0,r0,lsr #8
++	movsne r0,r0,lsr #8
+     blne DoInterrupt
+ .endif
+ 
+@@ -1529,7 +1529,7 @@ DoInterrupt_end:
+ 	;@ interupt accepted so callback irq interface
+ 	ldr r0,[cpucontext, #z80irqcallback]
+ 	tst r0,r0
+-	ldmeqfd sp!,{pc}
++	ldmfdeq sp!,{pc}
+ 	stmfd sp!,{r3,r12}
+ 	mov lr,pc
+ 	mov pc,r0    ;@ call callback function
+@@ -5636,7 +5636,7 @@ ei_return:
+ 	ldr opcodes,MAIN_opcodes_POINTER
+ 	;@ check ints
+ 	tst r0,#1
+-	movnes r0,r0,lsr #8
++	movsne r0,r0,lsr #8
+     blne DoInterrupt
+ 	;@ continue
+ ei_return_exit: