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| author | kamil <kamil> | 2016-10-08 14:18:22 +0000 |
|---|---|---|
| committer | kamil <kamil> | 2016-10-08 14:18:22 +0000 |
| commit | 1c82b885b76bf4801923e2210b40ad718f399194 (patch) | |
| tree | 84f04feaf1e29568fabd8b388f9e8f7fc80b98f9 | |
| parent | faf15f50133099276be6f344581bd37e7dd11fe4 (diff) | |
| download | pkgsrc-1c82b885b76bf4801923e2210b40ad718f399194.tar.gz | |
Detach cad/verilog-current
| -rw-r--r-- | cad/Makefile | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/cad/Makefile b/cad/Makefile index c7d37ed4042..30f9283a5a0 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.87 2016/09/16 10:31:59 wiz Exp $ +# $NetBSD: Makefile,v 1.88 2016/10/08 14:18:22 kamil Exp $ # COMMENT= CAD tools @@ -63,7 +63,6 @@ SUBDIR+= tkgate SUBDIR+= tnt-mmtl SUBDIR+= transcalc SUBDIR+= verilog -SUBDIR+= verilog-current SUBDIR+= verilog-mode SUBDIR+= vipec SUBDIR+= wcalc |