diff options
| author | tron <tron> | 1999-03-01 23:46:05 +0000 |
|---|---|---|
| committer | tron <tron> | 1999-03-01 23:46:05 +0000 |
| commit | 29ce0b5a74c663efaddea29ae77004cf70b46ee5 (patch) | |
| tree | ac952d6a50c1d88abc2acc5e89b957ee16b88e49 | |
| parent | bdb0110499def5c0d75637cd7bfa0329d09fc01b (diff) | |
| download | pkgsrc-29ce0b5a74c663efaddea29ae77004cf70b46ee5.tar.gz | |
Patch to get the included "gmp" library working again on "arm32" port
published by Richard Earnshaw on "port-arm32@netbsd.org".
| -rw-r--r-- | security/ssh/patches/patch-al | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/security/ssh/patches/patch-al b/security/ssh/patches/patch-al new file mode 100644 index 00000000000..8df037208fe --- /dev/null +++ b/security/ssh/patches/patch-al @@ -0,0 +1,61 @@ +$NetBSD: patch-al,v 1.3 1999/03/01 23:46:05 tron Exp $ + +--- gmp-2.0.2-ssh-2/longlong.h.orig Thu Apr 30 04:32:35 1998 ++++ gmp-2.0.2-ssh-2/longlong.h Tue Mar 2 00:14:37 1999 +@@ -190,26 +190,40 @@ + "rI" ((USItype)(bh)), \ + "r" ((USItype)(al)), \ + "rI" ((USItype)(bl))) ++#if defined(__ARM_ARCH_3M__) || defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) ++/* Use umull if available */ + #define umul_ppmm(xh, xl, a, b) \ + __asm__ ("%@ Inlined umul_ppmm +- mov %|r0, %2, lsr #16 +- mov %|r2, %3, lsr #16 +- bic %|r1, %2, %|r0, lsl #16 +- bic %|r2, %3, %|r2, lsl #16 +- mul %1, %|r1, %|r2 +- mul %|r2, %|r0, %|r2 +- mul %|r1, %0, %|r1 +- mul %0, %|r0, %0 +- adds %|r1, %|r2, %|r1 ++ umull %0, %1, %2, %3" \ ++ : "=&r" ((USItype) (xl)), \ ++ "=&r" ((USItype) (xh)) \ ++ : "r" ((USItype) (a)), \ ++ "r" ((USItype) (b))) ++#define UMUL_TIME 4 ++#else /* umull */ ++#define umul_ppmm(xh, xl, a, b) \ ++do {register USItype __t0, __t1, __t2; \ ++ __asm__ ("%@ Inlined umul_ppmm ++ mov %2, %5, lsr #16 ++ mov %0, %6, lsr #16 ++ bic %3, %5, %2, lsl #16 ++ bic %4, %6, %0, lsl #16 ++ mul %1, %3, %4 ++ mul %4, %2, %4 ++ mul %3, %0, %3 ++ mul %0, %2, %0 ++ adds %3, %4, %3 + addcs %0, %0, #65536 +- adds %1, %1, %|r1, lsl #16 +- adc %0, %0, %|r1, lsr #16" \ +- : "=&r" ((USItype)(xh)), \ +- "=r" ((USItype)(xl)) \ +- : "r" ((USItype)(a)), \ +- "r" ((USItype)(b)) \ +- : "r0", "r1", "r2") ++ adds %1, %1, %3, lsl #16 ++ adc %0, %0, %3, lsr #16" \ ++ : "=&r" ((USItype) (xh)), \ ++ "=r" ((USItype) (xl)), \ ++ "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ ++ : "r" ((USItype) (a)), \ ++ "r" ((USItype) (b)));} while (0) ++ + #define UMUL_TIME 20 ++#endif /* umull */ + #define UDIV_TIME 100 + #endif /* __arm__ */ + |