summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authormef <mef@pkgsrc.org>2020-09-27 13:48:21 +0000
committermef <mef@pkgsrc.org>2020-09-27 13:48:21 +0000
commit2f75930db02347157d95622db7e9482b90e0c859 (patch)
treeb0b96cf4139a9acddeeea585e94b24b77b58ec9a
parent85eda5539f12b6baf934256c78ce7a4dd8005e9b (diff)
downloadpkgsrc-2f75930db02347157d95622db7e9482b90e0c859.tar.gz
(cad/iverilog) Fix build, adapting to bison 3.7.1
-rw-r--r--cad/iverilog/distinfo4
-rw-r--r--cad/iverilog/patches/patch-tgt-pcb_Makefile.in4
2 files changed, 4 insertions, 4 deletions
diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo
index 61990c1c291..1f0057d162e 100644
--- a/cad/iverilog/distinfo
+++ b/cad/iverilog/distinfo
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.4 2020/03/26 02:37:14 joerg Exp $
+$NetBSD: distinfo,v 1.5 2020/09/27 13:48:21 mef Exp $
SHA1 (verilog-10.1.1.tar.gz) = 7f4cead8cabb90cc4525951357c43866ca710749
RMD160 (verilog-10.1.1.tar.gz) = 77c933b712ab027b13a81e3eead7ee4f565741b7
@@ -7,6 +7,6 @@ Size (verilog-10.1.1.tar.gz) = 1684925 bytes
SHA1 (patch-Makefile.in) = 9e66fedfa8487be3b7f82c152504404545f8bd06
SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa
SHA1 (patch-cadpli_Makefile.in) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
-SHA1 (patch-tgt-pcb_Makefile.in) = a1f77b1763cdcb19bc304708c83f34359f9a3917
+SHA1 (patch-tgt-pcb_Makefile.in) = 0ea212a678aabd7e3d131322fd1a867b3e22611f
SHA1 (patch-vhdlpp_Makefile.in) = feed15f8e8e60c73b0f1f25a62d30fec7fa25a01
SHA1 (patch-vvp_Makefile.in) = 67bef8f6bbf03c8cf548785f5d8124e03771026a
diff --git a/cad/iverilog/patches/patch-tgt-pcb_Makefile.in b/cad/iverilog/patches/patch-tgt-pcb_Makefile.in
index 969fe938708..f938846f498 100644
--- a/cad/iverilog/patches/patch-tgt-pcb_Makefile.in
+++ b/cad/iverilog/patches/patch-tgt-pcb_Makefile.in
@@ -1,4 +1,4 @@
-$NetBSD: patch-tgt-pcb_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+$NetBSD: patch-tgt-pcb_Makefile.in,v 1.2 2020/09/27 13:48:21 mef Exp $
--- tgt-pcb/Makefile.in.orig 2020-03-25 22:40:55.245547401 +0000
+++ tgt-pcb/Makefile.in
@@ -11,7 +11,7 @@ $NetBSD: patch-tgt-pcb_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
- mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@
+ $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.cc $@
+fp.h: $(srcdir)/fp.y
-+ $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.hh $@
++ $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && cp -f fp-tmp1.hh $@
ifeq (@WIN32@,yes)
TGTLDFLAGS=-L.. -livl