diff options
author | tnn <tnn@pkgsrc.org> | 2019-08-23 07:05:18 +0000 |
---|---|---|
committer | tnn <tnn@pkgsrc.org> | 2019-08-23 07:05:18 +0000 |
commit | 5a8020396009267aebf2998664baaf006ba76772 (patch) | |
tree | 70fb59b4dcee97f9b031f4c4c8e64154cbbcd3e4 | |
parent | ae71367d4b9e15710c26ea411be1e7d180b94e09 (diff) | |
download | pkgsrc-5a8020396009267aebf2998664baaf006ba76772.tar.gz |
MesaLib: fix wrong type passed to sysctl(3) arg2
3 files changed, 14 insertions, 14 deletions
diff --git a/graphics/MesaLib/distinfo b/graphics/MesaLib/distinfo index 4343229176a..769bcc074ed 100644 --- a/graphics/MesaLib/distinfo +++ b/graphics/MesaLib/distinfo @@ -1,4 +1,4 @@ -$NetBSD: distinfo,v 1.125 2019/08/22 17:24:01 nia Exp $ +$NetBSD: distinfo,v 1.126 2019/08/23 07:05:18 tnn Exp $ SHA1 (mesa-19.1.4.tar.xz) = 393053bfa41b7fc65add756713004f034c39c3ce RMD160 (mesa-19.1.4.tar.xz) = 1d813c4a212710bb6fa8db184b4618788851cd15 @@ -41,8 +41,8 @@ SHA1 (patch-src_mapi_entry__x86-64__tls.h) = 11b7ef1da435fa17fc7025a46a123d447d6 SHA1 (patch-src_mapi_entry__x86__tls.h) = 11c0f5302d305a77f3a1780d44a2c61f48a66273 SHA1 (patch-src_mapi_u__current.c) = 38d324fcd1c28d155106ccd248edb5eb1aa9ffac SHA1 (patch-src_mapi_u__current.h) = 465a992bd34057e9521f0a33e6f2e25cefc145ca -SHA1 (patch-src_mesa_drivers_dri_i915_intel__screen.c) = e33f51b3502e8c52ff7283aeb807996717f79f4f -SHA1 (patch-src_mesa_drivers_dri_i965_intel__screen.c) = 795b17970e95347222514bacc0701aa86fa1ff02 +SHA1 (patch-src_mesa_drivers_dri_i915_intel__screen.c) = 0b2bd5c4c65fce4577cd20fe0d894c4570d9cc14 +SHA1 (patch-src_mesa_drivers_dri_i965_intel__screen.c) = d5d2b9eb0d6719b3446f9d6afb6c535559a01348 SHA1 (patch-src_mesa_drivers_dri_swrast_swrast.c) = 3106f350e590f62c8bd29cd85f24f977639dccdb SHA1 (patch-src_mesa_main_extensions.c) = 2f48bdb1176c2878bb33bcfab7556172b50a987e SHA1 (patch-src_mesa_main_macros.h) = c5dceaa8dc02a58e5b2273d82e3fe1cc12e327d3 diff --git a/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i915_intel__screen.c b/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i915_intel__screen.c index c94f15b34ed..640d07c98b9 100644 --- a/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i915_intel__screen.c +++ b/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i915_intel__screen.c @@ -1,4 +1,4 @@ -$NetBSD: patch-src_mesa_drivers_dri_i915_intel__screen.c,v 1.3 2019/08/21 13:35:28 nia Exp $ +$NetBSD: patch-src_mesa_drivers_dri_i915_intel__screen.c,v 1.4 2019/08/23 07:05:18 tnn Exp $ Move sys/sysctl.h include because on NetBSD, sysctl.h includes sys/param.h, and sys/param.h defines a one argument ALIGN. Allows mesa to redefine @@ -6,7 +6,7 @@ to a two argument ALIGN. Fix build on older NetBSD w/o _SC_PHYS_PAGES. ---- src/mesa/drivers/dri/i915/intel_screen.c.orig 2017-11-10 23:18:56.000000000 +0000 +--- src/mesa/drivers/dri/i915/intel_screen.c.orig 2019-08-07 16:39:17.000000000 +0000 +++ src/mesa/drivers/dri/i915/intel_screen.c @@ -28,6 +28,11 @@ #include <errno.h> @@ -20,7 +20,7 @@ Fix build on older NetBSD w/o _SC_PHYS_PAGES. #include "main/glheader.h" #include "main/context.h" #include "main/framebuffer.h" -@@ -739,6 +744,13 @@ i915_query_renderer_integer(__DRIscreen +@@ -733,6 +738,13 @@ i915_query_renderer_integer(__DRIscreen const unsigned gpu_mappable_megabytes = (aper_size / (1024 * 1024)) * 3 / 4; @@ -28,13 +28,13 @@ Fix build on older NetBSD w/o _SC_PHYS_PAGES. + int mib[2] = { CTL_HW, HW_PHYSMEM64 }; + uint64_t system_memory_bytes; + size_t len = sizeof(system_memory_bytes); -+ if (sysctl(mib, 2, &system_memory_bytes, &len, NULL, 0) != 0) ++ if (sysctl(mib, 2, (void*)&system_memory_bytes, &len, NULL, 0) != 0) + return -1; +#else const long system_memory_pages = sysconf(_SC_PHYS_PAGES); const long system_page_size = sysconf(_SC_PAGE_SIZE); -@@ -747,6 +759,7 @@ i915_query_renderer_integer(__DRIscreen +@@ -741,6 +753,7 @@ i915_query_renderer_integer(__DRIscreen const uint64_t system_memory_bytes = (uint64_t) system_memory_pages * (uint64_t) system_page_size; diff --git a/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i965_intel__screen.c b/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i965_intel__screen.c index 623c1188482..e22e32305cb 100644 --- a/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i965_intel__screen.c +++ b/graphics/MesaLib/patches/patch-src_mesa_drivers_dri_i965_intel__screen.c @@ -1,4 +1,4 @@ -$NetBSD: patch-src_mesa_drivers_dri_i965_intel__screen.c,v 1.3 2019/08/21 13:35:28 nia Exp $ +$NetBSD: patch-src_mesa_drivers_dri_i965_intel__screen.c,v 1.4 2019/08/23 07:05:18 tnn Exp $ Move sys/sysctl.h include because on NetBSD, sysctl.h includes sys/param.h, and sys/param.h defines a one argument ALIGN. Allows mesa to redefine @@ -6,7 +6,7 @@ to a two argument ALIGN. Fix build on older NetBSD w/o _SC_PHYS_PAGES. ---- src/mesa/drivers/dri/i965/intel_screen.c.orig 2017-11-10 23:18:56.000000000 +0000 +--- src/mesa/drivers/dri/i965/intel_screen.c.orig 2019-08-07 16:39:17.000000000 +0000 +++ src/mesa/drivers/dri/i965/intel_screen.c @@ -27,6 +27,11 @@ #include <errno.h> @@ -20,21 +20,21 @@ Fix build on older NetBSD w/o _SC_PHYS_PAGES. #include "main/context.h" #include "main/framebuffer.h" #include "main/renderbuffer.h" -@@ -1220,6 +1225,13 @@ brw_query_renderer_integer(__DRIscreen * +@@ -1523,6 +1528,13 @@ brw_query_renderer_integer(__DRIscreen * const unsigned gpu_mappable_megabytes = screen->aperture_threshold / (1024 * 1024); +#if defined(HW_PHYSMEM64) && defined(__NetBSD__) + int mib[2] = { CTL_HW, HW_PHYSMEM64 }; -+ const uint64_t system_memory_bytes; ++ uint64_t system_memory_bytes; + size_t len = sizeof(system_memory_bytes); -+ if (sysctl(mib, 2, &system_memory_bytes, &len, NULL, 0) != 0) ++ if (sysctl(mib, 2, (void*)&system_memory_bytes, &len, NULL, 0) != 0) + return -1; +#else const long system_memory_pages = sysconf(_SC_PHYS_PAGES); const long system_page_size = sysconf(_SC_PAGE_SIZE); -@@ -1228,6 +1240,7 @@ brw_query_renderer_integer(__DRIscreen * +@@ -1531,6 +1543,7 @@ brw_query_renderer_integer(__DRIscreen * const uint64_t system_memory_bytes = (uint64_t) system_memory_pages * (uint64_t) system_page_size; |