Depend on libgcc to provide working atomic instructions. Use consistent

types for the 32bit operations, intptr_t can be either int or long.
Clang at least is picky about this.

3 files changed, 108 insertions, 1 deletions

diff --git a/devel/protobuf/distinfo b/devel/protobuf/distinfo
index aa82e64aa33..d84319f45a6 100644
--- a/devel/protobuf/distinfo
+++ b/devel/protobuf/distinfo
@@ -1,6 +1,8 @@
-$NetBSD: distinfo,v 1.3 2013/03/17 14:54:36 wiz Exp $
+$NetBSD: distinfo,v 1.4 2015/02/19 14:12:33 joerg Exp $
 
 SHA1 (protobuf-2.5.0.tar.gz) = 7f6ea7bc1382202fb1ce8c6933f1ef8fea0c0148
 RMD160 (protobuf-2.5.0.tar.gz) = 94755535c75f12db6a34d2f043e59597bea02dda
 Size (protobuf-2.5.0.tar.gz) = 2401901 bytes
 SHA1 (patch-gtest_configure) = 5d17790e1c07336c3e4c08ed575ef74c366f628c
+SHA1 (patch-src_google_protobuf_stubs_atomicops.h) = afc60fb589e13a5ceb40996d3c367243c94c7b6c
+SHA1 (patch-src_google_protobuf_stubs_atomicops__internals__arm__gcc.h) = eea504fd07a52e90b28e93644fd5cc6172011036
diff --git a/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops.h b/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops.h
new file mode 100644
index 00000000000..6a6c0db7e31
--- /dev/null
+++ b/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops.h
@@ -0,0 +1,16 @@
+$NetBSD: patch-src_google_protobuf_stubs_atomicops.h,v 1.1 2015/02/19 14:12:33 joerg Exp $
+
+--- src/google/protobuf/stubs/atomicops.h.orig	2015-02-09 22:44:41.000000000 +0000
++++ src/google/protobuf/stubs/atomicops.h
+@@ -77,7 +77,11 @@ typedef intptr_t Atomic64;
+ 
+ // Use AtomicWord for a machine-sized pointer.  It will use the Atomic32 or
+ // Atomic64 routines below, depending on your architecture.
++#ifdef __arm__
++typedef Atomic32 AtomicWord;
++#else
+ typedef intptr_t AtomicWord;
++#endif
+ 
+ // Atomically execute:
+ //      result = *ptr;
diff --git a/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops__internals__arm__gcc.h b/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops__internals__arm__gcc.h
new file mode 100644
index 00000000000..0d4a6083771
--- /dev/null
+++ b/devel/protobuf/patches/patch-src_google_protobuf_stubs_atomicops__internals__arm__gcc.h
@@ -0,0 +1,89 @@
+$NetBSD: patch-src_google_protobuf_stubs_atomicops__internals__arm__gcc.h,v 1.1 2015/02/19 14:12:33 joerg Exp $
+
+--- src/google/protobuf/stubs/atomicops_internals_arm_gcc.h.orig	2015-02-09 22:54:25.000000000 +0000
++++ src/google/protobuf/stubs/atomicops_internals_arm_gcc.h
+@@ -39,44 +39,19 @@ namespace google {
+ namespace protobuf {
+ namespace internal {
+ 
+-// 0xffff0fc0 is the hard coded address of a function provided by
+-// the kernel which implements an atomic compare-exchange. On older
+-// ARM architecture revisions (pre-v6) this may be implemented using
+-// a syscall. This address is stable, and in active use (hard coded)
+-// by at least glibc-2.7 and the Android C library.
+-typedef Atomic32 (*LinuxKernelCmpxchgFunc)(Atomic32 old_value,
+-                                           Atomic32 new_value,
+-                                           volatile Atomic32* ptr);
+-LinuxKernelCmpxchgFunc pLinuxKernelCmpxchg __attribute__((weak)) =
+-    (LinuxKernelCmpxchgFunc) 0xffff0fc0;
+-
+-typedef void (*LinuxKernelMemoryBarrierFunc)(void);
+-LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) =
+-    (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
+-
+-
+ inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
+                                          Atomic32 old_value,
+                                          Atomic32 new_value) {
+-  Atomic32 prev_value = *ptr;
+-  do {
+-    if (!pLinuxKernelCmpxchg(old_value, new_value,
+-                             const_cast<Atomic32*>(ptr))) {
+-      return old_value;
+-    }
+-    prev_value = *ptr;
+-  } while (prev_value == old_value);
+-  return prev_value;
++  return __sync_val_compare_and_swap(ptr, old_value, new_value);
+ }
+ 
+ inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
+                                          Atomic32 new_value) {
+-  Atomic32 old_value;
++  Atomic32 prev_value;
+   do {
+-    old_value = *ptr;
+-  } while (pLinuxKernelCmpxchg(old_value, new_value,
+-                               const_cast<Atomic32*>(ptr)));
+-  return old_value;
++    prev_value = *ptr;
++  } while (!__sync_bool_compare_and_swap(ptr, prev_value, new_value));
++  return prev_value;
+ }
+ 
+ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
+@@ -86,17 +61,15 @@ inline Atomic32 NoBarrier_AtomicIncremen
+ 
+ inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
+                                         Atomic32 increment) {
+-  for (;;) {
++  Atomic32 old_value;
++  Atomic32 new_value;
++
++  do {
+     // Atomic exchange the old value with an incremented one.
+-    Atomic32 old_value = *ptr;
+-    Atomic32 new_value = old_value + increment;
+-    if (pLinuxKernelCmpxchg(old_value, new_value,
+-                            const_cast<Atomic32*>(ptr)) == 0) {
+-      // The exchange took place as expected.
+-      return new_value;
+-    }
+-    // Otherwise, *ptr changed mid-loop and we need to retry.
+-  }
++    old_value = *ptr;
++    new_value = old_value + increment;
++  } while (!__sync_bool_compare_and_swap(ptr, old_value, new_value));
++  return new_value;
+ }
+ 
+ inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
+@@ -116,7 +89,7 @@ inline void NoBarrier_Store(volatile Ato
+ }
+ 
+ inline void MemoryBarrier() {
+-  pLinuxKernelMemoryBarrier();
++  __sync_synchronize();
+ }
+ 
+ inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {