diff options
| author | drochner <drochner> | 2006-02-10 16:37:51 +0000 |
|---|---|---|
| committer | drochner <drochner> | 2006-02-10 16:37:51 +0000 |
| commit | a72087f254ce40ff7ea26fc114e74537ae9b7af8 (patch) | |
| tree | a409348763a5223637d23f910af3030e50ff84bf /cad/gplcver/DESCR | |
| parent | 9e3ed99fde9bea6f99c1e67364fa003b04aed52e (diff) | |
| download | pkgsrc-a72087f254ce40ff7ea26fc114e74537ae9b7af8.tar.gz | |
import GPL Cver 2.11a, another Verilog simulator
Diffstat (limited to 'cad/gplcver/DESCR')
| -rw-r--r-- | cad/gplcver/DESCR | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/cad/gplcver/DESCR b/cad/gplcver/DESCR new file mode 100644 index 00000000000..952b010d52b --- /dev/null +++ b/cad/gplcver/DESCR @@ -0,0 +1,4 @@ +Cver is a full 1995 IEEE P1364 standard Verilog simulator. It also +implements some of the 2001 P1364 standard features. All three +PLI interfaces (tf_, acc_, and vpi_) are implemented as defined +in the IEEE 2001 P1364 LRM. |