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author | kamil <kamil> | 2016-10-08 23:01:45 +0000 |
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committer | kamil <kamil> | 2016-10-08 23:01:45 +0000 |
commit | eeb160d0d8cf4ea5d94f218d038c2eb202f7b93f (patch) | |
tree | f04061b412172945ea59734611cbafef888f1874 /cad/iverilog/patches/patch-ad | |
parent | dff261dedd56f67fb27e833759f42086452ccb28 (diff) | |
download | pkgsrc-eeb160d0d8cf4ea5d94f218d038c2eb202f7b93f.tar.gz |
Import iverilog (Icarus Verilog) 10.1.1 as cad/iverilog
It's a rename of cad/verilog to a better name.
Updated DESCR for new package:
Icarus Verilog is intended to compile ALL of the Verilog HDL as described in
the IEEE-1364 standard. Of course, it's not quite there yet. It does currently
handle a mix of structural and behavioral constructs.
Icarus Verilog is not aimed at being a simulator in the traditional sense, but
a compiler that generates code employed by back-end tools.
No objections to rename from <gdt>
Diffstat (limited to 'cad/iverilog/patches/patch-ad')
-rw-r--r-- | cad/iverilog/patches/patch-ad | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/cad/iverilog/patches/patch-ad b/cad/iverilog/patches/patch-ad new file mode 100644 index 00000000000..bbbd15f287a --- /dev/null +++ b/cad/iverilog/patches/patch-ad @@ -0,0 +1,25 @@ +$NetBSD: patch-ad,v 1.1 2016/10/08 23:01:45 kamil Exp $ + +make sure no one sneaks a -O* in on us via one of these variables +set in the environment + +--- Makefile.in.orig 2013-08-20 04:10:31.000000000 +0900 ++++ Makefile.in 2013-12-20 11:35:09.000000000 +0900 +@@ -222,6 +222,17 @@ + + lexor.o: lexor.cc parse.h + ++# make sure no one sneaks a -O* in on us via one of these variables ++# set in the environment ++CXX_NOOPT=$(CXX:-O%=) ++CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=) ++CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=) ++ ++parse.o: parse.cc ++ @[ -d dep ] || mkdir dep ++ $(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o ++ mv $*.d dep/$*.d ++ + parse.o: parse.cc + + # Build this in two steps to avoid parallel build issues (see pr3462585) |