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| author | snj <snj@pkgsrc.org> | 2004-01-31 23:35:24 +0000 |
|---|---|---|
| committer | snj <snj@pkgsrc.org> | 2004-01-31 23:35:24 +0000 |
| commit | 78a0ad0709facf35a7b15995f70e615652080f1f (patch) | |
| tree | 1c2cc0babceda955119cc557e98d591013d94dd7 /cad/verilog-current/DESCR | |
| parent | 304b2e7a53efb5a694361068ab4f7c4be9cec98b (diff) | |
| download | pkgsrc-78a0ad0709facf35a7b15995f70e615652080f1f.tar.gz | |
s/seperate/separate/
Diffstat (limited to 'cad/verilog-current/DESCR')
| -rw-r--r-- | cad/verilog-current/DESCR | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/verilog-current/DESCR b/cad/verilog-current/DESCR index 3fa0d7f5888..be6aa3ca681 100644 --- a/cad/verilog-current/DESCR +++ b/cad/verilog-current/DESCR @@ -12,5 +12,5 @@ the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well, and some -1999 features will creep in. Please note that this package is a development snapshot and while it contains -the latest and greatest features, it may be buggy as well. There is a seperate +the latest and greatest features, it may be buggy as well. There is a separate verilog package which is made of the stable releases. |