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authordmcmahill <dmcmahill>2004-11-27 02:50:08 +0000
committerdmcmahill <dmcmahill>2004-11-27 02:50:08 +0000
commit4ff1fa1caec708a4b8c7f4a5ba68a3de327ead19 (patch)
tree16e6beb414d310100874b0f8a4a03df7459e9a1c /cad/verilog-current/Makefile
parent4f18bc6937646cb156e3d4b823cb7e0a3141daad (diff)
downloadpkgsrc-4ff1fa1caec708a4b8c7f4a5ba68a3de327ead19.tar.gz
update to verilog-current 20041004.
Release Notes for Icarus Verilog Snapshot 20041004 Some minor Makefile bugs have been fixed, and source file text formatting has in some cases been normalized for release. Also, configure scripts have been factored for a more consistent build. Fixed continuous assignments to carry strength when needed for correct behavior. This bug led to subtly incorrect reset behavior, but could have caused strength modeling errors in a variety of situations. Fixed some <= vs >= behaviors to be consistent. The results of these comparisons, when sized values are involved, are more standard now.
Diffstat (limited to 'cad/verilog-current/Makefile')
-rw-r--r--cad/verilog-current/Makefile5
1 files changed, 2 insertions, 3 deletions
diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile
index 73824cf1d09..e900b7d50f0 100644
--- a/cad/verilog-current/Makefile
+++ b/cad/verilog-current/Makefile
@@ -1,9 +1,8 @@
-# $NetBSD: Makefile,v 1.43 2004/10/03 00:13:13 tv Exp $
+# $NetBSD: Makefile,v 1.44 2004/11/27 02:50:08 dmcmahill Exp $
#
DISTNAME= verilog-${SNAPDATE}
PKGNAME= verilog-current-${SNAPDATE}
-PKGREVISION= 1
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
@@ -18,7 +17,7 @@ CONFLICTS+= verilog-[0-9]*
USE_BUILDLINK3= yes
BUILD_DEPENDS+= bison-[0-9]*:../../devel/bison
-SNAPDATE= 20040915
+SNAPDATE= 20041004
GNU_CONFIGURE= yes
USE_GNU_TOOLS+= lex make
CONFIGURE_ARGS+= --without-ipal