diff options
| author | dmcmahill <dmcmahill> | 2006-10-10 00:19:49 +0000 |
|---|---|---|
| committer | dmcmahill <dmcmahill> | 2006-10-10 00:19:49 +0000 |
| commit | 9b428253f7219f04ff00352162229b43cb8de611 (patch) | |
| tree | ec9619b66d2d80be827d3b714b12f84b86f82465 /cad/verilog-current | |
| parent | 43f690759b8fd1f94c2c57f63b1d87bcb81f38d1 (diff) | |
| download | pkgsrc-9b428253f7219f04ff00352162229b43cb8de611.tar.gz | |
update to verilog-current-20061009
* Release Notes for Icarus Verilog Snapshot 20061009
The Big news is support for delay path timing is specify blocks. This
includes delay paths and specparams. Back annotation of specify path
timings are not yet implemented.
The "-g" flag has been made a bit more general so that individual
compiler features can be turned on/off. This for example allows for
turning off specify block support and Icarus Verilog extensions, as
well as select language generation.
A variety of bug fixes have been included.
- Missing symbols on Windows fixed.
- mingw build instructions reworked.
- Fix internal handling of -D__ICARUS__ define
- Fix crash of driver when -M flag is used.
- Fix configure detection of host in some subdirectories.
- Handle non-constant delays of index non-blocking assignments.
- $scanf support for real values.
- Fix scheduling of RWsync vs. ROSync callbacks.
- Fix vpi_put_userdata return value.
The iverilog-vpi command now allows .cpp files to stand for C++
source.
Diffstat (limited to 'cad/verilog-current')
| -rw-r--r-- | cad/verilog-current/Makefile | 4 | ||||
| -rw-r--r-- | cad/verilog-current/distinfo | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile index 25bb87b5bc9..e13bb742af8 100644 --- a/cad/verilog-current/Makefile +++ b/cad/verilog-current/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.52 2006/08/11 13:28:08 dmcmahill Exp $ +# $NetBSD: Makefile,v 1.53 2006/10/10 00:19:49 dmcmahill Exp $ # DISTNAME= verilog-${SNAPDATE} @@ -17,7 +17,7 @@ CONFLICTS+= verilog-[0-9]* GCC_REQD+= 3.0 USE_LANGUAGES= c c++ -SNAPDATE= 20060809 +SNAPDATE= 20061009 GNU_CONFIGURE= yes USE_TOOLS+= bison gmake lex CONFIGURE_ARGS+= --without-ipal diff --git a/cad/verilog-current/distinfo b/cad/verilog-current/distinfo index c99eb5fb4e8..2088aebdec5 100644 --- a/cad/verilog-current/distinfo +++ b/cad/verilog-current/distinfo @@ -1,6 +1,6 @@ -$NetBSD: distinfo,v 1.26 2006/08/11 13:28:08 dmcmahill Exp $ +$NetBSD: distinfo,v 1.27 2006/10/10 00:19:49 dmcmahill Exp $ -SHA1 (verilog-20060809.tar.gz) = a24c822230472df69c646366f5a6a8ff79386965 -RMD160 (verilog-20060809.tar.gz) = b34fe487677aaf4f417649b7cad7e7bf994d16be -Size (verilog-20060809.tar.gz) = 1584583 bytes +SHA1 (verilog-20061009.tar.gz) = 0dbb5385d7e332eadcaeb589ea1d2d31980eb237 +RMD160 (verilog-20061009.tar.gz) = de4501f311b09b89b649570cfcb6b95603f22cc4 +Size (verilog-20061009.tar.gz) = 1604430 bytes SHA1 (patch-ad) = 9492af75153405c49076f2dcd11d2dc338640514 |