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authordmcmahill <dmcmahill@pkgsrc.org>2002-10-14 02:28:18 +0000
committerdmcmahill <dmcmahill@pkgsrc.org>2002-10-14 02:28:18 +0000
commitde8c84b1c7a70db7b8aa99a02709f919b47ea4eb (patch)
tree31e2d25fe948013828cf88254e5a9c81665c313f /cad/verilog-mode/MESSAGE
parent6763cdc3c107202f84b0d4f66a2ca0d288a7a9bd (diff)
downloadpkgsrc-de8c84b1c7a70db7b8aa99a02709f919b47ea4eb.tar.gz
initial import of verilog-mode-3.60
This is a major mode for editing Verilog HDL source code under GNU Emacs or XEmacs.
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+===========================================================================
+$NetBSD: MESSAGE,v 1.1.1.1 2002/10/14 02:28:18 dmcmahill Exp $
+
+You will need to add something like the following to your .emacs.el (or
+default.el) file to autoload Verilog mode for Emacs.
+
+(setq auto-mode-alist
+ (append auto-mode-alist
+ '(("\\.v$" . verilog-mode))))
+(autoload 'verilog-mode "verilog-mode"
+ "Major mode for editing Verilog HDL sources." t)
+
+===========================================================================