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authorgrant <grant@pkgsrc.org>2003-07-17 21:21:03 +0000
committergrant <grant@pkgsrc.org>2003-07-17 21:21:03 +0000
commit91f00f1cbc7c8da0ab83a0389a02496e55f8a468 (patch)
treebe2001c436c6531467a1efa67ee15e2d12e79fba /cad/verilog
parent4bf9cd97ccb38c5bf0964202570fa688c91e6fc7 (diff)
downloadpkgsrc-91f00f1cbc7c8da0ab83a0389a02496e55f8a468.tar.gz
s/netbsd.org/NetBSD.org/
Diffstat (limited to 'cad/verilog')
-rw-r--r--cad/verilog/Makefile4
1 files changed, 2 insertions, 2 deletions
diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile
index aa28bad22e8..e823549bbcc 100644
--- a/cad/verilog/Makefile
+++ b/cad/verilog/Makefile
@@ -1,11 +1,11 @@
-# $NetBSD: Makefile,v 1.13 2002/12/15 01:57:12 dmcmahill Exp $
+# $NetBSD: Makefile,v 1.14 2003/07/17 21:25:26 grant Exp $
#
DISTNAME= verilog-0.7
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v0.7/
-MAINTAINER= dmcmahill@netbsd.org
+MAINTAINER= dmcmahill@NetBSD.org
HOMEPAGE= http://icarus.com/eda/verilog/index.html
COMMENT= Verilog simulation and synthesis tool (stable release version)