update to verilog-0.5

* The Big Change: VVP

Past versions of Icarus Verilog performed simulation by compiling the
Verilog design to intermediate C++ code, then in turn compiling that
C++ (usually with G++) to a binary executable. This program was then
executed to actually run the simulation.

The 0.5 compiler, however, uses a custom internal language called
"vvp." The vvp code generator writes a program in the vvp language
that the vvp interpreter executes. This gets runtime performance
similar to the older vvm method, but compile times are much faster.

The result of this change is that there is a new program, ``vvp'',
that is installed with the existing ``iverilog'' compiler. This
program actually executes the simulation generated by the vvp code
generator.

There are manual pages for the iverilog command and the new vvp
command, as well as a QUICK_START document to help you run your first
simulation.

* What Else Is New

The compiler itself is now a lot more robust. While it still does not
compile and understand the entire IEEE1364 standard, the compiler is
less likely to crash on bad input, gives better error messages, and
has generally been cleaned up.

8 files changed, 33 insertions, 111 deletions

diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile
index 095e0804b47..67728beb75b 100644
--- a/cad/verilog/Makefile
+++ b/cad/verilog/Makefile
@@ -1,9 +1,9 @@
-# $NetBSD: Makefile,v 1.9 2001/06/11 06:34:20 jlam Exp $
+# $NetBSD: Makefile,v 1.10 2001/08/04 01:20:43 dmcmahill Exp $
 #
 
-DISTNAME=	verilog-0.4
+DISTNAME=	verilog-0.5
 CATEGORIES=	cad
-MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/v0.4/
+MASTER_SITES=	ftp://icarus.com/pub/eda/verilog/v0.5/
 
 MAINTAINER=	dmcmahill@netbsd.org
 HOMEPAGE=	http://icarus.com/eda/verilog/index.html
@@ -11,13 +11,16 @@ COMMENT=	Verilog simulation and synthesis tool (stable release version)
 
 BUILD_DEPENDS+=	bison-*:../../devel/bison
 BUILD_DEPENDS+=	gperf-2.7.2:../../devel/gperf
-DEPENDS+=	ipal-current>=20001210:../../cad/ipal-current
+#
+# turn this back on when ipal comes along a little further
+#DEPENDS+=	ipal-current>=20001210:../../cad/ipal-current
 
 CONFLICTS+=	verilog-current-[0-9]*
 
 GNU_CONFIGURE=	yes
 USE_GMAKE=	yes
 # to find ipal.h:
-CPPFLAGS+=	-I${LOCALBASE}/include
+#CPPFLAGS+=	-I${LOCALBASE}/include
+CONFIGURE_ARGS+=	--without-ipal
 
 .include "../../mk/bsd.pkg.mk"
diff --git a/cad/verilog/distinfo b/cad/verilog/distinfo
index 185892bde40..fe87fc720d2 100644
--- a/cad/verilog/distinfo
+++ b/cad/verilog/distinfo
@@ -1,9 +1,5 @@
-$NetBSD: distinfo,v 1.2 2001/04/19 16:27:02 agc Exp $
+$NetBSD: distinfo,v 1.3 2001/08/04 01:20:43 dmcmahill Exp $
 
-SHA1 (verilog-0.4.tar.gz) = 45abb8f23e0840607fd015d8dcbf6998740552ed
-Size (verilog-0.4.tar.gz) = 415556 bytes
-SHA1 (patch-aa) = c3dc0e5fe51f96e7eda931a8b48fda89728cd0ba
-SHA1 (patch-ab) = 0d70284459525ab8fd361e4488ad641c31180e96
-SHA1 (patch-ac) = 99853f31b59a7ac97207bab2d9b3ff8d7802e5cc
-SHA1 (patch-ad) = ebd01d8ffbc55d8cd98682e07c22d2e30218d285
-SHA1 (patch-ae) = 505d85af137424780ebde0aeccaf389cd9fbe987
+SHA1 (verilog-0.5.tar.gz) = 5f21696e8a908dbbd613f7f55cfbd32abdb7577e
+Size (verilog-0.5.tar.gz) = 643405 bytes
+SHA1 (patch-ad) = 3c035d32d011d81520e428e3dd9adae435fc63e7
diff --git a/cad/verilog/patches/patch-aa b/cad/verilog/patches/patch-aa
deleted file mode 100644
index d762afcd46e..00000000000
--- a/cad/verilog/patches/patch-aa
+++ /dev/null
@@ -1,54 +0,0 @@
-$NetBSD: patch-aa,v 1.5 2001/02/07 18:26:17 dmcmahill Exp $
-
---- tgt-null/null.c.orig	Fri Dec  1 23:50:32 2000
-+++ tgt-null/null.c	Sun Feb  4 12:41:40 2001
-@@ -25,5 +25,5 @@
-  */
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- 
- 
---- tgt-pal/enables.c.orig	Fri Dec  8 22:42:52 2000
-+++ tgt-pal/enables.c	Sun Feb  4 12:41:50 2001
-@@ -20,3 +20,3 @@
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- # include  <assert.h>
---- tgt-pal/fit_log.c.orig	Thu Dec 14 18:37:47 2000
-+++ tgt-pal/fit_log.c	Sun Feb  4 12:41:59 2001
-@@ -21,5 +21,5 @@
- #endif
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- # include  <stdio.h>
- # include  <stdlib.h>
---- tgt-pal/fit_reg.c.orig	Sun Jan 14 19:05:39 2001
-+++ tgt-pal/fit_reg.c	Sun Feb  4 12:42:08 2001
-@@ -21,5 +21,5 @@
- #endif
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- # include  <stdio.h>
- # include  <assert.h>
---- tgt-stub/stub.c.orig	Sun Jan 14 19:47:02 2001
-+++ tgt-stub/stub.c	Sun Feb  4 12:42:21 2001
-@@ -28,5 +28,5 @@
-  */
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- # include  <stdio.h>
- 
---- tgt-verilog/verilog.c.orig	Sun Jan 14 19:05:39 2001
-+++ tgt-verilog/verilog.c	Wed Feb  7 10:48:53 2001
-@@ -27,5 +27,5 @@
-  */
- 
--# include  <ivl_target.h>
-+# include  "ivl_target.h"
- # include  <stdio.h>
- # include  <assert.h>
diff --git a/cad/verilog/patches/patch-ab b/cad/verilog/patches/patch-ab
deleted file mode 100644
index fb8d2291762..00000000000
--- a/cad/verilog/patches/patch-ab
+++ /dev/null
@@ -1,11 +0,0 @@
-$NetBSD: patch-ab,v 1.5 2001/02/07 18:26:17 dmcmahill Exp $
-
---- tgt-verilog/Makefile.in.orig	Thu Dec 14 18:38:04 2000
-+++ tgt-verilog/Makefile.in	Wed Feb  7 11:12:00 2001
-@@ -48,5 +48,5 @@
- %.o: %.c
- 	@[ -d dep ] || mkdir dep
--	$(CC) -Wall $(CPPFLAGS) -I$(srcdir)/.. -MD -c $< -o $*.o
-+	$(CC) -Wall -I$(srcdir)/.. $(CPPFLAGS) -MD -c $< -o $*.o
- 	mv $*.d dep
- 
diff --git a/cad/verilog/patches/patch-ac b/cad/verilog/patches/patch-ac
deleted file mode 100644
index 38c8f827517..00000000000
--- a/cad/verilog/patches/patch-ac
+++ /dev/null
@@ -1,11 +0,0 @@
-$NetBSD: patch-ac,v 1.5 2001/02/07 18:26:17 dmcmahill Exp $
-
---- tgt-stub/Makefile.in.orig	Thu Dec 14 18:38:04 2000
-+++ tgt-stub/Makefile.in	Wed Feb  7 12:25:22 2001
-@@ -48,5 +48,5 @@
- %.o: %.c
- 	@[ -d dep ] || mkdir dep
--	$(CC) -Wall $(CPPFLAGS) -I$(srcdir)/.. -MD -c $< -o $*.o
-+	$(CC) -Wall -I$(srcdir)/.. $(CPPFLAGS)  -MD -c $< -o $*.o
- 	mv $*.d dep
- 
diff --git a/cad/verilog/patches/patch-ad b/cad/verilog/patches/patch-ad
index 28162a65205..eabde9cbc2f 100644
--- a/cad/verilog/patches/patch-ad
+++ b/cad/verilog/patches/patch-ad
@@ -1,15 +1,22 @@
-$NetBSD: patch-ad,v 1.5 2001/02/04 15:36:50 dmcmahill Exp $
+$NetBSD: patch-ad,v 1.6 2001/08/04 01:20:44 dmcmahill Exp $
 
 work around a c++ -O2 bug which is present on at least sparc 
 and pmax using egcs-1.1.1 
 
---- Makefile.in.orig	Fri Dec  8 20:17:38 2000
-+++ Makefile.in	Sat Dec 16 19:07:25 2000
-@@ -137,4 +137,7 @@
+--- Makefile.in.orig	Sun Mar 25 00:59:46 2001
++++ Makefile.in	Wed May 16 09:38:37 2001
+@@ -143,5 +143,14 @@
+ lexor.o: lexor.cc parse.h
  
++# make sure no one sneaks a -O* in on us via one of these variables
++# set in the environment
++CXX_NOOPT=$(CXX:-O%=)
++CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=)
++CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=)
++
  parse.o: parse.cc
 +	@[ -d dep ] || mkdir dep
-+	$(CXX) -MD -c -I. $(CPPFLAGS)  $<
-+	mv parse.d dep/parse.d
++	$(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o
++	mv $*.d dep/$*.d
  
  parse.h parse.cc: $(srcdir)/parse.y
diff --git a/cad/verilog/patches/patch-ae b/cad/verilog/patches/patch-ae
deleted file mode 100644
index f885662d8fe..00000000000
--- a/cad/verilog/patches/patch-ae
+++ /dev/null
@@ -1,11 +0,0 @@
-$NetBSD: patch-ae,v 1.4 2001/02/07 18:26:17 dmcmahill Exp $
-
---- tgt-pal/Makefile.in.orig	Wed Jan 17 22:09:45 2001
-+++ tgt-pal/Makefile.in	Wed Feb  7 12:44:30 2001
-@@ -48,5 +48,5 @@
- %.o: %.c
- 	@[ -d dep ] || mkdir dep
--	$(CC) -Wall $(CPPFLAGS) -I$(srcdir)/.. -MD -c $< -o $*.o
-+	$(CC) -Wall -I$(srcdir)/.. $(CPPFLAGS) -MD -c $< -o $*.o
- 	mv $*.d dep
- 
diff --git a/cad/verilog/pkg/PLIST b/cad/verilog/pkg/PLIST
index b80c9050f5d..211e0144234 100644
--- a/cad/verilog/pkg/PLIST
+++ b/cad/verilog/pkg/PLIST
@@ -1,5 +1,6 @@
-@comment $NetBSD: PLIST,v 1.3 2001/02/04 15:36:51 dmcmahill Exp $
+@comment $NetBSD: PLIST,v 1.4 2001/08/04 01:20:44 dmcmahill Exp $
 bin/iverilog
+bin/vvp
 include/ivl_target.h
 include/vpi_priv.h
 include/vpi_user.h
@@ -10,13 +11,15 @@ include/vvm_gates.h
 include/vvm_nexus.h
 include/vvm_signal.h
 include/vvm_thread.h
-lib/ivl/iverilog.conf
+lib/libvpi.a
+lib/libvpip.a
+lib/libvvm.a
 lib/ivl/ivl
+lib/ivl/iverilog.conf
 lib/ivl/ivlpp
 lib/ivl/null.tgt
-lib/ivl/pal.tgt
 lib/ivl/system.vpi
-lib/libvpip.a
-lib/libvvm.a
+lib/ivl/vvp.tgt
 man/man1/iverilog.1
+man/man1/vvp.1
 @dirrm lib/ivl