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authordmcmahill <dmcmahill@pkgsrc.org>2002-01-16 19:33:18 +0000
committerdmcmahill <dmcmahill@pkgsrc.org>2002-01-16 19:33:18 +0000
commita4bd69521a8ec30b17d929f0646c3df03313c2e1 (patch)
tree7acfaad06b56f6c1ab017632a0d5b0f734a06064 /cad
parent3a04e0665f203ef536ba657ca46c8470689f74b0 (diff)
downloadpkgsrc-a4bd69521a8ec30b17d929f0646c3df03313c2e1.tar.gz
update to verilog-current-20020112
many many changes since the last packaged snapshot. A brief sampling of the changes (which include many bug fixes and enhancements) is: A variety of little problems with $display format strings have been fixed. The % operand should now simulate properly. Also, the * operator is a little bit more optimized, and works in constant expressions. Several bugs in strength modeling have been fixed. This includes drive strengths on continuous assignments, which in the past generated code without the strengths. Also, vvp gained some missing support for constants with strength. I think that strength modeling is now complete. vpi_get_vlog_info support has been added to the vvp run-time. This is a PLI function that allows access to run-time command flags. Also, vpi access to root modules now works properly.
Diffstat (limited to 'cad')
-rw-r--r--cad/verilog-current/Makefile12
-rw-r--r--cad/verilog-current/distinfo6
2 files changed, 12 insertions, 6 deletions
diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile
index 3986a557077..290892faf5b 100644
--- a/cad/verilog-current/Makefile
+++ b/cad/verilog-current/Makefile
@@ -1,8 +1,8 @@
-# $NetBSD: Makefile,v 1.23 2001/12/15 18:43:37 dmcmahill Exp $
+# $NetBSD: Makefile,v 1.24 2002/01/16 19:33:18 dmcmahill Exp $
#
-DISTNAME= verilog-20011209
-PKGNAME= verilog-current-20011209
+DISTNAME= verilog-20020112
+PKGNAME= verilog-current-20020112
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
@@ -24,5 +24,11 @@ USE_GMAKE= yes
#CPPFLAGS+= -I${LOCALBASE}/include
#CONFIGURE_ENV+= CPPFLAGS="${CPPFLAGS}" LDFLAGS+="${LDFLAGS}"
CONFIGURE_ARGS+= --without-ipal
+YACC= ${LOCALBASE}/bin/bison
+
+test: build
+ cd ${WRKSRC} && \
+ ${MAKE_ENV} ${MAKE_PROGRAM} check 2>&1 | \
+ tee ${WRKDIR}/tests.log
.include "../../mk/bsd.pkg.mk"
diff --git a/cad/verilog-current/distinfo b/cad/verilog-current/distinfo
index b9886fa02a6..48d28f1ac47 100644
--- a/cad/verilog-current/distinfo
+++ b/cad/verilog-current/distinfo
@@ -1,5 +1,5 @@
-$NetBSD: distinfo,v 1.7 2001/12/15 18:43:37 dmcmahill Exp $
+$NetBSD: distinfo,v 1.8 2002/01/16 19:33:18 dmcmahill Exp $
-SHA1 (verilog-20011209.tar.gz) = 51e41d85b45c919274df7e107653cf7dbec8fe5a
-Size (verilog-20011209.tar.gz) = 710175 bytes
+SHA1 (verilog-20020112.tar.gz) = 0e07f73cf7514a2d669a63b5990562a41dd0d85a
+Size (verilog-20020112.tar.gz) = 719621 bytes
SHA1 (patch-ad) = 3c035d32d011d81520e428e3dd9adae435fc63e7