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| author | drochner <drochner@pkgsrc.org> | 2004-03-02 15:34:07 +0000 |
|---|---|---|
| committer | drochner <drochner@pkgsrc.org> | 2004-03-02 15:34:07 +0000 |
| commit | fa1bf35d64ef01b9f497e0e2a559a8a5c9e2e7e9 (patch) | |
| tree | 8822028cd40148c9f9494c47eea97784d183069d /cad | |
| parent | 2aadeff11c410f6bf035ea8555117ca43d284dcc (diff) | |
| download | pkgsrc-fa1bf35d64ef01b9f497e0e2a559a8a5c9e2e7e9.tar.gz | |
update to the 20040220 snapshot
changes: bugfixes, VPI extensions
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/verilog-current/Makefile | 6 | ||||
| -rw-r--r-- | cad/verilog-current/PLIST | 12 | ||||
| -rw-r--r-- | cad/verilog-current/distinfo | 6 |
3 files changed, 16 insertions, 8 deletions
diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile index b683daad9ef..97699b8f354 100644 --- a/cad/verilog-current/Makefile +++ b/cad/verilog-current/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.36 2004/01/22 07:21:55 grant Exp $ +# $NetBSD: Makefile,v 1.37 2004/03/02 15:34:07 drochner Exp $ # DISTNAME= verilog-${SNAPDATE} @@ -11,13 +11,13 @@ HOMEPAGE= http://icarus.com/eda/verilog/index.html COMMENT= Verilog simulation and synthesis tool (development snapshot version) BUILD_DEPENDS+= bison-[0-9]*:../../devel/bison -BUILD_DEPENDS+= gperf-2.7.2:../../devel/gperf +BUILD_DEPENDS+= gperf-[0-9]*:../../devel/gperf # turn this back on when ipal comes along a little further #DEPENDS+= ipal-current>=20001210:../../cad/ipal-current CONFLICTS+= verilog-[0-9]* -SNAPDATE= 20030815 +SNAPDATE= 20040220 USE_BUILDLINK2= yes GNU_CONFIGURE= yes USE_GNU_TOOLS+= make diff --git a/cad/verilog-current/PLIST b/cad/verilog-current/PLIST index 135223d5d12..f67585c4209 100644 --- a/cad/verilog-current/PLIST +++ b/cad/verilog-current/PLIST @@ -1,4 +1,4 @@ -@comment $NetBSD: PLIST,v 1.5 2003/07/14 09:51:48 drochner Exp $ +@comment $NetBSD: PLIST,v 1.6 2004/03/02 15:34:07 drochner Exp $ bin/iverilog bin/iverilog-vpi bin/vvp @@ -10,14 +10,22 @@ include/vpi_user.h lib/libveriuser.a lib/libvpi.a lib/ivl/cadpli.vpl +lib/ivl/fpga-s.conf +lib/ivl/fpga.conf lib/ivl/fpga.tgt lib/ivl/ivl -lib/ivl/iverilog.conf lib/ivl/ivlpp +lib/ivl/null-s.conf +lib/ivl/null.conf lib/ivl/null.tgt lib/ivl/system.vpi +lib/ivl/vvp-s.conf +lib/ivl/vvp.conf lib/ivl/vvp.tgt +lib/ivl/xnf-s.conf +lib/ivl/xnf.conf man/man1/iverilog.1 +man/man1/iverilog-fpga.1 man/man1/iverilog-vpi.1 man/man1/vvp.1 @dirrm lib/ivl diff --git a/cad/verilog-current/distinfo b/cad/verilog-current/distinfo index 85ffe0f5525..18d3f03e2d8 100644 --- a/cad/verilog-current/distinfo +++ b/cad/verilog-current/distinfo @@ -1,5 +1,5 @@ -$NetBSD: distinfo,v 1.18 2003/08/25 11:21:50 drochner Exp $ +$NetBSD: distinfo,v 1.19 2004/03/02 15:34:07 drochner Exp $ -SHA1 (verilog-20030815.tar.gz) = 64ee9ca573882fd2a414fc62ee17302fc0bca26e -Size (verilog-20030815.tar.gz) = 1246700 bytes +SHA1 (verilog-20040220.tar.gz) = 22b09fced8cbc5cc0665574d03595aa367ccdb3b +Size (verilog-20040220.tar.gz) = 1354505 bytes SHA1 (patch-ad) = ef3fe90fb096b96807b2e5766f3ac6849867352a |