Add patches from Matt Fredette to (a) avoid a diagnostic assertion when

emulating m68k read-modify-write cycles in debug versions and (b) fix
emulation of fmovl to the fpcr register with an immediate source value.

4 files changed, 115 insertions, 0 deletions

diff --git a/emulators/tme/patches/patch-ic_m68k_m6888x.c b/emulators/tme/patches/patch-ic_m68k_m6888x.c
new file mode 100644
index 00000000000..e1cbb3fb97b
--- /dev/null
+++ b/emulators/tme/patches/patch-ic_m68k_m6888x.c
@@ -0,0 +1,34 @@
+$NetBSD: patch-ic_m68k_m6888x.c,v 1.1 2013/12/28 19:16:48 martin Exp $
+
+Patch from upstream CVS: fix emulation of fmovel #IMM, %fpcr
+
+--- ic/m68k/m6888x.c.orig	2007-08-25 22:37:30.000000000 +0200
++++ ic/m68k/m6888x.c	2013-12-23 13:12:54.000000000 +0100
+@@ -1765,9 +1765,10 @@ TME_M68K_INSN(tme_m68k_fmovemctl)
+   }
+ 
+   /* if this isn't a data register direct EA or an address register
+-     direct EA, this instruction can fault: */
++     direct EA or an immediate EA, this instruction can fault: */
+   if (ea_mode != 0
+-      && ea_mode != 1) {
++      && ea_mode != 1
++      && (ea_mode != 7 || ea_reg != 4)) {
+     TME_M68K_INSN_CANFAULT;
+   }
+ 
+@@ -1822,6 +1823,14 @@ TME_M68K_INSN(tme_m68k_fmovemctl)
+       }
+     }
+ 
++    /* if this is an immediate EA: */
++    else if (ea_mode == 7 && ea_reg == 4) {
++      if (__tme_predict_false(register_to_memory)) {
++	TME_M68K_INSN_EXCEPTION(TME_M68K_EXCEPTION_ILL);
++      }
++      *value = ic->tme_m68k_ireg_imm32;
++    }
++
+     /* otherwise, this is a memory EA: */
+     else {
+       if (register_to_memory) {
diff --git a/emulators/tme/patches/patch-ic_m68k_m68k-insns-auto.sh b/emulators/tme/patches/patch-ic_m68k_m68k-insns-auto.sh
new file mode 100644
index 00000000000..b65cc4c82d8
--- /dev/null
+++ b/emulators/tme/patches/patch-ic_m68k_m68k-insns-auto.sh
@@ -0,0 +1,17 @@
+$NetBSD: patch-ic_m68k_m68k-insns-auto.sh,v 1.1 2013/12/28 19:16:48 martin Exp $
+
+Fix from upstream CVS: fix sequencing for cas32 (avoid a diag assert)
+
+--- ic/m68k/m68k-insns-auto.sh.orig	2009-08-29 21:38:23.000000000 +0200
++++ ic/m68k/m68k-insns-auto.sh	2013-12-23 13:12:54.000000000 +0100
+@@ -900,6 +900,10 @@ for size in 8 16 32; do
+    	echo -n "    ic->tme_m68k_ireg_memx${size} = "
+ 	if test ${size} != 8; then echo -n "tme_betoh_u${size}"; fi
+ 	echo "(value_mem);"
++	echo ""
++	echo "    /* step the transfer count once for the read, and once for the write: */"
++	echo "    TME_M68K_SEQUENCE_TRANSFER_STEP;"
++	echo "    TME_M68K_SEQUENCE_TRANSFER_STEP;"
+ 	echo "  }"
+ 	echo ""
+ 	echo "  /* compare the compare operand to the effective address operand: */"
diff --git a/emulators/tme/patches/patch-ic_m68k_m68k-m68k-insns.c b/emulators/tme/patches/patch-ic_m68k_m68k-m68k-insns.c
new file mode 100644
index 00000000000..f0026c7d356
--- /dev/null
+++ b/emulators/tme/patches/patch-ic_m68k_m68k-m68k-insns.c
@@ -0,0 +1,17 @@
+$NetBSD: patch-ic_m68k_m68k-m68k-insns.c,v 1.1 2013/12/28 19:16:48 martin Exp $
+
+Fix from upstream CVS: fix sequencing for tas (avoid diag assert)
+
+--- ic/m68k/m68k-insns.c.orig	2007-08-26 00:05:02.000000000 +0200
++++ ic/m68k/m68k-insns.c	2013-12-23 13:12:54.000000000 +0100
+@@ -288,6 +288,10 @@ TME_M68K_INSN(tme_m68k_tas)
+ 
+     /* store the value read: */
+     ic->tme_m68k_ireg_memx8 = value;
++
++    /* step the transfer count once for the read, and once for the write: */
++    TME_M68K_SEQUENCE_TRANSFER_STEP;
++    TME_M68K_SEQUENCE_TRANSFER_STEP;
+   }
+       
+   /* the modify part of the read/modify/write cycle: */
diff --git a/emulators/tme/patches/patch-ic_m68k_m68k-misc.c b/emulators/tme/patches/patch-ic_m68k_m68k-misc.c
new file mode 100644
index 00000000000..49d471c2a8a
--- /dev/null
+++ b/emulators/tme/patches/patch-ic_m68k_m68k-misc.c
@@ -0,0 +1,47 @@
+$NetBSD: patch-ic_m68k_m68k-misc.c,v 1.1 2013/12/28 19:16:48 martin Exp $
+
+Fix from upstream CVS: fix sequencing and fault handling for read-modify-write
+instructions.
+
+--- ic/m68k/m68k-misc.c.orig	2009-08-29 21:47:52.000000000 +0200
++++ ic/m68k/m68k-misc.c	2013-12-23 13:12:54.000000000 +0100
+@@ -1441,6 +1441,9 @@ tme_m68k_rmw_start(struct tme_m68k *ic,
+   tme_uint32_t *buffer_reg;
+   int supported;
+ 
++  /* this instruction can fault: */
++  TME_M68K_INSN_CANFAULT;
++
+   /* if the user reran the cycle: */
+   if (TME_M68K_SEQUENCE_RESTARTING
+       && (ic->_tme_m68k_group0_buffer_read_softrr > 0
+@@ -1754,9 +1757,6 @@ tme_m68k_rmw_start(struct tme_m68k *ic,
+ 	  tlbs_busy[!tlb_i] = FALSE;
+ 	}
+ 
+-	/* this instruction can fault: */
+-	TME_M68K_INSN_CANFAULT;
+-
+ 	/* do a slow read.  if this is the first address, we start a
+ 	   slow read-modify-write cycle, otherwise we do a normal slow
+ 	   read cycle: */
+@@ -1869,6 +1869,9 @@ tme_m68k_rmw_start(struct tme_m68k *ic,
+ 
+       /* byteswap the value read: */
+       *buffer_reg = tme_betoh_u32(*buffer_reg);
++
++      /* step the transfer count: */
++      TME_M68K_SEQUENCE_TRANSFER_STEP;
+     
+     } while (++address_i < rmw->tme_m68k_rmw_address_count);
+   }
+@@ -1990,6 +1993,9 @@ tme_m68k_rmw_finish(struct tme_m68k *ic,
+ 	      + (sizeof(ic->tme_m68k_ireg_memx32)
+ 		 - rmw->tme_m68k_rmw_size)),
+ 	     rmw->tme_m68k_rmw_size);
++
++      /* step the transfer count: */
++      TME_M68K_SEQUENCE_TRANSFER_STEP;
+     }
+ 
+   } while (++address_i < rmw->tme_m68k_rmw_address_count);