diff options
author | rillig <rillig> | 2006-06-26 10:56:57 +0000 |
---|---|---|
committer | rillig <rillig> | 2006-06-26 10:56:57 +0000 |
commit | 769c4bcf7c31fad1b7c1f447cafc8242590a67a2 (patch) | |
tree | 69fc63318864cd32a8964eb612a41a4fd3139d4e /emulators | |
parent | 0dd373f7b36c4b17ece51ab895e77fa6d5c0d917 (diff) | |
download | pkgsrc-769c4bcf7c31fad1b7c1f447cafc8242590a67a2.tar.gz |
Added four patches that replace reserved identifiers with allowed ones.
Fixes the build on NetBSD, which also defines the same identifiers, but
is allowed to.
Diffstat (limited to 'emulators')
-rw-r--r-- | emulators/gcube/distinfo | 6 | ||||
-rw-r--r-- | emulators/gcube/patches/patch-ad | 102 | ||||
-rw-r--r-- | emulators/gcube/patches/patch-ae | 26 | ||||
-rw-r--r-- | emulators/gcube/patches/patch-af | 44 | ||||
-rw-r--r-- | emulators/gcube/patches/patch-ag | 44 |
5 files changed, 221 insertions, 1 deletions
diff --git a/emulators/gcube/distinfo b/emulators/gcube/distinfo index 63ef63c173a..3b0eea9eaf7 100644 --- a/emulators/gcube/distinfo +++ b/emulators/gcube/distinfo @@ -1,4 +1,4 @@ -$NetBSD: distinfo,v 1.3 2006/01/10 14:33:26 jmmv Exp $ +$NetBSD: distinfo,v 1.4 2006/06/26 10:56:57 rillig Exp $ SHA1 (gcube-0.4-src.tar.bz2) = dae967f8aedfc2115c3720dfe2c523128fddc8b6 RMD160 (gcube-0.4-src.tar.bz2) = 9a7c13ed611da22705f960686eea225e30b61dc6 @@ -6,3 +6,7 @@ Size (gcube-0.4-src.tar.bz2) = 803503 bytes SHA1 (patch-aa) = 285ae801f3e000420713e4e9b22d20fb55b12e3c SHA1 (patch-ab) = 8907f650214bec5cdbf032464a1be39cccea5d81 SHA1 (patch-ac) = 24e52c1b863d858863317de1c34fe9a917f83599 +SHA1 (patch-ad) = 2d21a509b768d6aa269cb30e1adf01279d98bc41 +SHA1 (patch-ae) = ca03b45a7e2e05371b3a495c55af8268d17f80c3 +SHA1 (patch-af) = 295f3c06b5942d19b8e9ad41c220fac42c3fb7f5 +SHA1 (patch-ag) = c84e395b61a849ca3cb6318a2c15aa8b5346a0bc diff --git a/emulators/gcube/patches/patch-ad b/emulators/gcube/patches/patch-ad new file mode 100644 index 00000000000..dd6ff890ac0 --- /dev/null +++ b/emulators/gcube/patches/patch-ad @@ -0,0 +1,102 @@ +$NetBSD: patch-ad,v 1.1 2006/06/26 10:56:57 rillig Exp $ + +Thou shalt not use reserved identifiers. + +--- cpu.h.orig 2005-01-12 01:19:11.000000000 +0100 ++++ cpu.h 2006-06-26 12:51:48.000000000 +0200 +@@ -284,8 +284,8 @@ extern __u64 ps1[32]; + + #define SET_FIELD(X,n,Y)\ + ({\ +- __u32 _n = (n);\ +- (X = (X &~ (0x0f << ((7-(_n)) << 2))) | ((Y) << ((7-(_n)) << 2)));\ ++ __u32 m_n = (n);\ ++ (X = (X &~ (0x0f << ((7-(m_n)) << 2))) | ((Y) << ((7-(m_n)) << 2)));\ + }) + #define CLEAR_FIELD(X,n) (X = (X &~ (0x0f << ((7-(n)) << 2)))) + #define GET_FIELD(X,n) ((X >> (32 - (((n) + 1) << 2))) & 0x0f) +@@ -293,16 +293,16 @@ extern __u64 ps1[32]; + // signed + #define CALC_CR(n,X,Y)\ + ({\ +- __s32 _X = (X);\ +- __s32 _Y = (Y);\ +- SET_FIELD (CR, n, ((IS_XER_SO) ? CR_SO : 0) | ((_X < _Y) ? CR_LT : 0) | ((_X > _Y) ? CR_GT : 0) | ((_X == _Y) ? CR_EQ : 0));\ ++ __s32 m_X = (X);\ ++ __s32 m_Y = (Y);\ ++ SET_FIELD (CR, n, ((IS_XER_SO) ? CR_SO : 0) | ((m_X < m_Y) ? CR_LT : 0) | ((m_X > m_Y) ? CR_GT : 0) | ((m_X == m_Y) ? CR_EQ : 0));\ + }) + // unsigned + #define CALC_CRL(n,X,Y)\ + ({\ +- __u32 _X = (X);\ +- __u32 _Y = (Y);\ +- SET_FIELD (CR, n, ((IS_XER_SO) ? CR_SO : 0) | ((_X < _Y) ? CR_LT : 0) | ((_X > _Y) ? CR_GT : 0) | ((_X == _Y) ? CR_EQ : 0));\ ++ __u32 m_X = (X);\ ++ __u32 m_Y = (Y);\ ++ SET_FIELD (CR, n, ((IS_XER_SO) ? CR_SO : 0) | ((m_X < m_Y) ? CR_LT : 0) | ((m_X > m_Y) ? CR_GT : 0) | ((m_X == m_Y) ? CR_EQ : 0));\ + }) + + // rewrite in asm +@@ -315,14 +315,14 @@ extern __u64 ps1[32]; + #define IS_SNAN(X) ((((X) & 0x000fffffffffffffULL) != 0) && (((X) & 0x7ff8000000000000ULL) == 0x7ff0000000000000ULL)) + #define CALC_CRF(n,X,Y)\ + ({\ +- double _X = (X);\ +- double _Y = (Y);\ +- if (_X < _Y)\ ++ double m_X = (X);\ ++ double m_Y = (Y);\ ++ if (m_X < m_Y)\ + {\ + SET_FIELD (CR, n, 8);\ + FPSCR |= 8 << FPSCR_FPCC;\ + }\ +- else if (_X > _Y)\ ++ else if (m_X > m_Y)\ + {\ + SET_FIELD (CR, n, 4);\ + FPSCR |= 4 << FPSCR_FPCC;\ +@@ -337,8 +337,8 @@ extern __u64 ps1[32]; + #define IS_NANS IS_NAN + #define CALC_CRFS(n,Xf,Xb,Yf,Yb)\ + ({\ +- double _X = (Xf);\ +- double _Y = (Yf);\ ++ double m_X = (Xf);\ ++ double m_Y = (Yf);\ + FPSCR &= ~(0x1f << FPSCR_FPCC);\ + if (IS_NAN (Xb) || IS_NAN (Yb))\ + {\ +@@ -346,12 +346,12 @@ extern __u64 ps1[32]; + FPSCR |= 1 << FPSCR_FPCC;\ + FPSCR |= FPSCR_VXSNAN;\ + }\ +- else if (_X < _Y)\ ++ else if (m_X < m_Y)\ + {\ + SET_FIELD (CR, n, 8);\ + FPSCR |= 8 << FPSCR_FPCC;\ + }\ +- else if (_X > _Y)\ ++ else if (m_X > m_Y)\ + {\ + SET_FIELD (CR, n, 4);\ + FPSCR |= 4 << FPSCR_FPCC;\ +@@ -406,11 +406,11 @@ extern __u64 ps1[32]; + + #define GENMASK(X,Y)\ + ({\ +- __u32 _X = (X);\ +- __u32 _Y = (Y);\ +- ((_X <= _Y) ? \ +- ((0xffffffff >> (_X)) ^ (((_Y) < 31)? (0xffffffff >> ((_Y) + 1)) : 0)) :\ +- (~((0xffffffff >> (_X)) ^ (((_Y) < 31)? (0xffffffff >> ((_Y) + 1)) : 0)))) ;\ ++ __u32 m_X = (X);\ ++ __u32 m_Y = (Y);\ ++ ((m_X <= m_Y) ? \ ++ ((0xffffffff >> (m_X)) ^ (((m_Y) < 31)? (0xffffffff >> ((m_Y) + 1)) : 0)) :\ ++ (~((0xffffffff >> (m_X)) ^ (((m_Y) < 31)? (0xffffffff >> ((m_Y) + 1)) : 0)))) ;\ + }) + #define MASK(X,Y) (mask[X][Y]) + diff --git a/emulators/gcube/patches/patch-ae b/emulators/gcube/patches/patch-ae new file mode 100644 index 00000000000..119c87be6b3 --- /dev/null +++ b/emulators/gcube/patches/patch-ae @@ -0,0 +1,26 @@ +$NetBSD: patch-ae,v 1.1 2006/06/26 10:56:57 rillig Exp $ + +Thou shalt not use reserved identifiers. + +--- gx_transform.c.orig 2005-01-12 02:23:37.000000000 +0100 ++++ gx_transform.c 2006-06-26 12:46:19.000000000 +0200 +@@ -52,15 +52,15 @@ inline __u32 color_unpack_rgb565 (__u32 + + inline __u32 color_unpack_rgba4 (__u32 X) + { +- __u32 _X = X; ++ __u32 m_X = X; + + + #ifdef LIL_ENDIAN +- _X = ((X & 0x0f00) << 0) | ((X & 0x00f0) << 12) | ((X & 0x000f) << 24) | ((X & 0xf000) >> 12); ++ m_X = ((X & 0x0f00) << 0) | ((X & 0x00f0) << 12) | ((X & 0x000f) << 24) | ((X & 0xf000) >> 12); + #else +- _X = ((X & 0x0f00) << 8) | ((X & 0x00f0) << 4) | ((X & 0x000f) << 0) | ((X & 0xf000) << 12); ++ m_X = ((X & 0x0f00) << 8) | ((X & 0x00f0) << 4) | ((X & 0x000f) << 0) | ((X & 0xf000) << 12); + #endif +- return (_X | (_X << 4)); ++ return (m_X | (m_X << 4)); + } + + diff --git a/emulators/gcube/patches/patch-af b/emulators/gcube/patches/patch-af new file mode 100644 index 00000000000..9b3a7bf835a --- /dev/null +++ b/emulators/gcube/patches/patch-af @@ -0,0 +1,44 @@ +$NetBSD: patch-af,v 1.1 2006/06/26 10:56:57 rillig Exp $ + +Thou shalt not use reserved identifiers. + +--- tools_c.h.orig 2004-12-13 22:54:33.000000000 +0100 ++++ tools_c.h 2006-06-26 12:52:17.000000000 +0200 +@@ -11,18 +11,18 @@ + #else + # define BSWAP_16(B)\ + ({\ +- __u16 _B = (B);\ +- (((__u16) ((_B) << 8) | ((_B) >> 8)));\ ++ __u16 m_B = (B);\ ++ (((__u16) ((m_B) << 8) | ((m_B) >> 8)));\ + }) + # define BSWAP_32(B)\ + ({\ +- __u32 _B = (B);\ +- (((__u32) (_B << 24) | ((_B << 8) & 0xff0000) | ((_B >> 8) & 0xff00) | (_B >> 24)));\ ++ __u32 m_B = (B);\ ++ (((__u32) (m_B << 24) | ((m_B << 8) & 0xff0000) | ((m_B >> 8) & 0xff00) | (m_B >> 24)));\ + }) + # define BSWAP_64(B)\ + ({\ +- __u64 _B = (B);\ +- __u32 *_B32 = (__u32 *) &_B;\ ++ __u64 m_B = (B);\ ++ __u32 *_B32 = (__u32 *) &m_B;\ + (((__u64) BSWAP32 (_B32[0])) << 32) | BSWAP32 (_B32[1]);\ + }) + #endif +@@ -30,9 +30,9 @@ + + #define ROTL(X,n)\ + ({\ +- __u32 _X = (X);\ +- __u32 _n = (n);\ +- ((_X << _n) | (_X >> (32 - _n)));\ ++ __u32 m_X = (X);\ ++ __u32 m_n = (n);\ ++ ((m_X << m_n) | (m_X >> (32 - m_n)));\ + }) + + diff --git a/emulators/gcube/patches/patch-ag b/emulators/gcube/patches/patch-ag new file mode 100644 index 00000000000..6073e6dada0 --- /dev/null +++ b/emulators/gcube/patches/patch-ag @@ -0,0 +1,44 @@ +$NetBSD: patch-ag,v 1.1 2006/06/26 10:56:57 rillig Exp $ + +Thou shalt not use reserved identifiers. + +--- tplx.c.orig 2004-12-27 16:57:42.000000000 +0100 ++++ tplx.c 2006-06-26 12:50:49.000000000 +0200 +@@ -37,13 +37,13 @@ + + # define BSWAP_16(B)\ + ({\ +- __u16 _B = (B);\ +- (((__u16) ((_B) << 8) | ((_B) >> 8)));\ ++ __u16 m_B = (B);\ ++ (((__u16) ((m_B) << 8) | ((m_B) >> 8)));\ + }) + # define BSWAP_32(B)\ + ({\ +- __u32 _B = (B);\ +- (((__u32) (_B << 24) | ((_B << 8) & 0xff0000) | ((_B >> 8) & 0xff00) | (_B >> 24)));\ ++ __u32 m_B = (B);\ ++ (((__u32) (m_B << 24) | ((m_B << 8) & 0xff0000) | ((m_B >> 8) & 0xff00) | (m_B >> 24)));\ + }) + + #ifdef LIL_ENDIAN +@@ -135,15 +135,15 @@ inline __u32 color_unpack_rgb565 (__u32 + + inline __u32 color_unpack_rgba4 (__u32 X) + { +- __u32 _X = X; ++ __u32 m_X = X; + + + #ifdef LIL_ENDIAN +- _X = ((X & 0x0f00) << 0) | ((X & 0x00f0) << 12) | ((X & 0x000f) << 24) | ((X & 0xf000) >> 12); ++ m_X = ((X & 0x0f00) << 0) | ((X & 0x00f0) << 12) | ((X & 0x000f) << 24) | ((X & 0xf000) >> 12); + #else +- _X = ((X & 0x0f00) << 8) | ((X & 0x00f0) << 4) | ((X & 0x000f) << 0) | ((X & 0xf000) << 12); ++ m_X = ((X & 0x0f00) << 8) | ((X & 0x00f0) << 4) | ((X & 0x000f) << 0) | ((X & 0xf000) << 12); + #endif +- return (_X | (_X << 4)); ++ return (m_X | (m_X << 4)); + } + + |