apply fixes from upstream for

XSA-125 Long latency MMIO mapping operations are not preemptible
XSA-126 Unmediated PCI command register access in qemu

4 files changed, 337 insertions, 3 deletions

diff --git a/sysutils/xentools45/Makefile b/sysutils/xentools45/Makefile
index 657b5f9f189..cb922f4eb6d 100644
--- a/sysutils/xentools45/Makefile
+++ b/sysutils/xentools45/Makefile
@@ -1,11 +1,11 @@
-# $NetBSD: Makefile,v 1.5 2015/03/13 10:27:48 spz Exp $
+# $NetBSD: Makefile,v 1.6 2015/04/19 13:13:21 spz Exp $
 
 VERSION=	4.5.0
 VERSION_IPXE=	9a93db3f0947484e30e753bbd61a10b17336e20e
 
 DISTNAME=		xen-${VERSION}
 PKGNAME=		xentools45-${VERSION}
-PKGREVISION=		2
+PKGREVISION=		3
 CATEGORIES=		sysutils
 MASTER_SITES=		http://bits.xensource.com/oss-xen/release/${VERSION}/
 
diff --git a/sysutils/xentools45/distinfo b/sysutils/xentools45/distinfo
index af4cc837da6..300b8e333c5 100644
--- a/sysutils/xentools45/distinfo
+++ b/sysutils/xentools45/distinfo
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.5 2015/03/13 10:27:48 spz Exp $
+$NetBSD: distinfo,v 1.6 2015/04/19 13:13:21 spz Exp $
 
 SHA1 (ipxe-git-9a93db3f0947484e30e753bbd61a10b17336e20e.tar.gz) = fecadf952821e830ce1a1d19655288eef8488f88
 RMD160 (ipxe-git-9a93db3f0947484e30e753bbd61a10b17336e20e.tar.gz) = 539bfa12db7054228250d6dd380bbf96c1a040f8
@@ -16,6 +16,8 @@ SHA1 (patch-.._docs_man_xl.conf.pod.5) = 015da24a45388468d56f1ecfa60f6acf07bdfef
 SHA1 (patch-.._docs_man_xl.pod.1) = b194f2c5608c6f0e80a4abd8655808cf91355cd5
 SHA1 (patch-.._docs_man_xlcpupool.cfg.pod.5) = b44813af965e4d9d0d51c18b22d286736a4663b2
 SHA1 (patch-CVE-2015-2152) = 5a1cabf330b3a1bd902adf2b33dd5c4c32b8ab9d
+SHA1 (patch-CVE-2015-2752) = 85bcb80dab938b85da3342e7001d95bacf7f49e5
+SHA1 (patch-CVE-2015-2756) = 350cfd57a77d90997b81c7186e320bb52fb62d75
 SHA1 (patch-Makefile) = 5d5b9678ed9764275ee95f49d24e8538a0e8a01c
 SHA1 (patch-Rules.mk) = e0dc4234c35dc2d78afad4a90b0af829a6a10b50
 SHA1 (patch-blktap_drivers_Makefile) = 7cc53b2a0dea1694a969046ab8542271ca63f9e7
diff --git a/sysutils/xentools45/patches/patch-CVE-2015-2752 b/sysutils/xentools45/patches/patch-CVE-2015-2752
new file mode 100644
index 00000000000..1aaa13fef77
--- /dev/null
+++ b/sysutils/xentools45/patches/patch-CVE-2015-2752
@@ -0,0 +1,72 @@
+$NetBSD: patch-CVE-2015-2752,v 1.1 2015/04/19 13:13:21 spz Exp $
+
+Patch for CVE-2015-2752 aka XSA-125 from
+http://xenbits.xenproject.org/xsa/xsa125-4.2.patch
+
+--- libxc/xc_domain.c.orig	2015-01-12 16:53:24.000000000 +0000
++++ libxc/xc_domain.c
+@@ -1992,6 +1992,8 @@ int xc_domain_memory_mapping(
+ {
+     DECLARE_DOMCTL;
+     xc_dominfo_t info;
++    int ret = 0, err;
++    unsigned long done = 0, nr, max_batch_sz;
+ 
+     if ( xc_domain_getinfo(xch, domid, 1, &info) != 1 ||
+          info.domid != domid )
+@@ -2002,14 +2004,50 @@ int xc_domain_memory_mapping(
+     if ( !xc_core_arch_auto_translated_physmap(&info) )
+         return 0;
+ 
++    if ( !nr_mfns )
++        return 0;
++
+     domctl.cmd = XEN_DOMCTL_memory_mapping;
+     domctl.domain = domid;
+-    domctl.u.memory_mapping.first_gfn = first_gfn;
+-    domctl.u.memory_mapping.first_mfn = first_mfn;
+-    domctl.u.memory_mapping.nr_mfns = nr_mfns;
+     domctl.u.memory_mapping.add_mapping = add_mapping;
++    max_batch_sz = nr_mfns;
++    do
++    {
++        nr = min(nr_mfns - done, max_batch_sz);
++        domctl.u.memory_mapping.nr_mfns = nr;
++        domctl.u.memory_mapping.first_gfn = first_gfn + done;
++        domctl.u.memory_mapping.first_mfn = first_mfn + done;
++        err = do_domctl(xch, &domctl);
++        if ( err && errno == E2BIG )
++        {
++            if ( max_batch_sz <= 1 )
++                break;
++            max_batch_sz >>= 1;
++            continue;
++        }
++        /* Save the first error... */
++        if ( !ret )
++            ret = err;
++        /* .. and ignore the rest of them when removing. */
++        if ( err && add_mapping != DPCI_REMOVE_MAPPING )
++            break;
++
++        done += nr;
++    } while ( done < nr_mfns );
++
++    /*
++     * Undo what we have done unless unmapping, by unmapping the entire region.
++     * Errors here are ignored.
++     */
++    if ( ret && add_mapping != DPCI_REMOVE_MAPPING )
++        xc_domain_memory_mapping(xch, domid, first_gfn, first_mfn, nr_mfns,
++                                 DPCI_REMOVE_MAPPING);
++
++    /* We might get E2BIG so many times that we never advance. */
++    if ( !done && !ret )
++        ret = -1;
+ 
+-    return do_domctl(xch, &domctl);
++    return ret;
+ }
+ 
+ int xc_domain_ioport_mapping(
+
diff --git a/sysutils/xentools45/patches/patch-CVE-2015-2756 b/sysutils/xentools45/patches/patch-CVE-2015-2756
new file mode 100644
index 00000000000..0b14653234a
--- /dev/null
+++ b/sysutils/xentools45/patches/patch-CVE-2015-2756
@@ -0,0 +1,260 @@
+$NetBSD: patch-CVE-2015-2756,v 1.1 2015/04/19 13:13:21 spz Exp $
+
+patch for CVE-2015-2756 aka XSA-126 from
+http://xenbits.xenproject.org/xsa/xsa126-qemuu.patch
+and
+http://xenbits.xenproject.org/xsa/xsa126-qemut.patch
+
+--- qemu-xen/hw/xen/xen_pt.c.orig	2014-12-02 10:41:02.000000000 +0000
++++ qemu-xen/hw/xen/xen_pt.c
+@@ -388,7 +388,7 @@ static const MemoryRegionOps ops = {
+     .write = xen_pt_bar_write,
+ };
+ 
+-static int xen_pt_register_regions(XenPCIPassthroughState *s)
++static int xen_pt_register_regions(XenPCIPassthroughState *s, uint16_t *cmd)
+ {
+     int i = 0;
+     XenHostPCIDevice *d = &s->real_device;
+@@ -406,6 +406,7 @@ static int xen_pt_register_regions(XenPC
+ 
+         if (r->type & XEN_HOST_PCI_REGION_TYPE_IO) {
+             type = PCI_BASE_ADDRESS_SPACE_IO;
++            *cmd |= PCI_COMMAND_IO;
+         } else {
+             type = PCI_BASE_ADDRESS_SPACE_MEMORY;
+             if (r->type & XEN_HOST_PCI_REGION_TYPE_PREFETCH) {
+@@ -414,6 +415,7 @@ static int xen_pt_register_regions(XenPC
+             if (r->type & XEN_HOST_PCI_REGION_TYPE_MEM_64) {
+                 type |= PCI_BASE_ADDRESS_MEM_TYPE_64;
+             }
++            *cmd |= PCI_COMMAND_MEMORY;
+         }
+ 
+         memory_region_init_io(&s->bar[i], OBJECT(s), &ops, &s->dev,
+@@ -657,6 +659,7 @@ static int xen_pt_initfn(PCIDevice *d)
+     XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d);
+     int rc = 0;
+     uint8_t machine_irq = 0;
++    uint16_t cmd = 0;
+     int pirq = XEN_PT_UNASSIGNED_PIRQ;
+ 
+     /* register real device */
+@@ -691,7 +694,7 @@ static int xen_pt_initfn(PCIDevice *d)
+     s->io_listener = xen_pt_io_listener;
+ 
+     /* Handle real device's MMIO/PIO BARs */
+-    xen_pt_register_regions(s);
++    xen_pt_register_regions(s, &cmd);
+ 
+     /* reinitialize each config register to be emulated */
+     if (xen_pt_config_init(s)) {
+@@ -755,6 +758,11 @@ static int xen_pt_initfn(PCIDevice *d)
+     }
+ 
+ out:
++    if (cmd) {
++        xen_host_pci_set_word(&s->real_device, PCI_COMMAND,
++                              pci_get_word(d->config + PCI_COMMAND) | cmd);
++    }
++
+     memory_listener_register(&s->memory_listener, &address_space_memory);
+     memory_listener_register(&s->io_listener, &address_space_io);
+     XEN_PT_LOG(d,
+
+--- qemu-xen/hw/xen/xen_pt_config_init.c.orig	2014-12-02 10:41:02.000000000 +0000
++++ qemu-xen/hw/xen/xen_pt_config_init.c
+@@ -286,23 +286,6 @@ static int xen_pt_irqpin_reg_init(XenPCI
+ }
+ 
+ /* Command register */
+-static int xen_pt_cmd_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry,
+-                               uint16_t *value, uint16_t valid_mask)
+-{
+-    XenPTRegInfo *reg = cfg_entry->reg;
+-    uint16_t valid_emu_mask = 0;
+-    uint16_t emu_mask = reg->emu_mask;
+-
+-    if (s->is_virtfn) {
+-        emu_mask |= PCI_COMMAND_MEMORY;
+-    }
+-
+-    /* emulate word register */
+-    valid_emu_mask = emu_mask & valid_mask;
+-    *value = XEN_PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask);
+-
+-    return 0;
+-}
+ static int xen_pt_cmd_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry,
+                                 uint16_t *val, uint16_t dev_value,
+                                 uint16_t valid_mask)
+@@ -310,18 +293,13 @@ static int xen_pt_cmd_reg_write(XenPCIPa
+     XenPTRegInfo *reg = cfg_entry->reg;
+     uint16_t writable_mask = 0;
+     uint16_t throughable_mask = 0;
+-    uint16_t emu_mask = reg->emu_mask;
+-
+-    if (s->is_virtfn) {
+-        emu_mask |= PCI_COMMAND_MEMORY;
+-    }
+ 
+     /* modify emulate register */
+     writable_mask = ~reg->ro_mask & valid_mask;
+     cfg_entry->data = XEN_PT_MERGE_VALUE(*val, cfg_entry->data, writable_mask);
+ 
+     /* create value for writing to I/O device register */
+-    throughable_mask = ~emu_mask & valid_mask;
++    throughable_mask = ~reg->emu_mask & valid_mask;
+ 
+     if (*val & PCI_COMMAND_INTX_DISABLE) {
+         throughable_mask |= PCI_COMMAND_INTX_DISABLE;
+@@ -605,9 +583,9 @@ static XenPTRegInfo xen_pt_emu_reg_heade
+         .size       = 2,
+         .init_val   = 0x0000,
+         .ro_mask    = 0xF880,
+-        .emu_mask   = 0x0740,
++        .emu_mask   = 0x0743,
+         .init       = xen_pt_common_reg_init,
+-        .u.w.read   = xen_pt_cmd_reg_read,
++        .u.w.read   = xen_pt_word_reg_read,
+         .u.w.write  = xen_pt_cmd_reg_write,
+     },
+     /* Capabilities Pointer reg */
+
+--- qemu-xen-traditional/hw/pass-through.c.orig	2014-10-06 15:50:24.000000000 +0000
++++ qemu-xen-traditional/hw/pass-through.c
+@@ -172,9 +172,6 @@ static int pt_word_reg_read(struct pt_de
+ static int pt_long_reg_read(struct pt_dev *ptdev,
+     struct pt_reg_tbl *cfg_entry,
+     uint32_t *value, uint32_t valid_mask);
+-static int pt_cmd_reg_read(struct pt_dev *ptdev,
+-    struct pt_reg_tbl *cfg_entry,
+-    uint16_t *value, uint16_t valid_mask);
+ static int pt_bar_reg_read(struct pt_dev *ptdev,
+     struct pt_reg_tbl *cfg_entry,
+     uint32_t *value, uint32_t valid_mask);
+@@ -286,9 +283,9 @@ static struct pt_reg_info_tbl pt_emu_reg
+         .size       = 2,
+         .init_val   = 0x0000,
+         .ro_mask    = 0xF880,
+-        .emu_mask   = 0x0740,
++        .emu_mask   = 0x0743,
+         .init       = pt_common_reg_init,
+-        .u.w.read   = pt_cmd_reg_read,
++        .u.w.read   = pt_word_reg_read,
+         .u.w.write  = pt_cmd_reg_write,
+         .u.w.restore  = pt_cmd_reg_restore,
+     },
+@@ -1905,7 +1902,7 @@ static int pt_dev_is_virtfn(struct pci_d
+     return rc;
+ }
+ 
+-static int pt_register_regions(struct pt_dev *assigned_device)
++static int pt_register_regions(struct pt_dev *assigned_device, uint16_t *cmd)
+ {
+     int i = 0;
+     uint32_t bar_data = 0;
+@@ -1925,17 +1922,26 @@ static int pt_register_regions(struct pt
+ 
+             /* Register current region */
+             if ( pci_dev->base_addr[i] & PCI_ADDRESS_SPACE_IO )
++            {
+                 pci_register_io_region((PCIDevice *)assigned_device, i,
+                     (uint32_t)pci_dev->size[i], PCI_ADDRESS_SPACE_IO,
+                     pt_ioport_map);
++                *cmd |= PCI_COMMAND_IO;
++            }
+             else if ( pci_dev->base_addr[i] & PCI_ADDRESS_SPACE_MEM_PREFETCH )
++            {
+                 pci_register_io_region((PCIDevice *)assigned_device, i,
+                     (uint32_t)pci_dev->size[i], PCI_ADDRESS_SPACE_MEM_PREFETCH,
+                     pt_iomem_map);
++                *cmd |= PCI_COMMAND_MEMORY;
++            }
+             else
++            {
+                 pci_register_io_region((PCIDevice *)assigned_device, i,
+                     (uint32_t)pci_dev->size[i], PCI_ADDRESS_SPACE_MEM,
+                     pt_iomem_map);
++                *cmd |= PCI_COMMAND_MEMORY;
++            }
+ 
+             PT_LOG("IO region registered (size=0x%08x base_addr=0x%08x)\n",
+                 (uint32_t)(pci_dev->size[i]),
+@@ -3263,27 +3269,6 @@ static int pt_long_reg_read(struct pt_de
+    return 0;
+ }
+ 
+-/* read Command register */
+-static int pt_cmd_reg_read(struct pt_dev *ptdev,
+-        struct pt_reg_tbl *cfg_entry,
+-        uint16_t *value, uint16_t valid_mask)
+-{
+-    struct pt_reg_info_tbl *reg = cfg_entry->reg;
+-    uint16_t valid_emu_mask = 0;
+-    uint16_t emu_mask = reg->emu_mask;
+-
+-    if ( ptdev->is_virtfn )
+-        emu_mask |= PCI_COMMAND_MEMORY;
+-    if ( pt_is_iomul(ptdev) )
+-        emu_mask |= PCI_COMMAND_IO;
+-
+-    /* emulate word register */
+-    valid_emu_mask = emu_mask & valid_mask;
+-    *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask);
+-
+-    return 0;
+-}
+-
+ /* read BAR */
+ static int pt_bar_reg_read(struct pt_dev *ptdev,
+         struct pt_reg_tbl *cfg_entry,
+@@ -3418,19 +3403,13 @@ static int pt_cmd_reg_write(struct pt_de
+     uint16_t writable_mask = 0;
+     uint16_t throughable_mask = 0;
+     uint16_t wr_value = *value;
+-    uint16_t emu_mask = reg->emu_mask;
+-
+-    if ( ptdev->is_virtfn )
+-        emu_mask |= PCI_COMMAND_MEMORY;
+-    if ( pt_is_iomul(ptdev) )
+-        emu_mask |= PCI_COMMAND_IO;
+ 
+     /* modify emulate register */
+     writable_mask = ~reg->ro_mask & valid_mask;
+     cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask);
+ 
+     /* create value for writing to I/O device register */
+-    throughable_mask = ~emu_mask & valid_mask;
++    throughable_mask = ~reg->emu_mask & valid_mask;
+ 
+     if (*value & PCI_COMMAND_DISABLE_INTx)
+     {
+@@ -4211,6 +4190,7 @@ static struct pt_dev * register_real_dev
+     struct pt_dev *assigned_device = NULL;
+     struct pci_dev *pci_dev;
+     uint8_t e_device, e_intx;
++    uint16_t cmd = 0;
+     char *key, *val;
+     int msi_translate, power_mgmt;
+ 
+@@ -4300,7 +4280,7 @@ static struct pt_dev * register_real_dev
+         assigned_device->dev.config[i] = pci_read_byte(pci_dev, i);
+ 
+     /* Handle real device's MMIO/PIO BARs */
+-    pt_register_regions(assigned_device);
++    pt_register_regions(assigned_device, &cmd);
+ 
+     /* Setup VGA bios for passthroughed gfx */
+     if ( setup_vga_pt(assigned_device) < 0 )
+@@ -4378,6 +4358,10 @@ static struct pt_dev * register_real_dev
+     }
+ 
+ out:
++    if (cmd)
++        pci_write_word(pci_dev, PCI_COMMAND,
++            *(uint16_t *)(&assigned_device->dev.config[PCI_COMMAND]) | cmd);
++
+     PT_LOG("Real physical device %02x:%02x.%x registered successfuly!\n"
+            "IRQ type = %s\n", r_bus, r_dev, r_func,
+            assigned_device->msi_trans_en? "MSI-INTx":"INTx");