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-rw-r--r--cad/covered/Makefile4
1 files changed, 1 insertions, 3 deletions
diff --git a/cad/covered/Makefile b/cad/covered/Makefile
index 6b2c1e109af..e501661943f 100644
--- a/cad/covered/Makefile
+++ b/cad/covered/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.23 2016/10/08 14:38:43 kamil Exp $
+# $NetBSD: Makefile,v 1.24 2016/10/08 14:45:25 kamil Exp $
#
DISTNAME= covered-0.4.7
@@ -12,8 +12,6 @@ COMMENT= Verilog code coverage analyzer (stable release version)
DEPENDS+= verilog-[0-9]*:../../cad/verilog
-CONFLICTS+= covered-current-[0-9]*
-
GNU_CONFIGURE= YES
USE_TOOLS+= bison gmake lex