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-rw-r--r--emulators/gxemul/Makefile4
-rw-r--r--emulators/gxemul/distinfo4
-rw-r--r--emulators/gxemul/patches/patch-ag44
3 files changed, 44 insertions, 8 deletions
diff --git a/emulators/gxemul/Makefile b/emulators/gxemul/Makefile
index a2e57e60d1f..0359a921a44 100644
--- a/emulators/gxemul/Makefile
+++ b/emulators/gxemul/Makefile
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.48 2012/10/03 12:55:14 asau Exp $
+# $NetBSD: Makefile,v 1.49 2013/06/29 08:24:53 mrg Exp $
DISTNAME= gxemul-0.6.0
-PKGREVISION= 3
+PKGREVISION= 4
CATEGORIES= emulators
MASTER_SITES= http://gxemul.sourceforge.net/src/
diff --git a/emulators/gxemul/distinfo b/emulators/gxemul/distinfo
index 5a8d80613a2..a1544044afd 100644
--- a/emulators/gxemul/distinfo
+++ b/emulators/gxemul/distinfo
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.40 2012/11/23 22:43:09 alnsn Exp $
+$NetBSD: distinfo,v 1.41 2013/06/29 08:24:53 mrg Exp $
SHA1 (gxemul-0.6.0.tar.gz) = aa37ad5f200eee045b1da2b1d3f651401cf474af
RMD160 (gxemul-0.6.0.tar.gz) = ac6291a5f8bc9c0d1988d3ce39750339fe90a8ce
@@ -8,7 +8,7 @@ SHA1 (patch-ab) = ebd64a2b56cd4140522c567b90dcbfb9440b9db2
SHA1 (patch-ad) = a8757e7397ec3cc301d02bdf93654f55d558d29f
SHA1 (patch-ae) = 19ef822c16f0f6dd50aea719e0bc797c39d1f9c0
SHA1 (patch-af) = 8304ff5d8f779ac60f8d416d27e0a183e0e47d94
-SHA1 (patch-ag) = 9d13bf6f6e6038e114a45cfbd03e4e52ac60d2c7
+SHA1 (patch-ag) = b8422a818e314e01f9ae6203844ed26f6b834aa0
SHA1 (patch-configure) = b7cacc97ffdeb127be196a7d352ee82b673d4026
SHA1 (patch-src_components_cpu_CPUDyntransComponent.cc) = 1a70375b3ed409ef43122ce7e6935c07b4ed386d
SHA1 (patch-src_components_cpu_M88K__CPUComponent.cc) = 931cdc9a806e9ff48dccb2a63873c52491336b30
diff --git a/emulators/gxemul/patches/patch-ag b/emulators/gxemul/patches/patch-ag
index 9d4841eaf75..07e64bc498e 100644
--- a/emulators/gxemul/patches/patch-ag
+++ b/emulators/gxemul/patches/patch-ag
@@ -1,8 +1,11 @@
-$NetBSD: patch-ag,v 1.1 2012/02/06 05:37:40 matt Exp $
+$NetBSD: patch-ag,v 1.2 2013/06/29 08:24:53 mrg Exp $
---- src/cpus/cpu_arm_instr.cc.orig 2012-02-06 05:14:31.000000000 +0000
-+++ src/cpus/cpu_arm_instr.cc
-@@ -2631,6 +2631,7 @@ X(to_be_translated)
+enable all CPSR->SPSR copy values, instead of hard coding 3 out of 15.
+
+
+--- src/cpus/cpu_arm_instr.cc.orig 2010-02-14 09:33:54.000000000 +0000
++++ src/cpus/cpu_arm_instr.cc 2013-06-29 07:03:52.000000000 +0000
+@@ -2631,6 +2631,7 @@
ic->f = cond_instr(bx);
}
ic->arg[0] = (size_t)(&cpu->cd.arm.r[rm]);
@@ -10,3 +13,36 @@ $NetBSD: patch-ag,v 1.1 2012/02/06 05:37:40 matt Exp $
break;
}
if ((iword & 0x0fb00ff0) == 0x1000090) {
+@@ -2682,6 +2683,7 @@
+ (iword & 0x0fb0f000) == 0x0320f000) {
+ /* msr: move to [S|C]PSR from a register or
+ immediate value */
++ uint32_t mask;
+ if (iword & 0x02000000) {
+ if (iword & 0x00400000)
+ ic->f = cond_instr(msr_imm_spsr);
+@@ -2703,14 +2705,16 @@
+ imm = (imm >> 2) | ((imm & 3) << 30);
+ ic->arg[0] = imm;
+ ic->arg[2] = (size_t)(&cpu->cd.arm.r[rm]);
+- switch ((iword >> 16) & 15) {
+- case 1: ic->arg[1] = 0x000000ff; break;
+- case 8: ic->arg[1] = 0xff000000; break;
+- case 9: ic->arg[1] = 0xff0000ff; break;
+- default:if (!cpu->translation_readahead)
+- fatal("unimpl a: msr regform\n");
+- goto bad;
+- }
++ ic->arg[1] = 0;
++ mask = (iword >> 16) & 15;
++ if (mask & 1)
++ ic->arg[1] |= 0x000000ff;
++ if (mask & 2)
++ ic->arg[1] |= 0x0000ff00;
++ if (mask & 4)
++ ic->arg[1] |= 0x00ff0000;
++ if (mask & 8)
++ ic->arg[1] |= 0xff000000;
+ break;
+ }
+ if ((iword & 0x0fbf0fff) == 0x010f0000) {