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2016-10-08cad/verilog has been renamed to cad/iverilogkamil3-56/+0
2016-10-08Update cad/verilog (icarus verilog) from 0.9.7 to 10.1.1kamil2-66/+0
2015-02-18Fix race condition.joerg1-1/+10
2014-06-28Work around build problem seen only in pbulk (remains unclear why).dholland1-0/+28
2014-01-07(Upstream)mef4-13/+61
2011-04-13update to 0.9.4drochner3-97/+11
2010-02-01DESTDIR supportjoerg2-4/+92
2009-10-08gcc44 fixesdmcmahill1-0/+12
2009-06-11remove an unused patch.obache1-14/+0
2007-08-05Don't use malloc.h.joerg1-0/+14
2006-10-04update to verilog-0.8.3dmcmahill1-9/+10
2004-10-14update to verilog-0.8.dmcmahill3-33/+8
2004-01-02Fix build with gcc3.jmmv2-0/+25
2001-08-04update to verilog-0.5dmcmahill5-93/+13
2001-02-07make sure the -I search path has the correct order to avoid pickingdmcmahill4-0/+87
2001-02-04update to verilog-0.4.dmcmahill4-88/+8
2000-07-11make iverilog give proper return codes.dmcmahill1-0/+56
2000-06-30make the default timescale in the output VCD files be 1ns for compatibilitydmcmahill1-0/+14
2000-06-22update to verilog-0.3dmcmahill3-17/+15
2000-03-07fix a bug in one of the patches that caused parse.cc to be built twice.dmcmahill1-4/+5
2000-02-14update package to verilog-20000212. This release incorporates most of thedmcmahill11-649/+14
2000-01-26Initial import of Icarus Verilog.dmcmahill11-0/+661