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2006-07-08Change the format of BUILDLINK_ORDER to contain depth information as well,jlam1-2/+2
and add a new helper target and script, "show-buildlink3", that outputs a listing of the buildlink3.mk files included as well as the depth at which they are included. For example, "make show-buildlink3" in fonts/Xft2 displays: zlib fontconfig iconv zlib freetype2 expat freetype2 Xrender renderproto
2006-07-08Track information in a new variable BUILDLINK_ORDER that informs usjlam1-1/+2
of the order in which buildlink3.mk files are (recursively) included by a package Makefile.
2006-05-28For building verilog, lex is indeed needed.rillig1-2/+2
2006-05-22Needs bison.joerg1-2/+2
2006-05-21Fixed pkglint warnings. Since bison and lex are not used when building,rillig3-29/+11
they don't need to be defined in USE_TOOLS.
2006-05-06update to verilog-0.8.2. Adds edif output, contains several bug fixes fordmcmahill3-8/+10
compatibility with more c++ compilers.
2006-04-06Over 1200 files touched but no revisions bumped :)reed1-2/+2
RECOMMENDED is removed. It becomes ABI_DEPENDS. BUILDLINK_RECOMMENDED.foo becomes BUILDLINK_ABI_DEPENDS.foo. BUILDLINK_DEPENDS.foo becomes BUILDLINK_API_DEPENDS.foo. BUILDLINK_DEPENDS does not change. IGNORE_RECOMMENDED (which defaulted to "no") becomes USE_ABI_DEPENDS which defaults to "yes". Added to obsolete.mk checking for IGNORE_RECOMMENDED. I did not manually go through and fix any aesthetic tab/spacing issues. I have tested the above patch on DragonFly building and packaging subversion and pkglint and their many dependencies. I have also tested USE_ABI_DEPENDS=no on my NetBSD workstation (where I have used IGNORE_RECOMMENDED for a long time). I have been an active user of IGNORE_RECOMMENDED since it was available. As suggested, I removed the documentation sentences suggesting bumping for "security" issues. As discussed on tech-pkg. I will commit to revbump, pkglint, pkg_install, createbuildlink separately. Note that if you use wip, it will fail! I will commit to pkgsrc-wip later (within day).
2006-02-10add one...drochner1-0/+39
2006-02-05Recursive revision bump / recommended bump for gettext ABI change.joerg1-1/+2
2006-01-29add missing USE_LANGUAGESdmcmahill1-1/+3
2005-05-23Removed trailing white-space.rillig1-1/+1
2005-05-22Replace explicit build dependencies on bison and manipulations on thejlam1-7/+5
YACC variable with USE_TOOLS+=bison.
2005-05-22Remove USE_GNU_TOOLS and replace with the correct USE_TOOLS definitions:jlam1-2/+2
USE_GNU_TOOLS -> USE_TOOLS awk -> gawk m4 -> gm4 make -> gmake sed -> gsed yacc -> bison
2005-04-11Remove USE_BUILDLINK3 and NO_BUILDLINK; these are no longer used.tv1-2/+1
2005-03-02update to verilog-0.8.1. This is a minor bug fix releasedmcmahill2-6/+6
2005-02-23Add RMD160 digests in addition to SHA1 ones.agc1-1/+2
2004-10-14update to verilog-0.8.dmcmahill6-45/+32
The current release is a considerable improvement over the previous stable release. It includes 20 months of fixes and language coverage improvements. For a complete history of changes, see the release notes for individual snapshots between the 0.7 and 0.8 releases found at ftp://ftp.icarus.com/pub/eda/verilog/snapshots/pre-0.8 A brief list of highlights: - Support for advanced standard data types such as real, - Lots more language support in general, - Kernel of an extensible, interactive debugger is new, - More complete support for user supplied system functions and tasks, including PLI system functions with various return value types, - Better standards compliance for core system tasks and functions in general, including some Verilog 2001 file I/O support, and - Performance improvements in general.
2004-03-22add lex to the GNU_TOOLS list. Needed for SunOS and probably some others.dmcmahill1-2/+2
2004-03-12bl3ifydmcmahill1-7/+4
2004-01-22replace deprecated USE_GMAKE with USE_GNU_TOOLS+=make.grant1-2/+2
2004-01-02Fix build with gcc3.jmmv3-1/+28
2004-01-02Require any version of gperf greater than 2.7.2.jmmv1-2/+2
2003-07-17s/netbsd.org/NetBSD.org/grant1-2/+2
2003-05-06Drop trailing whitespace. Ok'ed by wiz.jmmv1-2/+2
2002-12-15update to verilog-0.7dmcmahill3-22/+14
This release represents many bug fixes, expanded language coverage, greatly enhanced xilinx fpga synthesis and several performance enhancements. The complete list is rather long.
2002-02-08update to verilog-0.6dmcmahill3-11/+19
WHAT'S NEW SINCE 0.5? Quite a lot. Innumerable bugs have been fixed, and standards coverage has been improved significantly. Warning and error messages have been improved, and so has compile performance. Gate delays, strength modeling, and floating point delays have all improved since the 0.5 release. If you had trouble with the 0.5 release, the 0.6 release probably fixes your problem. Support for large designs spanning multiple files has been improved dramatically. The usual preprocessor inclusion method still works, but The 0.6 release adds command files for keeping source file lists, and automatic library searches for missing modules. The library mechinisms are compatible with commercial tools, and commercial module libraries can be used with Icarus Verilog. Many compiler limitations related to the size and complexity of large designs have been relaxed or eliminated. There are no known design size limitations remaining in the compiler. Icarus Verilog should be able to handle any design that you have the patience to compile.
2001-11-01Move pkg/ files into package's toplevel directoryzuntum2-1/+1
2001-09-27Mechanical changes to 375 files to change dependency patterns of the formjlam1-2/+2
foo-* to foo-[0-9]*. This is to cause the dependencies to match only the packages whose base package name is "foo", and not those named "foo-bar". A concrete example is p5-Net-* matching p5-Net-DNS as well as p5-Net. Also change dependency examples in Packages.txt to reflect this.
2001-08-04update to verilog-0.5dmcmahill8-111/+33
* The Big Change: VVP Past versions of Icarus Verilog performed simulation by compiling the Verilog design to intermediate C++ code, then in turn compiling that C++ (usually with G++) to a binary executable. This program was then executed to actually run the simulation. The 0.5 compiler, however, uses a custom internal language called "vvp." The vvp code generator writes a program in the vvp language that the vvp interpreter executes. This gets runtime performance similar to the older vvm method, but compile times are much faster. The result of this change is that there is a new program, ``vvp'', that is installed with the existing ``iverilog'' compiler. This program actually executes the simulation generated by the vvp code generator. There are manual pages for the iverilog command and the new vvp command, as well as a QUICK_START document to help you run your first simulation. * What Else Is New The compiler itself is now a lot more robust. While it still does not compile and understand the entire IEEE1364 standard, the compiler is less likely to crash on bad input, gives better error messages, and has generally been cleaned up.
2001-06-11CPPFLAGS is now passed to MAKE_ENV and CONFIGURE_ENV by bsd.pkg.mk, sojlam1-2/+1
adapt by moving CPPFLAGS settings to top-level, and removing explicit inclusion of CPPFLAGS into MAKE_ENV and CONFIGURE_ENV.
2001-04-19Move to sha1 digests, and add distfile sizes.agc1-2/+3
2001-04-17+ move the distfile digest/checksum value from files/md5 to distinfoagc3-10/+8
+ move the patch digest/checksum values from files/patch-sum to distinfo
2001-04-11Use wildcards in CONFLICTS.wennmach1-2/+2
2001-03-27Change BUILD_DEPENDS semantics:hubertf1-3/+3
first component is now a package name+version/pattern, no more executable/patchname/whatnot. While there, introduce BUILD_USES_MSGFMT as shorthand to pull in devel/gettext unless /usr/bin/msgfmt exists (i.e. on post-1.5 -current). Patch by Alistair Crooks <agc@netbsd.org>
2001-02-16Update to new COMMENT style: COMMENT var in Makefile instead of pkg/COMMENT.wiz2-2/+2
2001-02-07make sure the -I search path has the correct order to avoid pickingdmcmahill5-1/+92
up a possibly out of date installed header from ${LOCALBASE}/include. Note that while we don't support installing a pkg when a previous version is installed, we should still be able to build it. Problem noted in private email from Lennart Augustsson.
2001-02-04update to verilog-0.4.dmcmahill8-105/+31
from the authors announcement: So many things have changed since version 0.3 that there is no point in listing them. There have been tons and tons of bug fixes and the language coverage is better, and so on and so forth. It's just so very much better then version 0.3:-) speaking as a user, some of my personal favorites are: - support for signed variables - iverilog now gives correct return codes (which makes 'make' much happier) for a more complete list, the commit messages for pkgsrc/cad/verilog-current/Makefile contain the changes for each development snapshot between verilog-0.3 and verilog-0.4
2000-07-11make iverilog give proper return codes.dmcmahill2-1/+58
2000-06-30make the default timescale in the output VCD files be 1ns for compatibilitydmcmahill2-1/+16
with viewers such as Dinotrace.
2000-06-22update to verilog-0.3dmcmahill7-38/+38
Changes, from the authors release statement, are: This release is a significant improvement over previous releases of Icarus Verilog, including better language coverage, improved synthesis, and increased performance. This release adds to the 0.2 release support for Verilog-2000 style parameters and parameter overrides, defparam, and localparam, including proper handling of scoping rules. Also, strength modeling is added, with support for strengths attached to gates and continuous assignments. Combinational user defined primitives have been added to complement synchronous primitives that were already supported. Support for primitives should now be fairly complete. Force/release/assign/deassign syntax now works properly, allowing for more sophisticated test bench design and debugging. Bug fixes have been numerous and varied. This release of Icarus Verilog is considerably more robust then previous versions, thanks to diligent testing and bug reporting by users all over the world.
2000-05-10distinguish these 2 packages as "development snapshot" and "released" sodmcmahill1-1/+1
its more obvious of the difference.
2000-03-07fix a bug in one of the patches that caused parse.cc to be built twice.dmcmahill2-6/+7
2000-03-07Update to the released version 0.2 of verilog. I will be creating a seperatedmcmahill2-7/+10
verilog-current pkg to track development snapshots. This version has minor bug fixes over the previous snapshot package. Notable $display of a memory element now works correctly and a bug in $readmemb has been fixed.
2000-02-14update package to verilog-20000212. This release incorporates most of thedmcmahill14-665/+21
NetBSD pkgsrc patches to the previous release. Thanks to Stephen Williams (the author) for his willingness to accept patches!
2000-01-26Initial import of Icarus Verilog.dmcmahill17-0/+721
Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate C++ code that is compiled and linked with a run time library (called "vvm") then executed as a command to run the simulation. For synthesis, the compiler generates netlists in the desired format. The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and complex standard, so it will take some time for it to get there, but that's the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well, and some -1999 features will creep in.
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