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Release notes for the gEDA/gaf 20061020 snapshot
Changes
_________________________________________________________________
libgeda/gschem
libgeda and gschem no longer use libgdgeda (which was a gEDA specific
hack to the libgd library). gEDA/gaf now wants to use the original
GD library. (Wojciech Kazubski and Carlos Nieves Onega with
cleanup by others)
*
* gEDA/gaf now compiles out of the box on cygwin. (Cesar Strauss)
* Fixed bug #1553544: "New pages inadvertently created when adding
nets in gschem" (Peter Clifton)
* New component selection dialog box for gschem. This one is so much
better than the original one. Please test it out and submit
comments to the mailing lists. (Patrick Bernaud)
* The preview window is inside the file selectors again. The preview
window has been refactored and improved. (Patrick Bernaud)
* gschem now places a title block (or any component the user wants)
when a new page/window is created. This solves the common complain
that the initial zoom is way to far out. (Carlos Nieves Onega)
* Improvements to the new print dialog box: Make print settings
sticky for session. (Peter Brett)
* Fixed bug #1527465: Do a zoom extents for all pages when the main
window is maximized. (Carlos Nieves Onega and others)
* Fixed bug #1565433: Added the border in the gdk-pixbuf's image
output. (Carlos Nieves Onega)
* New dialog for user confirmation before closing a page or a
window. This is also a great improvement over the previous exit
confirm dialog box. (Patrick Bernaud)
* Various language translations updated.
* libgeda's shared library version is now 27:0:0.
* Many more bug fixes and code cleanups. (various people)
gnetlist
* Fixed PCB cursor related issues (Peter Clifton and Stuart
Brorson).
* Minor cleanup of gnet-PCB backend. (Thien-Thi Nguyen)
gattrib
* Made gattrib throw up GUI window warning user of no components or
attributes. (Stuart Brorson)
* File browsers in gattrib are now the same ones that gschem uses.
(Patrick Bernaud)
* The usual bug fixes and code cleanup. (various)
docs
* Updated the wiki snapshot to the latest web wiki version.
symbols
* linear/lm311-1.sym: Removed the GND false connection of the
symbol. (Ramakrishnan Muthukrishnan, John Luciani, and Carlos
Nieves Onega).
* Lots of off grid symbols cleaned up. (Werner Hoch)
gsymcheck
* Adds newline that is missing from the "Found Pintype=..." message
in s_check_pintype() in s_check.c. (Jeff Mallatt and Carlos Nieves
Onega)
* gsymcheck now counts the number of distinct pinnumbers specified
in all slotdef= attributes. Uses that number, plus the number of
net= pins, to compare with the "footprint size" when checking for
that warning. (Jeff Mallatt and Carlos Nieves Onega).
utils
* Applied patches for the cygwin port. Lots of various improvements
to make gschemdoc more Windows friendly (at least under cygwin).
(Cesar Strauss, Peter Brett, and Carlos Nieves Onega)
examples
* No significant changes
For more a detailed changes, please look in the appropriate ChangeLogs
in the source tarballs.
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* 09/04/2006
Development release covered-20060904 made. This is primarily an enhanced language support release
containing support for the Verilog-2001 'generate' block and support for some SystemVerilog constructs.
All bug fixes from the stable release branch have also been included in this release as well. Some
updates to the GUI (to match changes made on the score command side). The following is a list of
changes made from the last development release
- Complete parsing/simulation support for generate blocks include generate for, if/else and
case constructs.
- Fixed bug in hierarchically referencing items within an array of instances.
- Added -g option to score command to allow the user to specify on either a global or modular
level which Verilog generation to consider for that design. This allows a block of logic written
with Verilog-1995 in mind to use names that would be keywords in Verilog-2001 or SystemVerilog,
as an example.
- Removed "manstyle" type documentation in user's guide as this tool is no longer used for this
project. This change should be transparent to the user, however.
- Fixed scoping/hierarchical referencing rules to match the Verilog LRM properly.
- Added parsing/handling support for SystemVerilog always_comb, always_ff and always_latch blocks.
- Added parsing support for 'unique' and 'priority' SystemVerilog keywords before if and case
statements (Covered doesn't need to do anything with them, however).
- Added parsing/handling support for 'do .. while' SystemVerilog loops.
- Added parsing/handling support for new SystemVerilog data types, including: byte, bit, logic,
char, shorting, int and longint.
- Added -rI option to the score command which allows the user to completely bypass the race
condition checking phase of the score command.
- Added -B global option which obfuscates all identifying names from Covered's output (for use
in providing debugging information to the developer's of Covered).
- Added parsing/handling support for operate-and-assign SystemVerilog operators, including:
+=, -=, *=, /=, %=, &=, |=, ^=, <<=, >>=, <<<=, >>>=, ++ and --. These can be used wherever
their counterparts can be used (including generate for loops).
- Added proper handling of Verilog-1995 delayed blocking assignments (i.e., "a = #5 b;" or
"a = @(posedge clk) c;"). Previously, the delay was being incorrectly ignored which could
have lead to infinite looping of always/forever blocks or could calculate incorrect coverage
information.
- Added parsing support for SystemVerilog .name and .* port lists.
- Added partial parsing/handling support for SystemVerilog 'typedef' usage. This should work for
enumerations but not other data types at this point.
- Added parsing/handling support for SystemVerilog 'enum' constructs. These should be fully
supported with the exception of their built-in '.first', '.last', '.next', '.prev', '.num' and
'.name' methods.
- Added full support of handling Verilog-1995 repeated delay blocking assignments (i.e.,
"a = repeat(5) @(posedge clk) b;". These were previously being treated as normal blocking
assignments.
- Added keyword highlighting support in GUI for Verilog-2001 and SystemVerilog keywords depending
on the -g value specified for a particular module.
- Added parsing support for SystemVerilog assertion, property and sequence blocks. These constructs
are ignored by the parser but should not cause a parsing error now.
- Added parsing support for SystemVerilog multi-dimensional arrays. These are ignored by the
parser but should not cause an error.
- Added full support for the SystemVerilog $root global space -- though limited testing has
been performed with this at this point.
- Added -s option to the report command to suppress the output for modules/instances that contain
no coverage information.
- Updated all user documentation to match changes made for this development release.
- Lots of new diagnostics added to regression suite to verify the majority of these changes.
There you have it. A lot of enhancements made for language support for Verilog-1995, Verilog-2001
and SystemVerilog. Some of the additions for SystemVerilog, especially typedefs and $root global
space, have not been fully verified to work and may still be a bit buggy, but everything else should
be expected to work as advertised. Please submit any bugs that you find. The next development
release should contain support for some more language enhancements, including full support for
typedef and enumeration usage, support for memories, multi-dimensional arrays, structs and unions.
I will also be looking at adding support for bitwise coverage information (for vectored calculations).
As always, have fun!
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* 08/30/2006
Stable release covered-0.4.7 made. This release is mostly a bug fix release with two feature
additions. The new feature is the global -B option was performs name obfuscation on all identifying,
design-sensitive names from all output (with the exception of CDD file output). This option is
mostly useful as a way to share debugging information with the maintainer(s) of Covered without giving
away sensitive information. Additionally, the -rI score option was added to allow user's to completely
skip the race condition checking phase. This allows users to force Covered to consider all code for
coverage (if race condition checking is performed, all code considered to be potential race conditions
are automatically excluded from coverage consideration). User documentation has been updated for these
changes. The following lists the changes in this release.
- Fixed bug 1535412. Implicit event expressions (i.e., "always @*") now traverse named begin/end
blocks correctly to search for RHS variables.
- Fixed bugs related to segmentation faults and memory leak issues
- Fixed hierarchical reference search to match Verilog-1995 LRM
- Fixed bug 1538922. If -vcd or -lxt option was specified twice, an incorrect error message was
displayed to the user.
- Added -rI option to allow user's to bypass the race condition checking step in the score command.
- Fixed bug 1538920. Handling of any-edge triggered events (i.e., "@(b)") was incorrectly handled
by Covered. Additionally, fixed the event trigger operator (->) to work correctly with the new
changes.
- Fixed bug 1541944. Command options that require a value are now checked to make sure that a value
exists, and an appropriate error message is output if this is not achieved.
- Fixed bug 1542454. Command options that must only be allowed once on a command-line are now
checked and handled appropriately (caused a segmentation fault previously).
- Fixed bug 1544322. When an AND- or OR-type expression has either a left or right expression evaluate
to 0 or 1, respectively, Covered now outputs correct coverage information when the opposite expression
evaluates to an X or Z value, simultaneously.
- Fixed bug 1544325. Multi-variable expressions are now always output as such in report files.
- Fixed bug 1544169. Avoiding consideration of named begin/end block keywords in line coverage.
- Fixed bug 1546059. Covered now properly handles the removal of statement blocks that cannot be
considered for coverage which also contain parameters from another functional unit block.
- Fixed bug with connection of statements in a statement block.
- Updated documentation to match new features added in this release.
* 07/22/2006
Stable release covered-0.4.6 made. This release contains several bug fixes that are listed below.
- Fixed segmentation fault bug which occurs when a multi-bit select on the LHS contains any
expression besides static values.
- Fixed several memory leaks found with valgrind
- Fixed bug 1520159 - arrays of instances incorrectly always started at index 0.
- Fixed bug 1521598 having to do with reduction unary invert and logical not operators not
calculating correctly.
- Fixed bug in db_read when a functional unit is being merged to point to the used module.
- Fixed assertion in link.c such that no segmentation fault occurs if a string is not found
in a str_link list for deletion.
- Fixed bug pertaining to embedded concatenations within function/task parameter lists.
- Fixed bug pertaining to empty named begin-end blocks.
- Fixed bug in the db_read function that would cause Covered to flag an internal assertion
error if an error occurred while reading the CDD file and the global -D option was specified.
- Fixed upwards name referencing bug (1524705).
- Enhanced regression suite to verify that all of these bugs are properly fixed.
* 07/08/2006
Stable release covered-0.4.5 made. This release contains a bug fix to properly handle cases
where two or more signals are declared with a parameter in their range field (i.e., reg [FOO:0] a, b;)
This caused Covered to segfault due to attempting to free the same address twice. Bug 1518932.
Also contains a bug fix to properly remove statement blocks that contain case, casex or casez
expressions and unbindable expressions.
* 5/28/2006
Stable release covered-0.4.4 made. This release contains a bug fix to proper handle hierarchical
referencing of parameter values. This feature was technically not supported in the past but caused
an internal assertion error when this was performed. The feature is now fully supported.
* 4/21/2006
Stable release covered-0.4.3 made. This release contains a bug fix to the statement connection function that
caused segmentation faults during the score command. Also added support for big endian wires/regs. This
information was being ignored by the parser and, consequently, was not being handled correctly by Covered's
internal simulator, leading to incorrect coverage information. The lack of this support was also causing
an internal error in the memory allocation routine when scoring the dumpfile.
* 4/17/2006
Stable release covered-0.4.2 made. This release contains a bug fix that caused an assertion error in the
binding.c source file to occur. The reason for this assertion was a syntax error in the parser that caused
problems when more than one task call was made in a statement block. Also added support for multi-line
definitions (i.e., a '\' character used at the end of a definition line). This was missing but was not meant
to be missing.
* 4/4/2006
Stable release covered-0.4.1 made. This release contains one bug fix that causes an assertion error when
compiling designs that use a concatenation operation on the left-hand-side of assignment statements. If
you are experiencing this problem with the 0.4 release, it is recommended that you use this new release
instead.
* 3/29/2006
Stable release covered-0.4 made. In addition to all of the features, optimizations and bug fixes
that have gone into the development releases from the 0.3 stable release, the following features, updates
and bug fixes have been added.
- Fixed bug with a statement connection issue that causes lines of code to be not considered for
coverage that should have been.
- Fixed bug in report command where combinational expressions were not being output to match the original
Verilog code.
- Added CDD file viewer window to GUI to allow the user to see which CDD files are currently loaded/merged.
- Fixed bug in combinational logic verbose viewer which caused the window to resize dependent upon
the location of the cursor (this was an annoyance)
- Changed the output of simple combinational logic to change to unary combinational logic output if either
the left or the right expression was a constant value (eliminates unachievable combinational logic cases
from being output leading to more accurate coverage results).
- Removed combinational expressions that contain only constant values from being considered for coverage.
- Updated simple combinational logic output in reports to be as concise as possible for AND and OR type
expressions.
- Removed duplication of information in CDD files for race conditions.
- Fixed bug in GUI dealing with showing race conditions
- Fixing bug in GUI pertaining to the next/previous buttons in the combinational logic detail viewer. Previously,
clicking on one of these buttons would only advance you to the next uncovered line. Now it will advance
you to the next uncovered statement.
- Updated development, user and GUI documentation to reflect the above changes and to bring them up-to-date
with the rest of the tool.
Please see the ChangeLog file for all changes made from the 0.3 stable release to the 0.4 stable release.
Lots of enhancements, features, optimizations, bug fixes, performance improvements and documentation improvements
are contained in this stable release, making it very worth while for any Covered users to get their hands on
it.
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wait(). Patch (or equivalent) will be applied upstream.
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* Release Notes for Icarus Verilog Snapshot 20061009
The Big news is support for delay path timing is specify blocks. This
includes delay paths and specparams. Back annotation of specify path
timings are not yet implemented.
The "-g" flag has been made a bit more general so that individual
compiler features can be turned on/off. This for example allows for
turning off specify block support and Icarus Verilog extensions, as
well as select language generation.
A variety of bug fixes have been included.
- Missing symbols on Windows fixed.
- mingw build instructions reworked.
- Fix internal handling of -D__ICARUS__ define
- Fix crash of driver when -M flag is used.
- Fix configure detection of host in some subdirectories.
- Handle non-constant delays of index non-blocking assignments.
- $scanf support for real values.
- Fix scheduling of RWsync vs. ROSync callbacks.
- Fix vpi_put_userdata return value.
The iverilog-vpi command now allows .cpp files to stand for C++
source.
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** Release Notes for Icarus Verilog 0.8.3
This is a new release of the stable 0.8 branch. The changes from 0.8.2
are intended to be evolutionary, rather then revolutionary, to enhance
the stability of the branch.
Various simulator bugs have been fixed, including (but not limited to):
- Detect overrun of timescale vs. precision
- Handle more operators in constant expressions
- Various ivl crashes and panics fixed.
- Some performance bottlenecks have been fixed.
- Various tool compilation problems have been fixed.
Also, the internal synthesizer (for synthesis targets) has been
considerably improved. NOTE that the code generators have not been
improved to take advantage of all the changes here, so there is work
yet to be done.
The mingw build process for compiling in Windows has been reworked. It
is now possible (indeed preferable) to compile fully native Icarus
Verilog binaries on Windows with no Cygwin tools at all.
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code.
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------------------------
Release notes for the gEDA/gaf 20060824 snapshot
Changes
_________________________________________________________________
libgeda/gschem
* Updated libgeda's so version to 26:0:0.
* Fixed the infamous "slice" memory problem that was plaguing
gEDA/gaf for a while. Mixing malloc/free and g_malloc/g_free is a
bad idea and also setting a field in deallocated memory tends to
upset glib's memory management.
* Added a new rc variable called "always-promote-attributes" that
takes a string of attribute names that are automatically prompted
when a component is placed on a schematic. The default list is:
"footprint device value model-name".
* Newly rewritten postscript output to be much more compact, sane.
and support unicode (Mike Jarabek).
* gschem now uses stock gtk+ icons if they are available (Tomaz
Solc).
* Improved the robustness of the loading of symbols/schmeatics
(Tomaz Solc).
* Added support for panning using the middle mouse button and
controlling the amount of pan (Peter Clifton).
* Changed the default behavior of the middle button (now mouse pan).
* Added cursor key panning in gschem and rc keywords for controling
the amount of pan (Tomaz Solc).
* Added the ability to zoom in and zoom out using the mouse wheel
(Peter Clifton).
* Added a bunch of new hooks to gschem and libgeda. This supports
various new features such as auto pin attributes, auto attribute
placing (currently commented out), select_component_hook,
select_net_hook, deselect_component_hook, deselect_net_hook,
deselect_all (Carlos Nieves Onega and Dan McMahill).
* Added support for dragging an object using the first mouse button
in gschem (Carlos Nieves Onega).
* Added the beginnings of pcb mode to gschem (Dan McMahill).
* Improvements to the autosave and backup mechanism (Carlos Nieves
Onega).
* Added support for text overbars. The delimiter character is \_ (it
should be at the beginning and end of the where you want the
overbar to be (Carlos Nieves Onega). Postscript output support for
overbars (Mike Jarabek).
* Bug fixes to the auto save mechanism (Carlos Nieves Onega). Please
report any more crashes.
* Fixed component update to work correctly since it was looking for
existing attributes in the wrong places.
* Converted all the noweb code to just plain C (making sure that all
the really nice documentation that Patrick and others is
perserved). gEDA/gaf no longer requires noweb to build (Jason
Childs).
* Removed all pre-GTK 2.x code from gEDA/gaf (Peter Brett).
* Translation updates from various people.
gnetlist
* DRC2 backend bug fixes and improvements (Carlos Nieves Onega).
* Various bug fixes (Werner Hoch and others).
gattrib
* Fixed annoying bug in which gattrib soaked up 70% of processor
time (Stuart Brorson).
* Implemented ability to export CSV file of component sheet (Stuart
Brorson).
* Made cell text different colors depending upon attribute
visibility (Stuart Brorson).
* Applied patch to handle attrib strings with multiple = signs
(Stuart Brorson and Jeff Mallatt).
* Misc bug fixes (Stuart Brorson).
symbols
* Many symbol bug fixes and improvements (Werner Hoch and others).
* Improved the NC symbols so that the drc2 backend handles no
connect situarions better (Carlos Nieves Onega).
gsymcheck
* Various bug fixes and improvements (Carlos Nieves Onega and
others).
utils
* gsch2pcb improvements dealing with how to find gnetlist
executable.
* Updated to the latest version of grenum (Levente Kovacs).
* Applied power pin handling patch (Patrick Doyle).
docs
* Obsoleted all latex documentation and replaced it with a snaphot
of the gEDA wiki. Many thanks to David Hart for the conversion and
necessary support to make this conversion possible.
examples
* No significant changes.
misc
* The geda (gManager) source tarball is not longer being
distributed. All the code is still in the CVS repository, but due
to lack of maintanance, it has been pulled for these snapshot
releases.
* Fixed various Makefiles to support make distcheck again.
* Lots of bug fixes by (Werner Hoch, Carlos Nieves Onega, and many
others).
For more a detailed changes, please look in the appropriate ChangeLogs
in the source tarballs.
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NetBSD.
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========================================================================
Release Notes for PCB snapshot 20060822
========================================================================
- various manual updates
- update the INSTALL documentation
- fix a bug where pins turned into pure holes when an element
was smashed.
- use locale-independent strtod and dtostr functions to avoid problems
loading files saved in some locales.
- fixed various bugs which caused pcb to crash
- update the gtk status line after save/save as
- make the gerber file names be compatible with pre-HID versions
- split plated and unplated drill output
- fix various typos in menus and comments
- add a batch mode HID.
- fix drawing of box around text in the buffer
- various fixes and improvements to the trace optimizer and the
autorouter
- fix board flipping code
- fix rounding bug when creating list of drill sizes
- add support for > 8 copper layers
- avoid strict aliasing violations encountered with gcc4
- refactor code related to handling the filenames in the export
HID's
- fix layer group parsing code
- add the ability to user-configure mouse actions in the lesstif GUI.
- enable loaded netlists by default
- improve the positioning of the drill list in the postscript output
- various improvements to the configure script to improve robustness
and improve error messages when thing don't go well.
- add IPC style footprints for 01005 passives.
- added a Renumber() action which will renumber all reference designators
and produced an annotation file for backannotating to schematics.
- Draw via annulii on assembly drawings
- various other bug fixes and improvements.
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that name exists and GCC 3.4 complains about it. Rename it to signal_s.
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last packaged snapshot. Those are:
--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060215
--------------------------------------------------
* Part select of memory words should now work according to
Verilog-2001. This also led to some cleanup of the handling of types
internally, as well as some infrastructure for general arrays.
* Minor fix to parsing of (* *) attributes.
* Fix rounding of reals to integers.
* Clean up some of the vvp engine related to memories. Remove some
dead instructions.
--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060409
--------------------------------------------------
the most substantial difference in this snapshot the first signs of
generate support. The compiler now supports generate loops and has
been tested with examples that include wires and gates within the
generate scheme. The regression test suite has very few generate
tests, so any concise self-testing test programs that use generate
would be helpful.
Also, instance arrays that use overridden parameters now work
properly.
Task arguments are a bit more flexible in order to support vendor
(notably Xilinx) models that use more interesting task arguments.
Runtime support for bi-directional ports had some bugs fixed, along
with some other minor run-time bugs. Also, the runtime gains support
for typed parameters. And also, there are some new runtime callbacks
for events and memories.
Parameters had a few types related bugs fixed. They are a bit more
flexible now.
And various minor compilation errors have been fixed. This includes
C/C++ compilation errors fixes, and some configure/Makefile tweaks.
--------------------------------------------------
Release Notes for Icarus Verilog Snapshot 20060618
--------------------------------------------------
Add support for system functions in continuous assignments.
Allow concatenations as arguments to inout ports. This comes with a
small variety of internal part select and concatenation bug fixes.
Fix some bugs in constant propagation through ternary expressions.
Fix broken subtraction if small constants in certain cases.
Fix a few datatype mismatch errors.
Make $readmem give warning when input is inadequate for requested
range.
Fix runtime of nand in continuous assignments.
Fix synchronous user defined primiteves to only follow edges.
Fix a runtime error in some thread delays processing.
Improve limited genvar expression handling.
Start a rework of expression elaboration. Make elaboration aware of
the expression context width when appropriate in order to better
handle expression width and padding.
Fix the make rules for parse.cc to reflect that they come from the
same source. Fix the autoconf.sh to configure the stub target.
Fix portability of the lexor source files on Windows systems. Get rid
of the isatty references.
Make a stub lround when the system version is missing.
--------------------------------------------------
* Release Notes for Snapshot 20060809
--------------------------------------------------
Some handling of real values is improved. Real valued literals are
handled in net contexts (continuous assignment, etc.). Also, modulus
of real operands now works. (This is an extension to the Verilog
standard.)
The power operator (**) now works.
Signed right shift works properly now.
The $sscanf and $fscanf are introduced, and work at least for basic
numeric values.
The release function now works to undo general force statements, and
not just contant force statements.
Delay constants up to 64 bits are supported. This at first doesn't
seem like an issue, but when precisions are mixed, it becomes
surprisingly easy to overflow 32bit delays.
The driver is reworked to pass many preprocessor details through a
temporary file instead of on the command line of a system(3)
call. This prevents confusing and incorrect shell processing of
complex strings passed as values to -D flags.
Various other little fixes.
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shortly.
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Changes are:
* Removed all build support for GTK1.
* Dino Ghilardi fixed log.c (the last reminder of GTK1) so
log windows popup don't crash gerbv anymore.
* Dan McMahill added the GCC4 patch.
* Renamed stack_t to macro_stack_t to support darwin/MacOS X
pointed out by Daniel Mack.
* Changed build system to suit new autoconf/automake versions.
Caused gerbv not to find init.scm.
* Fixed a bug so gerbv can handle negative coordinates when using
trailing zeroes.
* Better checking of return values for errors.
* Use setlocale explicit so your locale doesn't screw up sscanf
and strtod to use comma (,) instead of dot (.).
* For distributions there is a new directory called desktop, where
gerbv.desktop and gerbv.png is stored for desktop settings.
Submitted to Debian bug list from Vassilis Pandis for Ubuntu.
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compiler.
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since they always need a C compiler, even when the source code is
completely in C++.
For some other packages, stated in the comment that a C compiler is
really not needed.
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since it is the extract phase where the wrong filenames come from.
Now patch-af finds the file to patch, which it didn't before.
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had actually been ignoring LTCONFIG_OVERRIDE anyway and just using
the default LIBTOOL_OVERRIDE to replace libtool scripts in packages.
This just formalizes the fact that LTCONFIG_OVERRIDE is not used
meaningfully by pkgsrc.
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assignment to make it compile with gcc 4.1.2
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purposes of caching MAKEVARS within bsd.pkg.mk and bsd.makevars.mk.
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Many improvements since the last packaged version including, but not limited
to:
- enhanced transient timestep control algorithm which is significantly more
accurate than spice now.
- enhanced compatibility with hspice netlists
- named nodes (as opposed to numbered only nodes) work now
- improvements to the bsim3v3 model support
- migration from a custom build system to a GNU autoconf/automake based build
system.
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and add a new helper target and script, "show-buildlink3", that outputs
a listing of the buildlink3.mk files included as well as the depth at
which they are included.
For example, "make show-buildlink3" in fonts/Xft2 displays:
zlib
fontconfig
iconv
zlib
freetype2
expat
freetype2
Xrender
renderproto
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of the order in which buildlink3.mk files are (recursively) included
by a package Makefile.
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change.
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library is not found and TCL gets rejected.
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still does not build for me (linker errors). Also, a C compiler is needed.
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asymmetric context. Fixes PR 33783.
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instead.
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