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2022-03-26capstone: fix build on SunOStnn3-1/+36
2021-12-07capstone: Fix install_name on Darwin.jperkin2-1/+17
2021-10-26archivers: Replace RMD160 checksums with BLAKE2s checksumsnia1-2/+2
All checksums have been double-checked against existing RMD160 and SHA512 hashes Could not be committed due to merge conflict: devel/py-traitlets/distinfo The following distfiles were unfetchable (note: some may be only fetched conditionally): ./devel/pvs/distinfo pvs-3.2-solaris.tgz ./devel/eclipse/distinfo eclipse-sourceBuild-srcIncluded-3.0.1.zip
2021-10-07devel: Remove SHA1 hashes for distfilesnia1-2/+1
2020-08-18devel/capstone: Update to 4.0.2riastradh6-32/+37
3.0.5 July 18, 2018 Release 3.0.5 is a stable release version, with important fixes in the core & several bindings against v3.0.5-rc3. Library Fix the include path for Android builds when building cstool. Add posibility to disable universal build for Mac OS. cstool: Separate instruction bytes by spaces. Fix code path of pkg-config in Cmake. Update XCode project for XCode 9.1. Add Cortex-M support to cstool. Cmake forces to be build using MT with MSVC. Better support for Mac OS kernel. X86 Fix some issues in handling EVEX & VEX3 instructions. Fix immediate operand for AND instruction in ATT mode. Fix ATT syntax when imm operand is 0. Better handle XACQUIRE/XRELEASE. Fix imm operand of RETF. Arm Fix an integer overlow bug. Arm64 Bug fix for incorrect operand type in certain load/store instructions. Mips Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32 PowerPC Fix endian check. Sparc Fix an integer overlow bug. SystemZ Fix an integer overlow bug. Python binding Raise error on accessing irrelevant data fields if skipdata & detail modes are enable. 4.0 December 18, 2018 Release 4.0 is a stable release version, with important fixes in the core & several bindings against v3.0.5. Core New APIs: cs_regs_access() Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM. Various updates & bugfixes for all architectures. Add 4 new architectures: EVM, M68K, M680X & TMS320C64x. Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE. Add new error types: CS_ERR_X86_MASM. X86 Add XOP code condition type in x86_xop_cc. Add some info on encoding to cs_x86 in cs_x86_encoding. Add register flags update in cs_x86.{eflags, fpu_flags} Change cs_x86.disp type from int32_t to int64_t. Add new groups: X86_GRP_VM & X86_GRP_FPU. Lots of new instructions (AVX) Arm64 Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS. Mips Add mode CS_MODE_MIPS2. PowerPC Change cs_ppc_op.imm type from int32_t to int64_t. Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX. Lots of new instructions (QPX among them) Sparc Change cs_sparc_op.imm type from int32_t to int64_t. Bindings New bindings: PowerShell & VB6 4.0.1 January 10, 2019 Release 4.0.1 is a stable release version, with minor bugfixes in the core & Python binding. Core Fix some issues for packaging (Debian, Gentoo, etc). Better support for building with Mingw. cstool has new option -s to turn on skipdata mode. cstool -v now report build settings of the core. Add suite/capstone_get_setup.c so users can integrate with their own code to retrieve Capstone settings at build time. Arm Fix 4.0 regression: the tbh [r0, r1, lsl #1] instruction sets the operand.shift.value back again. Remove ARM_REG_PC group for BX instruction. X86 endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64. M680X Fix some issues reported by clang-analyzer. Python binding Fix skipdata setup. Add getter/setter for skipdata_mnem & skipdata_callback. 4.0.2 May 8, 2020 Release 4.0.2 is a stable release version, with minor bugfixes in the core & some bindings. Core Windows kernel-mode driver support Fix installation path on FreeBSD and DragonFly Cstool Add armv8, ppc32 & thumbv8 modes Print instruction ID X86 Support CS_OPT_UNSIGNED for ATT syntax Fix operand size for some instructions Fix LOCK prefixes Recognize xacquire/xrelease prefix Fix call/jmp access mode of mem operand Add ENDBR32, ENDBR64 to reduce mode Other minor fixes Arm Update writeback for STR_POST_REG ARM64 Support CS_OPT_UNSIGNED Fix register access flags for memory instructions Fix UMOV vess M68K Store correct register value in op.reg_pair PowerPC BDZLA is absolute branch SystemZ Fix truncated 64bit imm operand Fix base/index printing Python binding Fix skipdata struct being destroyed Add repr for capstone.CsInsn Java binding Fix Java bindings to use pointers instead of longs Ocaml binding Fix x86_op record
2020-01-26all: migrate homepages from http to httpsrillig1-2/+2
pkglint -r --network --only "migrate" As a side-effect of migrating the homepages, pkglint also fixed a few indentations in unrelated lines. These and the new homepages have been checked manually.
2018-11-12*: Add CTF_SUPPORTED/CTF_FILES_SKIP where necessary.jperkin1-1/+3
2018-08-25capstone: honor LDFLAGS for cstool.wiz2-4/+4
Fixes RELRO build.
2018-03-24Don't build capstone locally in the Python binding.joerg4-2/+36
2018-02-23Update devel/capstone to version 3.0.5-rc2khorben6-57/+31
This provides important fixes in the core & several bindings: Library Fix build for Visual Studio 2012 Fix X86_REL_ADDR macro Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA Better support for embedding Capstone into Windows kernel drivers Support to embedded Capstone into MacOS kernel Support MacOS 10.11 and up Better support for Cygwin Support build packages for FreeBSD & DragonflyBSD Add a command-line tool "cstool" Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc X86 Some random 16-bit code can be handled wrongly. Remove abundant operand type X86_OP_FP Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL Add X86_REG_EFLAGS for STC and STD Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT Rename registers ST0-ST7 to be consistent with asm output Arm Properly handle IT instruction Fix LDRSB Fix writeback for LDR Fix Thumb BigEndian setup Arm Fix arith extender Fix writeback for LDR Rename enum arm64_mrs_reg to arm64_sysreg PowerPC Print 0 offset for memory operand Sparc Fix POPC instruction Python binding Better PyPy support Add __version__ Better support for Python 3 Fix CS_SKIPDATA_CALLBACK prototype Cast skipdata function inside binding to simplify the API Java binding Better handle input with invalid code PowerShell binding New binding Build-tested with devel/ropper and devel/{py-,}radare2 on NetBSD/amd64.
2016-06-13Prepare devel/capstone for split for the base package and bindingskamil3-11/+22
Fix pkglint warnings (whitespace). Bump PKGREVISION.
2016-02-20Fix install_name on Darwin. Bump PKGREVISION.jperkin3-4/+16
2015-11-03Add SHA512 digests for distfiles for devel categoryagc1-1/+2
Issues found with existing distfiles: distfiles/eclipse-sourceBuild-srcIncluded-3.0.1.zip distfiles/fortran-utils-1.1.tar.gz distfiles/ivykis-0.39.tar.gz distfiles/enum-1.11.tar.gz distfiles/pvs-3.2-libraries.tgz distfiles/pvs-3.2-linux.tgz distfiles/pvs-3.2-solaris.tgz distfiles/pvs-3.2-system.tgz No changes made to these distinfo files. Otherwise, existing SHA1 digests verified and found to be the same on the machine holding the existing distfiles (morden). All existing SHA1 digests retained for now as an audit trail.
2015-07-28"Backport upstream patch for pkgsrc to unbreak FreeBSD and DragonflyBSD" - ↵sevan3-2/+38
kamil@
2015-07-19Update to 3.0.4kamil2-6/+6
--------------- Version 3.0.4: Jul 16th, 2015 Library: Improve cross-compile for Android using Android NDK. Support cross-compile for AArch64 Android (with Linux GCC). Removed osxkernel_inttypes.h due to license issue (incompatible with BSD license). Now it is possible to compile with CC having a space inside (such as "ccache gcc") X86: Fix a null pointer dereference bug on handling code with special prefixes. Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax. Print immediate operand in positive form in some algorithm instructions. Properly decode some SSE instructions. PowerPC: Fixed some memory corruption bugs. Mips: Fixed instruction ID of SUBU instruction. Fixed a memory corruption bug. Arm: Fixed a memory corruption bug on IT instruction. XCore: Fixed a memory corruption bug when instruction has a memory operand. Python: Support Virtualenv. setup.py supports option --user if not in a virtualenv to allow for local usage. Properly handle the destruction of Cs object in the case the shared library was already unloaded.
2015-05-09Update to 3.0.3mef2-6/+6
--------------- Version 3.0.3: May 08th, 2015 [ Library ] - Support to embed into Mac OS X kernel extensions. - Now it is possible to compile Capstone with older C compilers, such as GCC 4.8 on Ubuntu 12.04. - Add "test_iter" to MSVC project. [ X86 ] - All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support $1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of "rcll %edx"). - CMPXCHG16B is a valid instruction with LOCK prefix. - Fixed a segfault on the input of 0xF3. [ Arm ] - BLX instruction modifies PC & LR registers. [ Sparc ] - Improved displacement decoding for sparc banching instructions. [ Python binding ] - Fix for Cython so it can properly initialize. - X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type. - Properly support compile with Cygwin & install binding (setup.py).
2015-05-09Githubify. Binary may not be exactly the same, but another update soon.mef2-7/+6
2015-03-12Update to 3.0.2mef2-6/+6
--------------- Version 3.0.2: March 11th, 2015 [ Library ] - On *nix, only export symbols that are part of the API (instead of all the internal symbols). [ X86 ] - Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding. - Fix implicit registers read/written & instruction groups of some instructions. - More flexible on the order of prefixes, so better handle some tricky instructions. - REPNE prefix can go with STOS & MOVS instructions. - Fix a compilation bug for X86_REDUCE mode. - Fix operand size of instructions with operand PTR [] [ Arm ] - Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode). - Fix a bug on handling the If-Then block. [ Mips ] - Sanity check for the input size for MIPS64 mode. [ MSVC ] - Compile capstone.dll with static runtime MSVCR built in. [ Python binding ] - Fix a compiling issue of Cython binding with gcc 4.9.
2015-02-22Update to 3.0.1, Thanks Kamil Rytarowski for information,mef2-6/+6
---------------- Version 3.0.1: February 03, 2015 [ X86 ] - Properly handle LOCK, REP, REPE & REPNE prefixes. - Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions. - Print LJUMP/LCALL without * as prefix for Intel syntax. - Handle REX prefix properly for segment/MMX related instructions (x86_64). - Instruction with length > 15 is consider invalid. - Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP. - Handle some tricky code for some X86_64 instructions with REX prefix. - Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg - MOV32ms & MOV32sm should reference word rather than dword. [ Arm64 ] - BL & BLR instructions do not read SP register. - Print absolute (rather than relative) address for instructions B, BL, CBNZ, ADR. [ Arm ] - Instructions ADC & SBC do not update flags. - BL & BLX do not read SP, but PC register. - Alias LDR instruction with operands [sp], 4 to POP. - Print immediate operand of MVN instruction in positive hexadecimal form. [ PowerPC ] - Fix some compilation bugs when DIET mode is enable. - Populate SLWI/SRWI instruction details with SH operand. [ Python binding ] - Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes. - Fixed a memory leak for Cython disasm functions when we immaturely quit the enumeration of disassembled instructions. - Fix a NULL memory access issue when SKIPDATA & Detail modes are enable at the same time. - Fix a memory leaking bug when when we stop enumeration over the disassembled instructions prematurely. - Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
2014-12-05Import capstone-3.0 as devel/capstone, packaged for wip by Kamilwiz5-0/+58
Rytarowski. Capstone is a disassembly framework with the target of becoming the ultimate disasm engine for binary analysis and reversing in the security community. Capstone supports multiple hardware architectures, including ARM, ARM64 (ARMv8), Mips, PPC, Sparc, SystemZ, XCore and X86 (including X86_64).
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