blob: b298030760e756b9ac84389f181e2f1b422023f8 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
|
# $NetBSD: Makefile,v 1.30 2006/10/04 23:52:47 dmcmahill Exp $
#
DISTNAME= verilog-0.8.3
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v0.8/
MAINTAINER= dmcmahill@NetBSD.org
HOMEPAGE= http://icarus.com/eda/verilog/index.html
COMMENT= Verilog simulation and synthesis tool (stable release version)
PKG_INSTALLATION_TYPES= overwrite pkgviews
CONFLICTS+= verilog-current-[0-9]*
USE_LANGUAGES= c c++
GNU_CONFIGURE= yes
USE_TOOLS+= gmake bison lex
CONFIGURE_ARGS+= --without-ipal
TEST_TARGET= check
.include "../../devel/zlib/buildlink3.mk"
.include "../../archivers/bzip2/buildlink3.mk"
.include "../../devel/gperf/buildlink3.mk"
.include "../../devel/readline/buildlink3.mk"
.include "../../mk/bsd.pkg.mk"
|