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-rw-r--r--Makefile1313logplain
d---------MyHDL-gplcver102logplain
d---------MyHDL-iverilog102logplain
d---------adms172logplain
d---------atlc172logplain
d---------boolean172logplain
d---------cascade172logplain
d---------cgi-wcalc137logplain
d---------covered172logplain
d---------dinotrace-mode173logplain
d---------dinotrace172logplain
d---------diylc138logplain
d---------eagle205logplain
d---------electric172logplain
d---------fastcap172logplain
d---------fasthenry172logplain
d---------felt172logplain
d---------freehdl172logplain
d---------gdsreader138logplain
d---------geda172logplain
d---------gerbv172logplain
d---------ghdl172logplain
d---------gnetman172logplain
d---------gnucap172logplain
d---------gplcver213logplain
d---------gsmc170logplain
d---------gtk1-wcalc102logplain
d---------gtk2-wcalc102logplain
d---------gtkwave172logplain
d---------iverilog213logplain
d---------kicad-doc138logplain
d---------kicad-footprints138logplain
d---------kicad-i18n138logplain
d---------kicad-lib138logplain
d---------kicad172logplain
d---------klayout172logplain
d---------librecad172logplain
d---------libwcalc143logplain
d---------magic207logplain
d---------mcalc173logplain
d---------mex-wcalc137logplain
d---------mpac172logplain
d---------nelma172logplain
d---------ng-spice138logplain
d---------ntesla172logplain
d---------oce326logplain
d---------openscad172logplain
d---------p5-gds2105logplain
d---------pcb173logplain
d---------py-MyHDL181logplain
d---------py-gds138logplain
d---------py-gdscad138logplain
d---------py-simpy138logplain
d---------qcad-partlibrary138logplain
d---------qcad172logplain
d---------sci-wcalc137logplain
d---------solvespace172logplain
d---------spice204logplain
d---------spiceprm138logplain
d---------stdio-wcalc102logplain
d---------tkgate172logplain
d---------tnt-mmtl172logplain
d---------transcalc172logplain
d---------verilog-mode173logplain
d---------veriwell138logplain
d---------wcalc-docs102logplain
d---------wcalc182logplain
d---------xchiplogo172logplain
d---------xcircuit172logplain