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| author | Igor Pashev <pashev.igor@gmail.com> | 2019-12-02 13:09:17 +0300 |
|---|---|---|
| committer | Igor Pashev <pashev.igor@gmail.com> | 2019-12-02 13:09:17 +0300 |
| commit | 38fde63f74091af1f6a0d485474769bb6b4f17ce (patch) | |
| tree | 1317a1fa2ef61c710ff5c653f43c0af8bb164ca6 /debian/patches/arm64-gcc-bug | |
| download | pypy-debian.tar.gz | |
Import pypy (7.2.0+dfsg-1)debian/7.2.0+dfsg-1debian
Diffstat (limited to 'debian/patches/arm64-gcc-bug')
| -rw-r--r-- | debian/patches/arm64-gcc-bug | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/debian/patches/arm64-gcc-bug b/debian/patches/arm64-gcc-bug new file mode 100644 index 0000000..fca2a30 --- /dev/null +++ b/debian/patches/arm64-gcc-bug @@ -0,0 +1,58 @@ +From: Stefano Rivera <stefanor@debian.org> +Date: Tue, 22 Oct 2019 11:37:12 -0700 +Subject: Avoid GCC bug in arm64 JIT + +Arguably, clarify the logic. The real motivation is a gcc bug, see +issue #3086 + +Bug-Upstream: https://bitbucket.org/pypy/pypy/issues/3086/arm64-jit-lots-of-crashes +Bug-GCC: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92131 +Author: Armin Rigo <arigo@tunes.org> +Origin: upstream, https://bitbucket.org/pypy/pypy/commits/d81c769a2353 +--- + rpython/jit/backend/aarch64/opassembler.py | 20 +++++++++----------- + 1 file changed, 9 insertions(+), 11 deletions(-) + +diff --git a/rpython/jit/backend/aarch64/opassembler.py b/rpython/jit/backend/aarch64/opassembler.py +index e8607a8..cfd9d58 100644 +--- a/rpython/jit/backend/aarch64/opassembler.py ++++ b/rpython/jit/backend/aarch64/opassembler.py +@@ -808,9 +808,7 @@ class ResOpAssembler(BaseAssembler): + # Inline a series of STR operations, starting at 'dstaddr_loc'. + # + self.mc.gen_load_int(r.ip0.value, 0) +- i = 0 +- adjustment = 0 +- needs_adjustment = itemsize < 8 and (startbyte % 8) ++ i = dst_i = 0 + total_size = size_box.getint() + while i < total_size: + sz = itemsize +@@ -818,19 +816,19 @@ class ResOpAssembler(BaseAssembler): + next_group += 8 + if next_group <= total_size: + sz = 8 ++ if dst_i % 8: # unaligned? ++ self.mc.ADD_ri(dstaddr_loc.value, dstaddr_loc.value, dst_i) ++ dst_i = 0 + if sz == 8: +- if needs_adjustment: +- self.mc.ADD_ri(dstaddr_loc.value, dstaddr_loc.value, i) +- adjustment = -i +- needs_adjustment = False +- self.mc.STR_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STR_ri(r.ip0.value, dstaddr_loc.value, dst_i) + elif sz == 4: +- self.mc.STRW_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRW_ri(r.ip0.value, dstaddr_loc.value, dst_i) + elif sz == 2: +- self.mc.STRH_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRH_ri(r.ip0.value, dstaddr_loc.value, dst_i) + else: +- self.mc.STRB_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRB_ri(r.ip0.value, dstaddr_loc.value, dst_i) + i += sz ++ dst_i += sz + + else: + if isinstance(size_box, ConstInt): |