summaryrefslogtreecommitdiff
path: root/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
diff options
context:
space:
mode:
authorFelix Geyer <fgeyer@debian.org>2014-04-05 22:17:15 +0200
committerFelix Geyer <fgeyer@debian.org>2014-04-05 22:17:15 +0200
commit1700c7d32f7d9d101cbba9f1fcb8bb57ed16a727 (patch)
tree727251ad65172262944f82bb0f28601c3fb6f6b3 /src/VBox/VMM/VMMR3/CPUMR3Db.cpp
parent1e85aed889b772c2f2daa7a6d9e8bd967aa213d8 (diff)
downloadvirtualbox-upstream.tar.gz
Imported Upstream version 4.3.10-dfsgupstream/4.3.10-dfsgupstream
Diffstat (limited to 'src/VBox/VMM/VMMR3/CPUMR3Db.cpp')
-rw-r--r--src/VBox/VMM/VMMR3/CPUMR3Db.cpp11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/VBox/VMM/VMMR3/CPUMR3Db.cpp b/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
index f6e394206..26cfb857f 100644
--- a/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
+++ b/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
@@ -48,6 +48,8 @@ typedef struct CPUMDBENTRY
uint8_t uStepping;
/** The microarchitecture. */
CPUMMICROARCH enmMicroarch;
+ /** Scalable bus frequency used for reporting other frequencies. */
+ uint64_t uScalableBusFreq;
/** Flags (TBD). */
uint32_t fFlags;
/** The maximum physical address with of the CPU. This should correspond to
@@ -174,6 +176,7 @@ typedef struct CPUMDBENTRY
#include "cpus/Intel_Core_i7_3960X.h"
#include "cpus/Intel_Core_i5_3570.h"
+#include "cpus/Intel_Core_i7_2635QM.h"
#include "cpus/Intel_Xeon_X5482_3_20GHz.h"
#include "cpus/Intel_Pentium_M_processor_2_00GHz.h"
#include "cpus/Intel_Pentium_4_3_00GHz.h"
@@ -181,6 +184,7 @@ typedef struct CPUMDBENTRY
#include "cpus/AMD_FX_8150_Eight_Core.h"
#include "cpus/AMD_Phenom_II_X6_1100T.h"
#include "cpus/Quad_Core_AMD_Opteron_2384.h"
+#include "cpus/AMD_Athlon_64_X2_Dual_Core_4200.h"
#include "cpus/AMD_Athlon_64_3200.h"
#include "cpus/VIA_QuadCore_L4700_1_2_GHz.h"
@@ -207,6 +211,9 @@ static CPUMDBENTRY const * const g_apCpumDbEntries[] =
#ifdef VBOX_CPUDB_Intel_Core_i7_3960X
&g_Entry_Intel_Core_i7_3960X,
#endif
+#ifdef VBOX_CPUDB_Intel_Core_i7_2635QM
+ &g_Entry_Intel_Core_i7_2635QM,
+#endif
#ifdef Intel_Pentium_M_processor_2_00GHz
&g_Entry_Intel_Pentium_M_processor_2_00GHz,
#endif
@@ -226,6 +233,9 @@ static CPUMDBENTRY const * const g_apCpumDbEntries[] =
#ifdef VBOX_CPUDB_Quad_Core_AMD_Opteron_2384
&g_Entry_Quad_Core_AMD_Opteron_2384,
#endif
+#ifdef VBOX_CPUDB_AMD_Athlon_64_X2_Dual_Core_4200
+ &g_Entry_AMD_Athlon_64_X2_Dual_Core_4200,
+#endif
#ifdef VBOX_CPUDB_AMD_Athlon_64_3200
&g_Entry_AMD_Athlon_64_3200,
#endif
@@ -667,6 +677,7 @@ int cpumR3DbGetCpuInfo(const char *pszName, PCPUMINFO pInfo)
pInfo->fMsrMask = pEntry->fMsrMask;
pInfo->iFirstExtCpuIdLeaf = 0; /* Set by caller. */
pInfo->uPadding = 0;
+ pInfo->uScalableBusFreq = pEntry->uScalableBusFreq;
pInfo->paCpuIdLeavesR0 = NIL_RTR0PTR;
pInfo->paMsrRangesR0 = NIL_RTR0PTR;
pInfo->paCpuIdLeavesRC = NIL_RTRCPTR;