blob: 5e1f66b206dddee752b31e5acb8c9d9906d49928 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
|
; $Id: CPUMInternal.mac $
;; @file
; CPUM - Internal header file (asm).
;
;
; Copyright (C) 2006-2012 Oracle Corporation
;
; This file is part of VirtualBox Open Source Edition (OSE), as
; available from http://www.virtualbox.org. This file is free software;
; you can redistribute it and/or modify it under the terms of the GNU
; General Public License (GPL) as published by the Free Software
; Foundation, in version 2 as it comes in the "COPYING" file of the
; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
;
%include "VBox/asmdefs.mac"
%define CPUM_USED_FPU RT_BIT(0)
%define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
%define CPUM_USED_MANUAL_XMM_RESTORE RT_BIT(2)
%define CPUM_USE_SYSENTER RT_BIT(3)
%define CPUM_USE_SYSCALL RT_BIT(4)
%define CPUM_USE_DEBUG_REGS_HOST RT_BIT(5)
%define CPUM_USED_DEBUG_REGS_HOST RT_BIT(6)
%define CPUM_USE_DEBUG_REGS_HYPER RT_BIT(7)
%define CPUM_USED_DEBUG_REGS_HYPER RT_BIT(8)
%define CPUM_USED_DEBUG_REGS_GUEST RT_BIT(9)
%define CPUM_SYNC_FPU_STATE RT_BIT(16)
%define CPUM_SYNC_DEBUG_REGS_GUEST RT_BIT(17)
%define CPUM_SYNC_DEBUG_REGS_HYPER RT_BIT(18)
%define CPUM_USE_FFXSR_LEAKY RT_BIT(19)
%define CPUM_HANDLER_DS 1
%define CPUM_HANDLER_ES 2
%define CPUM_HANDLER_FS 3
%define CPUM_HANDLER_GS 4
%define CPUM_HANDLER_IRET 5
%define CPUM_HANDLER_TYPEMASK 0ffh
%define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
%define VMMGCRET_USED_FPU 040000000h
%define FPUSTATE_SIZE 512
;; if anyone figures how to do %if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) in
; nasm please tell / fix this hack.
%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
%define fVBOX_WITH_HYBRID_32BIT_KERNEL 1
%else
%define fVBOX_WITH_HYBRID_32BIT_KERNEL 0
%endif
struc CPUM
;...
.offCPUMCPU0 resd 1
.fHostUseFlags resd 1
; CPUID eax=1
.CPUFeatures.edx resd 1
.CPUFeatures.ecx resd 1
; CPUID eax=0x80000001
.CPUFeaturesExt.edx resd 1
.CPUFeaturesExt.ecx resd 1
; CR4 masks
.CR4.AndMask resd 1
.CR4.OrMask resd 1
; entered rawmode?
.u8PortableCpuIdLevel resb 1
.fPendingRestore resb 1
%if RTHCPTR_CB == 8
.abPadding resb 6
%else
.abPadding resb 2
%endif
; CPUID leafs
.aGuestCpuIdStd resb 16*6
.aGuestCpuIdExt resb 16*10
.aGuestCpuIdCentaur resb 16*4
.aGuestCpuIdHyper resb 16*4
.GuestCpuIdDef resb 16
%if HC_ARCH_BITS == 32
.abPadding2 resb 4
%endif
.GuestInfo resb RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*12
.GuestFeatures resb 32
.HostFeatures resb 32
.cMsrWrites resq 1
.cMsrWritesToIgnoredBits resq 1
.cMsrWritesRaiseGp resq 1
.cMsrWritesUnknown resq 1
.cMsrReads resq 1
.cMsrReadsRaiseGp resq 1
.cMsrReadsUnknown resq 1
endstruc
struc CPUMCPU
;
; Hypervisor Context.
;
.Hyper.fpu resb 512
.Hyper.eax resq 1
.Hyper.ecx resq 1
.Hyper.edx resq 1
.Hyper.ebx resq 1
.Hyper.esp resq 1
.Hyper.ebp resq 1
.Hyper.esi resq 1
.Hyper.edi resq 1
.Hyper.r8 resq 1
.Hyper.r9 resq 1
.Hyper.r10 resq 1
.Hyper.r11 resq 1
.Hyper.r12 resq 1
.Hyper.r13 resq 1
.Hyper.r14 resq 1
.Hyper.r15 resq 1
.Hyper.es.Sel resw 1
.Hyper.es.PaddingSel resw 1
.Hyper.es.ValidSel resw 1
.Hyper.es.fFlags resw 1
.Hyper.es.u64Base resq 1
.Hyper.es.u32Limit resd 1
.Hyper.es.Attr resd 1
.Hyper.cs.Sel resw 1
.Hyper.cs.PaddingSel resw 1
.Hyper.cs.ValidSel resw 1
.Hyper.cs.fFlags resw 1
.Hyper.cs.u64Base resq 1
.Hyper.cs.u32Limit resd 1
.Hyper.cs.Attr resd 1
.Hyper.ss.Sel resw 1
.Hyper.ss.PaddingSel resw 1
.Hyper.ss.ValidSel resw 1
.Hyper.ss.fFlags resw 1
.Hyper.ss.u64Base resq 1
.Hyper.ss.u32Limit resd 1
.Hyper.ss.Attr resd 1
.Hyper.ds.Sel resw 1
.Hyper.ds.PaddingSel resw 1
.Hyper.ds.ValidSel resw 1
.Hyper.ds.fFlags resw 1
.Hyper.ds.u64Base resq 1
.Hyper.ds.u32Limit resd 1
.Hyper.ds.Attr resd 1
.Hyper.fs.Sel resw 1
.Hyper.fs.PaddingSel resw 1
.Hyper.fs.ValidSel resw 1
.Hyper.fs.fFlags resw 1
.Hyper.fs.u64Base resq 1
.Hyper.fs.u32Limit resd 1
.Hyper.fs.Attr resd 1
.Hyper.gs.Sel resw 1
.Hyper.gs.PaddingSel resw 1
.Hyper.gs.ValidSel resw 1
.Hyper.gs.fFlags resw 1
.Hyper.gs.u64Base resq 1
.Hyper.gs.u32Limit resd 1
.Hyper.gs.Attr resd 1
.Hyper.eip resq 1
.Hyper.eflags resq 1
.Hyper.cr0 resq 1
.Hyper.cr2 resq 1
.Hyper.cr3 resq 1
.Hyper.cr4 resq 1
.Hyper.dr resq 8
.Hyper.gdtrPadding resw 3
.Hyper.gdtr resw 0
.Hyper.gdtr.cbGdt resw 1
.Hyper.gdtr.pGdt resq 1
.Hyper.idtrPadding resw 3
.Hyper.idtr resw 0
.Hyper.idtr.cbIdt resw 1
.Hyper.idtr.pIdt resq 1
.Hyper.ldtr.Sel resw 1
.Hyper.ldtr.PaddingSel resw 1
.Hyper.ldtr.ValidSel resw 1
.Hyper.ldtr.fFlags resw 1
.Hyper.ldtr.u64Base resq 1
.Hyper.ldtr.u32Limit resd 1
.Hyper.ldtr.Attr resd 1
.Hyper.tr.Sel resw 1
.Hyper.tr.PaddingSel resw 1
.Hyper.tr.ValidSel resw 1
.Hyper.tr.fFlags resw 1
.Hyper.tr.u64Base resq 1
.Hyper.tr.u32Limit resd 1
.Hyper.tr.Attr resd 1
.Hyper.SysEnter.cs resb 8
.Hyper.SysEnter.eip resb 8
.Hyper.SysEnter.esp resb 8
.Hyper.msrEFER resb 8
.Hyper.msrSTAR resb 8
.Hyper.msrPAT resb 8
.Hyper.msrLSTAR resb 8
.Hyper.msrCSTAR resb 8
.Hyper.msrSFMASK resb 8
.Hyper.msrKERNELGSBASE resb 8
.Hyper.msrApicBase resb 8
;
; Host context state
;
alignb 64
.Host.fpu resb FPUSTATE_SIZE
%if HC_ARCH_BITS == 64 || fVBOX_WITH_HYBRID_32BIT_KERNEL
;.Host.rax resq 1 - scratch
.Host.rbx resq 1
;.Host.rcx resq 1 - scratch
;.Host.rdx resq 1 - scratch
.Host.rdi resq 1
.Host.rsi resq 1
.Host.rbp resq 1
.Host.rsp resq 1
;.Host.r8 resq 1 - scratch
;.Host.r9 resq 1 - scratch
.Host.r10 resq 1
.Host.r11 resq 1
.Host.r12 resq 1
.Host.r13 resq 1
.Host.r14 resq 1
.Host.r15 resq 1
;.Host.rip resd 1 - scratch
.Host.rflags resq 1
%endif
%if HC_ARCH_BITS == 32
;.Host.eax resd 1 - scratch
.Host.ebx resd 1
;.Host.edx resd 1 - scratch
;.Host.ecx resd 1 - scratch
.Host.edi resd 1
.Host.esi resd 1
.Host.ebp resd 1
.Host.eflags resd 1
;.Host.eip resd 1 - scratch
; lss pair!
.Host.esp resd 1
%endif
.Host.ss resw 1
.Host.ssPadding resw 1
.Host.gs resw 1
.Host.gsPadding resw 1
.Host.fs resw 1
.Host.fsPadding resw 1
.Host.es resw 1
.Host.esPadding resw 1
.Host.ds resw 1
.Host.dsPadding resw 1
.Host.cs resw 1
.Host.csPadding resw 1
%if HC_ARCH_BITS == 32 && fVBOX_WITH_HYBRID_32BIT_KERNEL == 0
.Host.cr0 resd 1
;.Host.cr2 resd 1 - scratch
.Host.cr3 resd 1
.Host.cr4 resd 1
.Host.dr0 resd 1
.Host.dr1 resd 1
.Host.dr2 resd 1
.Host.dr3 resd 1
.Host.dr6 resd 1
.Host.dr7 resd 1
.Host.gdtr resb 6 ; GDT limit + linear address
.Host.gdtrPadding resw 1
.Host.idtr resb 6 ; IDT limit + linear address
.Host.idtrPadding resw 1
.Host.ldtr resw 1
.Host.ldtrPadding resw 1
.Host.tr resw 1
.Host.trPadding resw 1
.Host.SysEnterPadding resd 1
.Host.SysEnter.cs resq 1
.Host.SysEnter.eip resq 1
.Host.SysEnter.esp resq 1
.Host.efer resq 1
%else ; 64-bit
.Host.cr0 resq 1
;.Host.cr2 resq 1 - scratch
.Host.cr3 resq 1
.Host.cr4 resq 1
.Host.cr8 resq 1
.Host.dr0 resq 1
.Host.dr1 resq 1
.Host.dr2 resq 1
.Host.dr3 resq 1
.Host.dr6 resq 1
.Host.dr7 resq 1
.Host.gdtr resb 10 ; GDT limit + linear address
.Host.gdtrPadding resw 1
.Host.idtr resb 10 ; IDT limit + linear address
.Host.idtrPadding resw 1
.Host.ldtr resw 1
.Host.ldtrPadding resw 1
.Host.tr resw 1
.Host.trPadding resw 1
.Host.SysEnter.cs resq 1
.Host.SysEnter.eip resq 1
.Host.SysEnter.esp resq 1
.Host.FSbase resq 1
.Host.GSbase resq 1
.Host.efer resq 1
%endif ; 64-bit
%ifdef VBOX_WITH_CRASHDUMP_MAGIC
.aMagic resb 56
.uMagic resq 1
%endif
;
; Guest context state
; (Identical to the .Hyper chunk above.)
;
alignb 64
.Guest.fpu resb 512
.Guest.eax resq 1
.Guest.ecx resq 1
.Guest.edx resq 1
.Guest.ebx resq 1
.Guest.esp resq 1
.Guest.ebp resq 1
.Guest.esi resq 1
.Guest.edi resq 1
.Guest.r8 resq 1
.Guest.r9 resq 1
.Guest.r10 resq 1
.Guest.r11 resq 1
.Guest.r12 resq 1
.Guest.r13 resq 1
.Guest.r14 resq 1
.Guest.r15 resq 1
.Guest.es.Sel resw 1
.Guest.es.PaddingSel resw 1
.Guest.es.ValidSel resw 1
.Guest.es.fFlags resw 1
.Guest.es.u64Base resq 1
.Guest.es.u32Limit resd 1
.Guest.es.Attr resd 1
.Guest.cs.Sel resw 1
.Guest.cs.PaddingSel resw 1
.Guest.cs.ValidSel resw 1
.Guest.cs.fFlags resw 1
.Guest.cs.u64Base resq 1
.Guest.cs.u32Limit resd 1
.Guest.cs.Attr resd 1
.Guest.ss.Sel resw 1
.Guest.ss.PaddingSel resw 1
.Guest.ss.ValidSel resw 1
.Guest.ss.fFlags resw 1
.Guest.ss.u64Base resq 1
.Guest.ss.u32Limit resd 1
.Guest.ss.Attr resd 1
.Guest.ds.Sel resw 1
.Guest.ds.PaddingSel resw 1
.Guest.ds.ValidSel resw 1
.Guest.ds.fFlags resw 1
.Guest.ds.u64Base resq 1
.Guest.ds.u32Limit resd 1
.Guest.ds.Attr resd 1
.Guest.fs.Sel resw 1
.Guest.fs.PaddingSel resw 1
.Guest.fs.ValidSel resw 1
.Guest.fs.fFlags resw 1
.Guest.fs.u64Base resq 1
.Guest.fs.u32Limit resd 1
.Guest.fs.Attr resd 1
.Guest.gs.Sel resw 1
.Guest.gs.PaddingSel resw 1
.Guest.gs.ValidSel resw 1
.Guest.gs.fFlags resw 1
.Guest.gs.u64Base resq 1
.Guest.gs.u32Limit resd 1
.Guest.gs.Attr resd 1
.Guest.eip resq 1
.Guest.eflags resq 1
.Guest.cr0 resq 1
.Guest.cr2 resq 1
.Guest.cr3 resq 1
.Guest.cr4 resq 1
.Guest.dr resq 8
.Guest.gdtrPadding resw 3
.Guest.gdtr resw 0
.Guest.gdtr.cbGdt resw 1
.Guest.gdtr.pGdt resq 1
.Guest.idtrPadding resw 3
.Guest.idtr resw 0
.Guest.idtr.cbIdt resw 1
.Guest.idtr.pIdt resq 1
.Guest.ldtr.Sel resw 1
.Guest.ldtr.PaddingSel resw 1
.Guest.ldtr.ValidSel resw 1
.Guest.ldtr.fFlags resw 1
.Guest.ldtr.u64Base resq 1
.Guest.ldtr.u32Limit resd 1
.Guest.ldtr.Attr resd 1
.Guest.tr.Sel resw 1
.Guest.tr.PaddingSel resw 1
.Guest.tr.ValidSel resw 1
.Guest.tr.fFlags resw 1
.Guest.tr.u64Base resq 1
.Guest.tr.u32Limit resd 1
.Guest.tr.Attr resd 1
.Guest.SysEnter.cs resb 8
.Guest.SysEnter.eip resb 8
.Guest.SysEnter.esp resb 8
.Guest.msrEFER resb 8
.Guest.msrSTAR resb 8
.Guest.msrPAT resb 8
.Guest.msrLSTAR resb 8
.Guest.msrCSTAR resb 8
.Guest.msrSFMASK resb 8
.Guest.msrKERNELGSBASE resb 8
.Guest.msrApicBase resb 8
alignb 64
.GuestMsrs.au64 resq 64
;
; Other stuff.
;
.fUseFlags resd 1
.fChanged resd 1
.offCPUM resd 1
.u32RetCode resd 1
%ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
.pvApicBase RTR0PTR_RES 1
.fApicDisVectors resd 1
.fX2Apic resb 1
%else
.abPadding3 resb (RTR0PTR_CB + 4 + 1)
%endif
.fRawEntered resb 1
.fRemEntered resb 1
.abPadding2 resb (64 - 16 - RTR0PTR_CB - 4 - 1 - 2)
endstruc
;;
; Converts the CPUM pointer to CPUMCPU
; @param %1 register name
%macro CPUMCPU_FROM_CPUM 1
add %1, dword [%1 + CPUM.offCPUMCPU0]
%endmacro
;;
; Converts the CPUM pointer to CPUMCPU
; @param %1 register name (CPUM)
; @param %2 register name (CPUMCPU offset)
%macro CPUMCPU_FROM_CPUM_WITH_OFFSET 2
add %1, %2
%endmacro
;;
; Converts the CPUMCPU pointer to CPUM
; @param %1 register name
%macro CPUM_FROM_CPUMCPU 1
sub %1, dword [%1 + CPUMCPU.offCPUM]
%endmacro
;;
; Converts the CPUMCPU pointer to CPUM
; @param %1 register name (CPUM)
; @param %2 register name (CPUMCPU offset)
%macro CPUM_FROM_CPUMCPU_WITH_OFFSET 2
sub %1, %2
%endmacro
|
