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authorJohn Hodge <tpg@mutabah.net>2018-12-15 15:40:54 +0800
committerJohn Hodge <tpg@mutabah.net>2018-12-15 15:40:54 +0800
commitf893005e2b0a207826d56782afcd456754adb643 (patch)
tree977dcb234882d47c94e6ba46540ec0868cb986e1
parentf6209dce15ce863e15dc3063d78e43eeb0db25ee (diff)
downloadmrust-f893005e2b0a207826d56782afcd456754adb643.tar.gz
Trans Target - Fix MSVC build
-rw-r--r--src/trans/target.cpp12
-rw-r--r--src/trans/target.hpp42
2 files changed, 36 insertions, 18 deletions
diff --git a/src/trans/target.cpp b/src/trans/target.cpp
index 332a7e04..53d84030 100644
--- a/src/trans/target.cpp
+++ b/src/trans/target.cpp
@@ -17,32 +17,32 @@
const TargetArch ARCH_X86_64 = {
"x86_64",
64, false,
- { /*atomic(u8)=*/true, false, true, true, true },
- { 2, 4, 8, 16, 4, 8, 8 },
+ TargetArch::Atomics(/*atomic(u8)=*/true, false, true, true, true),
+ TargetArch::Alignments(2, 4, 8, 16, 4, 8, 8)
};
const TargetArch ARCH_X86 = {
"x86",
32, false,
{ /*atomic(u8)=*/true, false, true, false, true },
- { 2, 4, /*u64*/4, /*u128*/4, 4, 4, /*ptr*/4 } // u128 has the same alignment as u64, which is u32's alignment. And f64 is 4 byte aligned
+ TargetArch::Alignments(2, 4, /*u64*/4, /*u128*/4, 4, 4, /*ptr*/4) // u128 has the same alignment as u64, which is u32's alignment. And f64 is 4 byte aligned
};
const TargetArch ARCH_ARM64 = {
"aarch64",
64, false,
{ /*atomic(u8)=*/true, true, true, true, true },
- { 2, 4, 8, 16, 4, 8, 8 },
+ TargetArch::Alignments(2, 4, 8, 16, 4, 8, 8)
};
const TargetArch ARCH_ARM32 = {
"arm",
32, false,
{ /*atomic(u8)=*/true, false, true, false, true },
- { 2, 4, 8, 16, 4, 8, 4 } // Note, all types are natively aligned (but i128 will be emulated)
+ TargetArch::Alignments(2, 4, 8, 16, 4, 8, 4) // Note, all types are natively aligned (but i128 will be emulated)
};
const TargetArch ARCH_M68K = {
"m68k",
32, true,
{ /*atomic(u8)=*/true, false, true, false, true },
- { 2, 4, 8, 16, 4, 8, 4 } // TODO: Does m68k have lower alignments?
+ TargetArch::Alignments(2, 4, 8, 16, 4, 8, 4) // TODO: Does m68k have lower alignments?
};
TargetSpec g_target;
diff --git a/src/trans/target.hpp b/src/trans/target.hpp
index b6f04a42..4e0309dd 100644
--- a/src/trans/target.hpp
+++ b/src/trans/target.hpp
@@ -20,26 +20,44 @@ enum class CodegenMode
// NOTE: The default architecture is an unnamed 32-bit little-endian arch with all types natively aligned
struct TargetArch
{
- ::std::string m_name = "";
- unsigned m_pointer_bits = 32;
- bool m_big_endian = false;
+ ::std::string m_name;
+ unsigned m_pointer_bits;
+ bool m_big_endian;
- struct {
+ struct Atomics {
bool u8 = true;
bool u16 = true;
bool u32 = true;
bool u64 = false;
bool ptr = true;
+ Atomics(bool u8 = true, bool u16 = true, bool u32 = true, bool u64 = false, bool ptr = true)
+ :u8(u8)
+ ,u16(u16)
+ ,u32(u32)
+ ,u64(u64)
+ ,ptr(ptr)
+ {
+ }
} m_atomics;
- struct {
- uint8_t u16 = 2;
- uint8_t u32 = 4;
- uint8_t u64 = 8;
- uint8_t u128 = 16;
- uint8_t f32 = 4;
- uint8_t f64 = 8;
- uint8_t ptr = 4;
+ struct Alignments {
+ uint8_t u16;
+ uint8_t u32;
+ uint8_t u64;
+ uint8_t u128;
+ uint8_t f32;
+ uint8_t f64;
+ uint8_t ptr;
+ Alignments(uint8_t u16 = 2, uint8_t u32 = 4, uint8_t u64 = 8, uint8_t u128 = 16, uint8_t f32 = 4, uint8_t f64 = 8, uint8_t ptr = 4)
+ :u16 (u16)
+ ,u32 (u32 )
+ ,u64 (u64 )
+ ,u128(u128)
+ ,f32 (f32 )
+ ,f64 (f64 )
+ ,ptr (ptr )
+ {
+ }
} m_alignments;
};
struct BackendOptsC