Imported Upstream version 2.22upstream/2.22upstream

23 files changed, 1340 insertions, 0 deletions

diff --git a/tests/expected/lscpu/lscpu-i386-amdshanghai b/tests/expected/lscpu/lscpu-i386-amdshanghai
new file mode 100644
index 0000000..25dcaa9
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-i386-amdshanghai
@@ -0,0 +1,29 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                8
+Thread(s) per core:    1
+Core(s) per socket:    4
+Socket(s):             2
+Vendor ID:             AuthenticAMD
+CPU family:            16
+Model:                 4
+Stepping:              0
+CPU MHz:               1995.158
+BogoMIPS:              3989.99
+Virtualization:        AMD-V
+L1d cache:             512K
+L1i cache:             512K
+L2 cache:              512K
+L3 cache:              6144K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,,,0,0,0,0
+1,1,0,,,1,1,1,1
+2,2,0,,,2,2,2,2
+3,3,0,,,3,3,3,3
+4,4,1,,,4,4,4,4
+5,5,1,,,5,5,5,5
+6,6,1,,,6,6,6,6
+7,7,1,,,7,7,7,7
diff --git a/tests/expected/lscpu/lscpu-i386-dellpe700 b/tests/expected/lscpu/lscpu-i386-dellpe700
new file mode 100644
index 0000000..77c30af
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-i386-dellpe700
@@ -0,0 +1,17 @@
+CPU(s):                2
+Thread(s) per core:    2
+Core(s) per socket:    1
+Socket(s):             1
+Vendor ID:             GenuineIntel
+CPU family:            15
+Model:                 2
+Stepping:              9
+CPU MHz:               3391.773
+BogoMIPS:              6781.99
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,0,0,
diff --git a/tests/expected/lscpu/lscpu-i386-intels5000phb b/tests/expected/lscpu/lscpu-i386-intels5000phb
new file mode 100644
index 0000000..bc64565
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-i386-intels5000phb
@@ -0,0 +1,28 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                8
+Thread(s) per core:    1
+Core(s) per socket:    4
+Socket(s):             2
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 15
+Stepping:              7
+CPU MHz:               1596.044
+BogoMIPS:              3191.91
+Virtualization:        VT-x
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              4096K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+0,0,0,,,0,0,0
+1,1,0,,,1,1,0
+2,2,0,,,2,2,1
+3,3,0,,,3,3,1
+4,4,1,,,4,4,2
+5,5,1,,,5,5,2
+6,6,1,,,6,6,3
+7,7,1,,,7,7,3
diff --git a/tests/expected/lscpu/lscpu-i386-xenpara b/tests/expected/lscpu/lscpu-i386-xenpara
new file mode 100644
index 0000000..ae3fa2c
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-i386-xenpara
@@ -0,0 +1,19 @@
+CPU(s):                2
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 23
+Stepping:              6
+CPU MHz:               2493.776
+Virtualization:        VT-x
+Hypervisor vendor:     Xen
+Virtualization type:   para
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              6144K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+0,,,,,0,0,0
+1,,,,,1,1,0
diff --git a/tests/expected/lscpu/lscpu-ia64-512cpus b/tests/expected/lscpu/lscpu-ia64-512cpus
new file mode 100644
index 0000000..0de3ff4
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ia64-512cpus
@@ -0,0 +1,654 @@
+CPU(s):                512
+Thread(s) per core:    1
+Core(s) per socket:    2
+Socket(s):             256
+NUMA node(s):          128
+Vendor ID:             GenuineIntel
+CPU family:            32
+Model:                 0
+CPU MHz:               1594.000007
+NUMA node0 CPU(s):     0-3
+NUMA node1 CPU(s):     4-7
+NUMA node2 CPU(s):     8-11
+NUMA node3 CPU(s):     12-15
+NUMA node4 CPU(s):     16-19
+NUMA node5 CPU(s):     20-23
+NUMA node6 CPU(s):     24-27
+NUMA node7 CPU(s):     28-31
+NUMA node8 CPU(s):     32-35
+NUMA node9 CPU(s):     36-39
+NUMA node10 CPU(s):    40-43
+NUMA node11 CPU(s):    44-47
+NUMA node12 CPU(s):    48-51
+NUMA node13 CPU(s):    52-55
+NUMA node14 CPU(s):    56-59
+NUMA node15 CPU(s):    60-63
+NUMA node16 CPU(s):    64-67
+NUMA node17 CPU(s):    68-71
+NUMA node18 CPU(s):    72-75
+NUMA node19 CPU(s):    76-79
+NUMA node20 CPU(s):    80-83
+NUMA node21 CPU(s):    84-87
+NUMA node22 CPU(s):    88-91
+NUMA node23 CPU(s):    92-95
+NUMA node24 CPU(s):    96-99
+NUMA node25 CPU(s):    100-103
+NUMA node26 CPU(s):    104-107
+NUMA node27 CPU(s):    108-111
+NUMA node28 CPU(s):    112-115
+NUMA node29 CPU(s):    116-119
+NUMA node30 CPU(s):    120-123
+NUMA node31 CPU(s):    124-127
+NUMA node32 CPU(s):    128-131
+NUMA node33 CPU(s):    132-135
+NUMA node34 CPU(s):    136-139
+NUMA node35 CPU(s):    140-143
+NUMA node36 CPU(s):    144-147
+NUMA node37 CPU(s):    148-151
+NUMA node38 CPU(s):    152-155
+NUMA node39 CPU(s):    156-159
+NUMA node40 CPU(s):    160-163
+NUMA node41 CPU(s):    164-167
+NUMA node42 CPU(s):    168-171
+NUMA node43 CPU(s):    172-175
+NUMA node44 CPU(s):    176-179
+NUMA node45 CPU(s):    180-183
+NUMA node46 CPU(s):    184-187
+NUMA node47 CPU(s):    188-191
+NUMA node48 CPU(s):    192-195
+NUMA node49 CPU(s):    196-199
+NUMA node50 CPU(s):    200-203
+NUMA node51 CPU(s):    204-207
+NUMA node52 CPU(s):    208-211
+NUMA node53 CPU(s):    212-215
+NUMA node54 CPU(s):    216-219
+NUMA node55 CPU(s):    220-223
+NUMA node56 CPU(s):    224-227
+NUMA node57 CPU(s):    228-231
+NUMA node58 CPU(s):    232-235
+NUMA node59 CPU(s):    236-239
+NUMA node60 CPU(s):    240-243
+NUMA node61 CPU(s):    244-247
+NUMA node62 CPU(s):    248-251
+NUMA node63 CPU(s):    252-255
+NUMA node64 CPU(s):    256-259
+NUMA node65 CPU(s):    260-263
+NUMA node66 CPU(s):    264-267
+NUMA node67 CPU(s):    268-271
+NUMA node68 CPU(s):    272-275
+NUMA node69 CPU(s):    276-279
+NUMA node70 CPU(s):    280-283
+NUMA node71 CPU(s):    284-287
+NUMA node72 CPU(s):    288-291
+NUMA node73 CPU(s):    292-295
+NUMA node74 CPU(s):    296-299
+NUMA node75 CPU(s):    300-303
+NUMA node76 CPU(s):    304-307
+NUMA node77 CPU(s):    308-311
+NUMA node78 CPU(s):    312-315
+NUMA node79 CPU(s):    316-319
+NUMA node80 CPU(s):    320-323
+NUMA node81 CPU(s):    324-327
+NUMA node82 CPU(s):    328-331
+NUMA node83 CPU(s):    332-335
+NUMA node84 CPU(s):    336-339
+NUMA node85 CPU(s):    340-343
+NUMA node86 CPU(s):    344-347
+NUMA node87 CPU(s):    348-351
+NUMA node88 CPU(s):    352-355
+NUMA node89 CPU(s):    356-359
+NUMA node90 CPU(s):    360-363
+NUMA node91 CPU(s):    364-367
+NUMA node92 CPU(s):    368-371
+NUMA node93 CPU(s):    372-375
+NUMA node94 CPU(s):    376-379
+NUMA node95 CPU(s):    380-383
+NUMA node96 CPU(s):    384-387
+NUMA node97 CPU(s):    388-391
+NUMA node98 CPU(s):    392-395
+NUMA node99 CPU(s):    396-399
+NUMA node100 CPU(s):   400-403
+NUMA node101 CPU(s):   404-407
+NUMA node102 CPU(s):   408-411
+NUMA node103 CPU(s):   412-415
+NUMA node104 CPU(s):   416-419
+NUMA node105 CPU(s):   420-423
+NUMA node106 CPU(s):   424-427
+NUMA node107 CPU(s):   428-431
+NUMA node108 CPU(s):   432-435
+NUMA node109 CPU(s):   436-439
+NUMA node110 CPU(s):   440-443
+NUMA node111 CPU(s):   444-447
+NUMA node112 CPU(s):   448-451
+NUMA node113 CPU(s):   452-455
+NUMA node114 CPU(s):   456-459
+NUMA node115 CPU(s):   460-463
+NUMA node116 CPU(s):   464-467
+NUMA node117 CPU(s):   468-471
+NUMA node118 CPU(s):   472-475
+NUMA node119 CPU(s):   476-479
+NUMA node120 CPU(s):   480-483
+NUMA node121 CPU(s):   484-487
+NUMA node122 CPU(s):   488-491
+NUMA node123 CPU(s):   492-495
+NUMA node124 CPU(s):   496-499
+NUMA node125 CPU(s):   500-503
+NUMA node126 CPU(s):   504-507
+NUMA node127 CPU(s):   508-511
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,0
+1,1,0,0
+2,2,1,0
+3,3,1,0
+4,4,2,1
+5,5,2,1
+6,6,3,1
+7,7,3,1
+8,8,4,2
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+12,12,6,3
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+24,24,12,6
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+27,27,13,6
+28,28,14,7
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+442,442,221,110
+443,443,221,110
+444,444,222,111
+445,445,222,111
+446,446,223,111
+447,447,223,111
+448,448,224,112
+449,449,224,112
+450,450,225,112
+451,451,225,112
+452,452,226,113
+453,453,226,113
+454,454,227,113
+455,455,227,113
+456,456,228,114
+457,457,228,114
+458,458,229,114
+459,459,229,114
+460,460,230,115
+461,461,230,115
+462,462,231,115
+463,463,231,115
+464,464,232,116
+465,465,232,116
+466,466,233,116
+467,467,233,116
+468,468,234,117
+469,469,234,117
+470,470,235,117
+471,471,235,117
+472,472,236,118
+473,473,236,118
+474,474,237,118
+475,475,237,118
+476,476,238,119
+477,477,238,119
+478,478,239,119
+479,479,239,119
+480,480,240,120
+481,481,240,120
+482,482,241,120
+483,483,241,120
+484,484,242,121
+485,485,242,121
+486,486,243,121
+487,487,243,121
+488,488,244,122
+489,489,244,122
+490,490,245,122
+491,491,245,122
+492,492,246,123
+493,493,246,123
+494,494,247,123
+495,495,247,123
+496,496,248,124
+497,497,248,124
+498,498,249,124
+499,499,249,124
+500,500,250,125
+501,501,250,125
+502,502,251,125
+503,503,251,125
+504,504,252,126
+505,505,252,126
+506,506,253,126
+507,507,253,126
+508,508,254,127
+509,509,254,127
+510,510,255,127
+511,511,255,127
diff --git a/tests/expected/lscpu/lscpu-ia64-hpmatterhorn b/tests/expected/lscpu/lscpu-ia64-hpmatterhorn
new file mode 100644
index 0000000..0322622
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ia64-hpmatterhorn
@@ -0,0 +1,29 @@
+CPU(s):                8
+Thread(s) per core:    1
+Core(s) per socket:    1
+Socket(s):             8
+NUMA node(s):          3
+Vendor ID:             GenuineIntel
+CPU family:            Itanium 2
+Model:                 1
+CPU MHz:               1300.000000
+L1d cache:             16K
+L1i cache:             16K
+L2 cache:              256K
+L3 cache:              3072K
+NUMA node0 CPU(s):     4-7
+NUMA node1 CPU(s):     0-3
+NUMA node2 CPU(s):     
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,1,,0,0,0,0
+1,1,1,1,,1,1,1,1
+2,2,2,1,,2,2,2,2
+3,3,3,1,,3,3,3,3
+4,4,4,0,,4,4,4,4
+5,5,5,0,,5,5,5,5
+6,6,6,0,,6,6,6,6
+7,7,7,0,,7,7,7,7
diff --git a/tests/expected/lscpu/lscpu-ia64-hprx1620 b/tests/expected/lscpu/lscpu-ia64-hprx1620
new file mode 100644
index 0000000..92aa907
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ia64-hprx1620
@@ -0,0 +1,21 @@
+CPU(s):                2
+Thread(s) per core:    1
+Core(s) per socket:    1
+Socket(s):             2
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            Itanium 2
+Model:                 2
+CPU MHz:               1599.000967
+L1d cache:             16K
+L1i cache:             16K
+L2 cache:              256K
+L3 cache:              3072K
+NUMA node0 CPU(s):     0,1
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,0,,1,1,1,1
diff --git a/tests/expected/lscpu/lscpu-ia64-pg0 b/tests/expected/lscpu/lscpu-ia64-pg0
new file mode 100644
index 0000000..50942cc
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ia64-pg0
@@ -0,0 +1,37 @@
+CPU(s):                16
+Thread(s) per core:    1
+Core(s) per socket:    2
+Socket(s):             8
+NUMA node(s):          2
+Vendor ID:             GenuineIntel
+CPU family:            Itanium 2
+Model:                 0
+CPU MHz:               1418.000227
+L1d cache:             16K
+L1i cache:             16K
+L2d cache:             256K
+L2i cache:             1024K
+L3 cache:              6144K
+NUMA node0 CPU(s):     0-7
+NUMA node1 CPU(s):     8-15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i,L3
+0,0,0,0,,0,0,0,,
+1,1,0,0,,1,1,1,,
+2,2,1,0,,2,2,2,,
+3,3,1,0,,3,3,3,,
+4,4,2,0,,4,4,4,,
+5,5,2,0,,5,5,5,,
+6,6,3,0,,6,6,6,,
+7,7,3,0,,7,7,7,,
+8,8,4,1,,8,8,8,,
+9,9,4,1,,9,9,9,,
+10,10,5,1,,10,10,10,,
+11,11,5,1,,11,11,11,,
+12,12,6,1,,12,12,12,,
+13,13,6,1,,13,13,13,,
+14,14,7,1,,14,14,14,,
+15,15,7,1,,15,15,15,,
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7 b/tests/expected/lscpu/lscpu-ppc64-POWER7
new file mode 100644
index 0000000..0d6c5ba
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7
@@ -0,0 +1,31 @@
+CPU(s):                16
+On-line CPU(s) list:   0-15
+Thread(s) per core:    4
+Core(s) per socket:    1
+Socket(s):             4
+NUMA node(s):          1
+Model:                 IBM,8233-E8B
+L1d cache:             32K
+L1i cache:             32K
+NUMA node0 CPU(s):     0-15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
diff --git a/tests/expected/lscpu/lscpu-s390-kvm b/tests/expected/lscpu/lscpu-s390-kvm
new file mode 100644
index 0000000..1aa42f9
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-kvm
@@ -0,0 +1,21 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                3
+On-line CPU(s) list:   0-2
+Thread(s) per core:    1
+Core(s) per socket:    1
+Socket(s) per book:    1
+Book(s):               3
+Vendor ID:             IBM/S390
+BogoMIPS:              14367.00
+Hypervisor:            KVM/Linux
+Hypervisor vendor:     KVM
+Virtualization type:   full
+Dispatching mode:      horizontal
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,1,
+2,2,2,
diff --git a/tests/expected/lscpu/lscpu-s390-lpar b/tests/expected/lscpu/lscpu-s390-lpar
new file mode 100644
index 0000000..0799ab9
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-lpar
@@ -0,0 +1,36 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                20
+On-line CPU(s) list:   1-5,8-19
+Off-line CPU(s) list:  0,6,7
+Thread(s) per core:    1
+Core(s) per socket:    4
+Socket(s) per book:    6
+Book(s):               4
+Vendor ID:             IBM/S390
+BogoMIPS:              14367.00
+Hypervisor:            PR/SM
+Hypervisor vendor:     IBM
+Virtualization type:   full
+Dispatching mode:      vertical
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+1,0,0,
+2,1,0,
+3,2,1,
+4,3,1,
+5,4,1,
+8,5,2,
+9,6,2,
+10,7,2,
+11,8,3,
+12,9,3,
+13,10,3,
+14,11,3,
+15,12,4,
+16,13,5,
+17,14,5,
+18,15,5,
+19,16,6,
diff --git a/tests/expected/lscpu/lscpu-s390-zvm b/tests/expected/lscpu/lscpu-s390-zvm
new file mode 100644
index 0000000..04dcf76
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-s390-zvm
@@ -0,0 +1,22 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                4
+On-line CPU(s) list:   0-3
+Thread(s) per core:    1
+Core(s) per socket:    1
+Socket(s) per book:    1
+Book(s):               4
+Vendor ID:             IBM/S390
+BogoMIPS:              14367.00
+Hypervisor:            z/VM 6.1.0
+Hypervisor vendor:     IBM
+Virtualization type:   full
+Dispatching mode:      horizontal
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,
+1,1,1,
+2,2,2,
+3,3,3,
diff --git a/tests/expected/lscpu/lscpu-sparc64-UltraSparc-T1 b/tests/expected/lscpu/lscpu-sparc64-UltraSparc-T1
new file mode 100644
index 0000000..639a7de
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-sparc64-UltraSparc-T1
@@ -0,0 +1,38 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                32
+On-line CPU(s) list:   0-23
+Off-line CPU(s) list:  24-31
+Thread(s) per core:    4
+Core(s) per socket:    1
+Socket(s):             6
+NUMA node(s):          1
+NUMA node0 CPU(s):     0-35
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,0,0,0
+1,0,0,0
+2,0,0,0
+3,0,0,0
+4,1,1,0
+5,1,1,0
+6,1,1,0
+7,1,1,0
+8,2,2,0
+9,2,2,0
+10,2,2,0
+11,2,2,0
+12,3,3,0
+13,3,3,0
+14,3,3,0
+15,3,3,0
+16,4,4,0
+17,4,4,0
+18,4,4,0
+19,4,4,0
+20,5,5,0
+21,5,5,0
+22,5,5,0
+23,5,5,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-64cpu b/tests/expected/lscpu/lscpu-x86_64-64cpu
new file mode 100644
index 0000000..18630e3
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-64cpu
@@ -0,0 +1,88 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                64
+On-line CPU(s) list:   0-63
+Thread(s) per core:    2
+Core(s) per socket:    8
+Socket(s):             4
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 46
+Stepping:              6
+CPU MHz:               1064.000
+BogoMIPS:              3989.44
+Virtualization:        VT-x
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              256K
+L3 cache:              18432K
+NUMA node0 CPU(s):     0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,,,1,1,1,1
+2,2,2,0,,2,2,2,2
+3,3,3,,,3,3,3,3
+4,4,0,0,,4,4,4,0
+5,5,1,,,5,5,5,1
+6,6,2,0,,6,6,6,2
+7,7,3,,,7,7,7,3
+8,8,0,0,,8,8,8,0
+9,9,1,,,9,9,9,1
+10,10,2,0,,10,10,10,2
+11,11,3,,,11,11,11,3
+12,12,0,0,,12,12,12,0
+13,13,1,,,13,13,13,1
+14,14,2,0,,14,14,14,2
+15,15,3,,,15,15,15,3
+16,16,0,0,,16,16,16,0
+17,17,1,,,17,17,17,1
+18,18,2,0,,18,18,18,2
+19,19,3,,,19,19,19,3
+20,20,0,0,,20,20,20,0
+21,21,1,,,21,21,21,1
+22,22,2,0,,22,22,22,2
+23,23,3,,,23,23,23,3
+24,24,0,0,,24,24,24,0
+25,25,1,,,25,25,25,1
+26,26,2,0,,26,26,26,2
+27,27,3,,,27,27,27,3
+28,28,0,0,,28,28,28,0
+29,29,1,,,29,29,29,1
+30,30,2,0,,30,30,30,2
+31,31,3,,,31,31,31,3
+32,0,0,0,,0,0,0,0
+33,1,1,,,1,1,1,1
+34,2,2,0,,2,2,2,2
+35,3,3,,,3,3,3,3
+36,4,0,0,,4,4,4,0
+37,5,1,,,5,5,5,1
+38,6,2,0,,6,6,6,2
+39,7,3,,,7,7,7,3
+40,8,0,0,,8,8,8,0
+41,9,1,,,9,9,9,1
+42,10,2,0,,10,10,10,2
+43,11,3,,,11,11,11,3
+44,12,0,0,,12,12,12,0
+45,13,1,,,13,13,13,1
+46,14,2,0,,14,14,14,2
+47,15,3,,,15,15,15,3
+48,16,0,0,,16,16,16,0
+49,17,1,,,17,17,17,1
+50,18,2,0,,18,18,18,2
+51,19,3,,,19,19,19,3
+52,20,0,0,,20,20,20,0
+53,21,1,,,21,21,21,1
+54,22,2,0,,22,22,22,2
+55,23,3,,,23,23,23,3
+56,24,0,0,,24,24,24,0
+57,25,1,,,25,25,25,1
+58,26,2,0,,26,26,26,2
+59,27,3,,,27,27,27,3
+60,28,0,0,,28,28,28,0
+61,29,1,,,29,29,29,1
+62,30,2,0,,30,30,30,2
+63,31,3,,,31,31,31,3
diff --git a/tests/expected/lscpu/lscpu-x86_64-dell_e4310 b/tests/expected/lscpu/lscpu-x86_64-dell_e4310
new file mode 100644
index 0000000..ae9e0b4
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-dell_e4310
@@ -0,0 +1,28 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                4
+On-line CPU(s) list:   0-3
+Thread(s) per core:    2
+Core(s) per socket:    2
+Socket(s):             1
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 37
+Stepping:              5
+CPU MHz:               1199.000
+BogoMIPS:              5319.97
+Virtualization:        VT-x
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              256K
+L3 cache:              3072K
+NUMA node0 CPU(s):     0-3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,0,0,,1,1,1,0
+2,0,0,0,,0,0,0,0
+3,1,0,0,,1,1,1,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-dell_poweredge1950 b/tests/expected/lscpu/lscpu-x86_64-dell_poweredge1950
new file mode 100644
index 0000000..64c5a9c
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-dell_poweredge1950
@@ -0,0 +1,23 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                8
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 15
+Stepping:              7
+CPU MHz:               2327.526
+BogoMIPS:              4655.08
+NUMA node0 CPU(s):     0-7
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node
+0,,,0
+1,,,0
+2,,,0
+3,,,0
+4,,,0
+5,,,0
+6,,,0
+7,,,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-dell_poweredgeR610 b/tests/expected/lscpu/lscpu-x86_64-dell_poweredgeR610
new file mode 100644
index 0000000..bdd839f
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-dell_poweredgeR610
@@ -0,0 +1,40 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                16
+Thread(s) per core:    2
+Core(s) per socket:    4
+Socket(s):             2
+NUMA node(s):          2
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 26
+Stepping:              5
+CPU MHz:               2261.056
+BogoMIPS:              4522.04
+Virtualization:        VT-x
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              256K
+L3 cache:              8192K
+NUMA node0 CPU(s):     0,2,4,6,8,10,12,14
+NUMA node1 CPU(s):     1,3,5,7,9,11,13,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,1,,1,1,1,1
+2,2,0,0,,2,2,2,0
+3,3,1,1,,3,3,3,1
+4,4,0,0,,4,4,4,0
+5,5,1,1,,5,5,5,1
+6,6,0,0,,6,6,6,0
+7,7,1,1,,7,7,7,1
+8,0,0,0,,0,0,0,0
+9,1,1,1,,1,1,1,1
+10,2,0,0,,2,2,2,0
+11,3,1,1,,3,3,3,1
+12,4,0,0,,4,4,4,0
+13,5,1,1,,5,5,5,1
+14,6,0,0,,6,6,6,0
+15,7,1,1,,7,7,7,1
diff --git a/tests/expected/lscpu/lscpu-x86_64-dellr710 b/tests/expected/lscpu/lscpu-x86_64-dellr710
new file mode 100644
index 0000000..3b52c6d
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-dellr710
@@ -0,0 +1,40 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                16
+Thread(s) per core:    2
+Core(s) per socket:    4
+Socket(s):             2
+NUMA node(s):          2
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 26
+Stepping:              5
+CPU MHz:               2527.073
+BogoMIPS:              5053.32
+Virtualization:        VT-x
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              256K
+L3 cache:              8192K
+NUMA node0 CPU(s):     0,2,4,6,8,10,12,14
+NUMA node1 CPU(s):     1,3,5,7,9,11,13,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,1,,1,1,1,1
+2,2,0,0,,2,2,2,0
+3,3,1,1,,3,3,3,1
+4,4,0,0,,4,4,4,0
+5,5,1,1,,5,5,5,1
+6,6,0,0,,6,6,6,0
+7,7,1,1,,7,7,7,1
+8,0,0,0,,0,0,0,0
+9,1,1,1,,1,1,1,1
+10,2,0,0,,2,2,2,0
+11,3,1,1,,3,3,3,1
+12,4,0,0,,4,4,4,0
+13,5,1,1,,5,5,5,1
+14,6,0,0,,6,6,6,0
+15,7,1,1,,7,7,7,1
diff --git a/tests/expected/lscpu/lscpu-x86_64-el5xen b/tests/expected/lscpu/lscpu-x86_64-el5xen
new file mode 100644
index 0000000..454ca35
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-el5xen
@@ -0,0 +1,30 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                8
+Thread(s) per core:    1
+Core(s) per socket:    1
+Socket(s):             8
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 26
+Stepping:              5
+CPU MHz:               2393.998
+BogoMIPS:              5986.29
+Hypervisor vendor:     Xen
+Virtualization type:   para
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              256K
+L3 cache:              8192K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,,,0,0,0,0
+1,1,1,,,0,0,0,0
+2,2,2,,,1,1,1,0
+3,3,3,,,1,1,1,0
+4,4,4,,,2,2,2,0
+5,5,5,,,2,2,2,0
+6,6,6,,,3,3,3,0
+7,7,7,,,3,3,3,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-hpdl585 b/tests/expected/lscpu/lscpu-x86_64-hpdl585
new file mode 100644
index 0000000..347ee62
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-hpdl585
@@ -0,0 +1,42 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                16
+Thread(s) per core:    1
+Core(s) per socket:    4
+Socket(s):             4
+NUMA node(s):          4
+Vendor ID:             AuthenticAMD
+CPU family:            16
+Model:                 2
+Stepping:              3
+CPU MHz:               2210.188
+BogoMIPS:              4420.50
+Virtualization:        AMD-V
+L1d cache:             512K
+L1i cache:             512K
+L2 cache:              512K
+L3 cache:              2048K
+NUMA node0 CPU(s):     0,4,8,12
+NUMA node1 CPU(s):     1,5,9,13
+NUMA node2 CPU(s):     2,6,10,14
+NUMA node3 CPU(s):     3,7,11,15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,1,,1,1,1,1
+2,2,2,2,,2,2,2,2
+3,3,3,3,,3,3,3,3
+4,4,0,0,,4,4,4,4
+5,5,1,1,,5,5,5,5
+6,6,2,2,,6,6,6,6
+7,7,3,3,,7,7,7,7
+8,8,0,0,,8,8,8,8
+9,9,1,1,,9,9,9,9
+10,10,2,2,,10,10,10,10
+11,11,3,3,,11,11,11,11
+12,12,0,0,,12,12,12,12
+13,13,1,1,,13,13,13,13
+14,14,2,2,,14,14,14,14
+15,15,3,3,,15,15,15,15
diff --git a/tests/expected/lscpu/lscpu-x86_64-ibme326m b/tests/expected/lscpu/lscpu-x86_64-ibme326m
new file mode 100644
index 0000000..8e5e375
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-ibme326m
@@ -0,0 +1,23 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                2
+Thread(s) per core:    1
+Core(s) per socket:    2
+Socket(s):             1
+NUMA node(s):          1
+Vendor ID:             AuthenticAMD
+CPU family:            15
+Model:                 33
+Stepping:              2
+CPU MHz:               1995.058
+BogoMIPS:              3989.41
+L1d cache:             1024K
+L1i cache:             1024K
+L2 cache:              1024K
+NUMA node0 CPU(s):     0,1
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+0,0,0,0,,0,0,0
+1,1,0,0,,1,1,1
diff --git a/tests/expected/lscpu/lscpu-x86_64-necem14 b/tests/expected/lscpu/lscpu-x86_64-necem14
new file mode 100644
index 0000000..91d626e
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-necem14
@@ -0,0 +1,22 @@
+CPU op-mode(s):        32-bit, 64-bit
+CPU(s):                2
+Thread(s) per core:    2
+Core(s) per socket:    1
+Socket(s):             1
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            15
+Model:                 4
+Stepping:              3
+CPU MHz:               3790.599
+BogoMIPS:              7579.94
+L1d cache:             16K
+L2 cache:              2048K
+NUMA node0 CPU(s):     0,1
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L2
+0,0,0,0,,0,0
+1,0,0,0,,0,0
diff --git a/tests/expected/lscpu/lscpu-x86_64-xenfull b/tests/expected/lscpu/lscpu-x86_64-xenfull
new file mode 100644
index 0000000..1a5c46a
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-xenfull
@@ -0,0 +1,22 @@
+CPU(s):                2
+Thread(s) per core:    1
+Core(s) per socket:    1
+CPU socket(s):         2
+NUMA node(s):          1
+Vendor ID:             GenuineIntel
+CPU family:            6
+Model:                 23
+Stepping:              6
+CPU MHz:               2493.900
+Hypervisor vendor:     Xen
+Virtualization type:   full
+L1d cache:             32K
+L1i cache:             32K
+L2 cache:              6144K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+0,0,0,0,,0,0,0
+1,1,1,0,,1,1,1