* Update to SVN 20130614 (r200084) from the gcc-4_7-branch.

  * Update the Linaro support to the 4.7-2013.06 release.


git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7@6843 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca

1 files changed, 314 insertions, 971 deletions

diff --git a/debian/patches/svn-updates-linaro.diff b/debian/patches/svn-updates-linaro.diff
index 05b6530..47d1fd9 100644
--- a/debian/patches/svn-updates-linaro.diff
+++ b/debian/patches/svn-updates-linaro.diff
@@ -1,1039 +1,382 @@
-# DP: updates from the 4.7 branch upto 20130530 (r199435).
+# DP: updates from the 4.7 branch upto 20130614 (r200084).
 
 last_updated()
 {
 	cat > ${dir}LAST_UPDATED <<EOF
-Thu May 30 08:55:17 CEST 2013
-Thu May 30 06:55:17 UTC 2013 (revision 199435)
+Fri Jun 14 09:56:44 CEST 2013
+Fri Jun 14 07:56:44 UTC 2013 (revision 200084)
 EOF
 }
 
-LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@198701 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \
+LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@199594 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \
 	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
 	| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'
 
-Index: libstdc++-v3/src/c++11/system_error.cc
+Index: libgcc/config.host
 ===================================================================
---- a/src/libstdc++-v3/src/c++11/system_error.cc	(revision
-+++ b/src/libstdc++-v3/src/c++11/system_error.cc	(revision
-@@ -62,8 +62,8 @@
-     }
-   };
- 
--  const generic_error_category generic_category_instance;
--  const system_error_category system_category_instance;
-+  const generic_error_category generic_category_instance{};
-+  const system_error_category system_category_instance{};
- }
- 
- namespace std _GLIBCXX_VISIBILITY(default)
-Index: libstdc++-v3/src/c++11/future.cc
-===================================================================
---- a/src/libstdc++-v3/src/c++11/future.cc	(revision
-+++ b/src/libstdc++-v3/src/c++11/future.cc	(revision
-@@ -60,7 +60,7 @@
-   const future_error_category&
-   __future_category_instance() noexcept
-   {
--    static const future_error_category __fec;
-+    static const future_error_category __fec{};
-     return __fec;
-   }
- }
-Index: libstdc++-v3/include/bits/basic_string.h
-===================================================================
---- a/src/libstdc++-v3/include/bits/basic_string.h	(revision
-+++ b/src/libstdc++-v3/include/bits/basic_string.h	(revision
-@@ -2764,10 +2764,9 @@
-    *
-    *  Stores characters from @a __is into @a __str until @a __delim is
-    *  found, the end of the stream is encountered, or str.max_size()
--   *  is reached.  If is.width() is non-zero, that is the limit on the
--   *  number of characters stored into @a __str.  Any previous
--   *  contents of @a __str are erased.  If @a __delim was encountered,
--   *  it is extracted but not stored into @a __str.
-+   *  is reached.  Any previous contents of @a __str are erased.  If
-+   *  @a __delim is encountered, it is extracted but not stored into
-+   *  @a __str.
-    */
-   template<typename _CharT, typename _Traits, typename _Alloc>
-     basic_istream<_CharT, _Traits>&
-@@ -2782,10 +2781,9 @@
-    *
-    *  Stores characters from is into @a __str until &apos;\n&apos; is
-    *  found, the end of the stream is encountered, or str.max_size()
--   *  is reached.  If __is.width() is non-zero, that is the limit on
--   *  the number of characters stored into @a __str.  Any previous
--   *  contents of @a __str are erased.  If end of line was
--   *  encountered, it is extracted but not stored into @a __str.
-+   *  is reached.  Any previous contents of @a __str are erased.  If
-+   *  end of line is encountered, it is extracted but not stored into
-+   *  @a __str.
-    */
-   template<typename _CharT, typename _Traits, typename _Alloc>
-     inline basic_istream<_CharT, _Traits>&
-Index: libstdc++-v3/ChangeLog
-===================================================================
---- a/src/libstdc++-v3/ChangeLog	(revision
-+++ b/src/libstdc++-v3/ChangeLog	(revision
-@@ -1,3 +1,14 @@
-+2013-05-15  Jonathan Wakely  <jwakely.gcc@gmail.com>
-+
-+	* include/bits/basic_string.h (getline): Fix doxygen comments.
-+
-+2013-05-14  Evgeniy Stepanov  <eugenis@google.com>
-+
-+	* src/c++11/system_error.cc (generic_category_instance): Add
-+	initializer.
-+	(system_category_instance): Likewise.
-+	* src/c++11/future.cc (__fec): Likewise.
-+
- 2013-04-15  Jack Howarth  <howarth@bromo.med.uc.edu>
- 
- 	Backport from mainline
-Index: libgcc/Makefile.in
-===================================================================
---- a/src/libgcc/Makefile.in	(revision
-+++ b/src/libgcc/Makefile.in	(revision
-@@ -121,7 +121,8 @@
- .PHONY: all clean
- 
- clean:
--	-rm -f config.h libgcc_tm.h stamp-h stmp-ldirs libgcc.map
-+	-rm -f config.h libgcc_tm.h libgcc.map
-+	-rm -f libgcc_tm.stamp stamp-h stmp-ldirs
- 	-rm -f *$(objext)
- 	-rm -f *.dep
- 	-rm -f *.a
+--- a/src/libgcc/config.host	(revision
++++ b/src/libgcc/config.host	(revision
+@@ -315,7 +315,7 @@
+ 	md_unwind_header=alpha/vms-unwind.h
+ 	;;
+ arm-wrs-vxworks)
+-	tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit"
++	tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+ 	extra_parts="$extra_parts crti.o crtn.o"
+ 	;;
+ arm*-*-freebsd*)
 Index: libgcc/ChangeLog
 ===================================================================
 --- a/src/libgcc/ChangeLog	(revision
 +++ b/src/libgcc/ChangeLog	(revision
-@@ -1,3 +1,11 @@
-+2013-05-20  Chung-Ju Wu  <jasonwucj@gmail.com>
+@@ -1,3 +1,16 @@
++2013-06-08  Walter Lee  <walt@tilera.com>
 +
 +	Backport from mainline:
-+	2012-05-24  Olivier Hainque  <hainque@adacore.com>
++	2013-06-08  Walter Lee  <walt@tilera.com>
++	
++	* config/tilepro/atomic.h: Don't include stdint.h or features.h.
++	Replace int64_t with long long.  Add __extension__ where
++	appropriate.
 +
-+	* Makefile.in (clean): Remove libgcc_tm.stamp as well.
-+	Use a separate command for stamp removals.
++2013-06-06  Douglas B Rupp  <rupp@adacore.com>
 +
- 2013-04-11  Julian Brown  <julian@codesourcery.com>
++	* config.host (arm-wrs-vxworks): Configure with other soft float.
++
+ 2013-05-20  Chung-Ju Wu  <jasonwucj@gmail.com>
  
- 	* config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS)
+ 	Backport from mainline:
+Index: libgcc/config/tilepro/atomic.h
+===================================================================
+--- a/src/libgcc/config/tilepro/atomic.h	(revision
++++ b/src/libgcc/config/tilepro/atomic.h	(revision
+@@ -1,6 +1,5 @@
+ /* Macros for atomic functionality for tile.
+-   Copyright (C) 2011, 2012
+-   Free Software Foundation, Inc.
++   Copyright (C) 2011-2013 Free Software Foundation, Inc.
+    Contributed by Walter Lee (walt@tilera.com)
+ 
+    This file is free software; you can redistribute it and/or modify it
+@@ -93,8 +92,6 @@
+    compare-and-exchange routine, so may be potentially less efficient.  */
+ #endif
+ 
+-#include <stdint.h>
+-#include <features.h>
+ #ifdef __tilegx__
+ #include <arch/spr_def.h>
+ #else
+@@ -123,9 +120,9 @@
+ 
+ /* 64-bit integer compare-and-exchange.  */
+ static __inline __attribute__ ((always_inline))
+-     int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem,
+-						     int64_t oldval,
+-						     int64_t newval)
++     long long arch_atomic_val_compare_and_exchange_8 (volatile long long
++						       *mem, long long oldval,
++						       long long newval)
+ {
+ #ifdef __tilegx__
+   __insn_mtspr (SPR_CMPEXCH_VALUE, oldval);
+@@ -140,7 +137,7 @@
+ 			"R04" (newval_lo), "R05" (newval_hi),
+ 			"m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25",
+ 			"r26", "r27", "r28", "r29", "memory");
+-  return ((uint64_t) result_hi) << 32 | result_lo;
++  return ((long long) result_hi) << 32 | result_lo;
+ #endif
+ }
+ 
+@@ -151,11 +148,11 @@
+ 
+ 
+ #define arch_atomic_val_compare_and_exchange(mem, o, n)                 \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
+       ((sizeof(*(mem)) == 8) ?                                          \
+        arch_atomic_val_compare_and_exchange_8(                          \
+-         (volatile int64_t*)(mem), (__typeof((o)-(o)))(o),              \
++         (volatile long long*)(mem), (__typeof((o)-(o)))(o),            \
+          (__typeof((n)-(n)))(n)) :                                      \
+        (sizeof(*(mem)) == 4) ?                                          \
+        arch_atomic_val_compare_and_exchange_4(                          \
+@@ -165,7 +162,7 @@
+   })
+ 
+ #define arch_atomic_bool_compare_and_exchange(mem, o, n)                \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     __typeof(o) __o = (o);                                              \
+     __builtin_expect(                                                   \
+       __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \
+@@ -175,7 +172,7 @@
+ /* Loop with compare_and_exchange until we guess the correct value.
+    Normally "expr" will be an expression using __old and __value.  */
+ #define __arch_atomic_update_cmpxchg(mem, value, expr)                  \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     __typeof(value) __value = (value);                                  \
+     __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess;           \
+     do {                                                                \
+@@ -190,12 +187,14 @@
+ /* Generic atomic op with 8- or 4-byte variant.
+    The _mask, _addend, and _expr arguments are ignored on tilegx.  */
+ #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr)     \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     ((__typeof(*(mem)))                                                 \
+      ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op(     \
+-        (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) :   \
++        (volatile void *)(mem),                                         \
++        (long long)(__typeof((value)-(value)))(value)) :                \
+       (sizeof(*(mem)) == 4) ? (int)__insn_##op##4(                      \
+-        (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) :   \
++        (volatile void *)(mem),                                         \
++        (int)(__typeof((value)-(value)))(value)) :                      \
+       __arch_atomic_error_bad_argument_size()));                        \
+   })
+ 
+@@ -225,7 +224,7 @@
+ /* Generic atomic op with 8- or 4-byte variant.
+    The _op argument is ignored on tilepro.  */
+ #define __arch_atomic_update(mem, value, _op, mask, addend, expr)       \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
+       ((sizeof(*(mem)) == 8) ?                                          \
+        __arch_atomic_update_cmpxchg((mem), (value), (expr)) :           \
+@@ -264,13 +263,13 @@
+   __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value))
+ 
+ #define arch_atomic_bit_set(mem, bit)                                   \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
+     __mask & arch_atomic_or((mem), __mask);                             \
+   })
+ 
+ #define arch_atomic_bit_clear(mem, bit)                                 \
+-  ({                                                                    \
++  __extension__ ({                                                      \
+     __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
+     __mask & arch_atomic_and((mem), ~__mask);                           \
+   })
 Index: gcc/DATESTAMP
 ===================================================================
 --- a/src/gcc/DATESTAMP	(revision
 +++ b/src/gcc/DATESTAMP	(revision
 @@ -1 +1 @@
--20130508
-+20130530
+-20130603
++20130614
 Index: gcc/ChangeLog
 ===================================================================
 --- a/src/gcc/ChangeLog	(revision
 +++ b/src/gcc/ChangeLog	(revision
-@@ -1,3 +1,97 @@
-+2013-05-22  Uros Bizjak  <ubizjak@gmail.com>
-+
-+	PR target/57356
-+	* config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups
-+	for non-sse2 targets.  Simplify mode attribute calculation.
-+
-+2013-05-17  Uros Bizjak  <ubizjak@gmail.com>
+@@ -1,3 +1,31 @@
++2013-06-07  Uros Bizjak  <ubizjak@gmail.com>
 +
 +	Backport from mainline
-+	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
-+
-+	* config/i386/driver-i386.c (host_detect_local_cpu): Determine
-+	cache parameters using detect_caches_amd also for CYRIX,
-+	NSC and TM2 signatures.
-+
-+	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
-+		    Dzianis Kahanovich  <mahatma@eu.by>
++	2013-06-10  Uros Bizjak  <ubizjak@gmail.com>
 +
-+	PR target/45359
-+	PR target/46396
-+	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
-+	VIA/Centaur processors and determine their cache parameters
-+	using detect_caches_amd.
++	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use
++	cmp_code to construct REG_EQUAL note.
 +
-+	2013-05-15  Uros Bizjak  <ubizjak@gmail.com>
-+
-+	* config/i386/i386.c (ix86_option_override_internal): Add
-+	PTA_POPCNT to corei7 entry.
-+
-+2013-05-14  Richard Biener  <rguenther@suse.de>
-+
-+	PR gcov-profile/57269
 +	Backport from mainline
-+	2012-06-30  Nathan Sidwell  <nathan@acm.org>
-+
-+	* coverage.c (coverage_init): Read counts file before writing
-+	graph header.
++	2013-06-05  Uros Bizjak  <ubizjak@gmail.com>
 +
-+2013-05-13  Uros Bizjak  <ubizjak@gmail.com>
++	* config/alpha/alpha.c (alpha_emit_conditional_move): Swap all
++	GE, GT, GEU and GTU compares, modulo DImode compares with zero.
 +
-+	PR target/57264
 +	Backport from mainline
-+	2013-01-22  Jakub Jelinek  <jakub@redhat.com>
++	2013-05-23  Uros Bizjak  <ubizjak@gmail.com>
 +
-+	PR target/55686
-+	* config/i386/i386.md (UNSPEC_STOS): New.
-+	(strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1,
-+	*strsetqi_1): Add UNSPEC_STOS.
++	PR target/57379
++	* config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE.
++	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct
++	REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec.
 +
-+2013-05-10  Joey Ye  <joey.ye@arm.com>
++2013-06-09  Jakub Jelinek  <jakub@redhat.com>
 +
-+	Backport from mainline
-+	2012-11-29  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
-+
-+	PR target/54974
-+	* config/arm/arm.md (thumb2_pool_range, pool_range): Add comment on
-+	Thumb pool ranges.
-+	(thumb1_extendhisi2): Reduce Thumb pool range.
-+	(arm_movdi): Likewise.
-+	(thumb1_movdi_insn): Likewise.
-+	(thumb1_movsi_insn): Likewise.
-+	(pic_load_addr_unified): Likewise.
-+	(pic_load_addr_32bit): Likewise.
-+	(pic_load_addr_thumb1): Likewise.
-+	(thumb1_movhf): Likewise.
-+	(arm_movsf_soft_insn): Likewise.
-+	(thumb1_movsf_soft_insn): Likewise.
-+	(movdf_soft_insn): Likewise.
-+	(thumb1_movdf_soft_insn): Likewise.
-+	* config/arm/neon.md (*neon_mov<mode>): Likewise.
-+	(*neon_mov<mode>): Likwise.
-+	* config/arm/thumb2.md: (*thumb2_movsi_insn): Likewise.
-+	(*thumb2_movhi_insn): Likewise.
-+	(*thumb2_extendqisi_v6): Likewise.
-+	(*thumb2_zero_extendqisi_v6): Likewise.
-+	(*thumb2_zero_extendqisi2_v6): Likewise.
-+	* config/arm/vfp.md: (*thumb2_movsi_vfp): Likewise.
-+	(*movdi_vfp): Likewise.
-+	(*movdi_vfp_cortexa8): Likewise.
-+	(*thumb2_movsf_vfp): Likewise.
-+	(*thumb2_movdf_vfp): Likewise.
-+
-+2013-05-10  Sebastian Huber  <sebastian.huber@embedded-brains.de>
-+
-+	* config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib.
-+	Add mthumb/march=armv7-a multilib.
-+	Add mthumb/march=armv7-r multilib.
-+	Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib.
++	PR target/57568
++	* config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure
++	that operands[2] doesn't overlap with operands[0].
 +
-+2013-05-10  Ralf Corsépius  <ralf.corsepius@rtems.org>
-+
-+	PR target/57237
-+	* config/v850/t-rtems: Add more multilibs.
-+
- 2013-05-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
- 
- 	Backport from trunk
-@@ -20,7 +114,7 @@
- 	2013-04-25  Marek Polacek  <polacek@redhat.com>
- 
- 	PR tree-optimization/57066
--        * builtins.c (fold_builtin_logb): Return +Inf for -Inf.
-+	* builtins.c (fold_builtin_logb): Return +Inf for -Inf.
+ 2013-05-22  Uros Bizjak  <ubizjak@gmail.com>
  
- 2013-04-30  Uros Bizjak  <ubizjak@gmail.com>
- 
-Index: gcc/testsuite/gcc.target/i386/pr57264.c
+ 	PR target/57356
+Index: gcc/testsuite/gfortran.dg/do_5.f90
 ===================================================================
---- a/src/gcc/testsuite/gcc.target/i386/pr57264.c	(revision
-+++ b/src/gcc/testsuite/gcc.target/i386/pr57264.c	(revision
-@@ -0,0 +1,18 @@
-+/* { dg-do compile } */
-+/* { dg-options "-O1 -mcld" } */
-+
-+void test (int x, int **pp)
-+{
-+  while (x)
-+    {
-+      int *ip = *pp;
-+      int *op = *pp;
-+      while (*ip)
-+	{
-+	  int v = *ip++;
-+	  *op++ = v + 1;
-+	}
-+    }
-+}
-+
-+/* { dg-final { scan-assembler-not "stosl" } } */
-Index: gcc/testsuite/gnat.dg/specs/last_bit.ads
+--- a/src/gcc/testsuite/gfortran.dg/do_5.f90	(revision
++++ b/src/gcc/testsuite/gfortran.dg/do_5.f90	(revision
+@@ -0,0 +1,29 @@
++! { dg-do compile }
++!
++! PR fortran/54370
++!
++! The following program was ICEing at tree-check time
++! "L()" was regarded as default-kind logical.
++!
++! Contributed by Kirill Chilikin
++!
++      MODULE M
++      CONTAINS
++
++      LOGICAL(C_BOOL) FUNCTION L() BIND(C)
++      USE, INTRINSIC :: ISO_C_BINDING
++      L = .FALSE.
++      END FUNCTION
++
++      LOGICAL(8) FUNCTION L2() BIND(C) ! { dg-warning "may not be a C interoperable kind but it is bind" }
++      L2 = .FALSE._8
++      END FUNCTION
++
++      SUBROUTINE S()
++      DO WHILE (L())
++      ENDDO
++      DO WHILE (L2())
++      ENDDO
++      END
++
++      END
+Index: gcc/testsuite/gcc.c-torture/execute/pr57568.c
 ===================================================================
---- a/src/gcc/testsuite/gnat.dg/specs/last_bit.ads	(revision
-+++ b/src/gcc/testsuite/gnat.dg/specs/last_bit.ads	(revision
-@@ -0,0 +1,19 @@
-+-- { dg-do compile }
-+
-+package Last_Bit is
-+
-+   Max_Components : constant := 100;
-+   type Count_Type is new Natural range 0 .. Max_Components;
-+   subtype Index_Type is Count_Type range 1 .. Count_Type'Last;
-+   
-+   type List_Type is array (Index_Type range <>) of Integer;
-+
-+   type Record_Type (Count : Count_Type := 0) is record
-+      List : List_Type (1 .. Count);
-+   end record;
-+
-+   Null_Record : Record_Type (Count => 0);
+--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c	(revision
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c	(revision
+@@ -0,0 +1,12 @@
++/* PR target/57568 */
 +
-+   List_Last_Bit : Integer := Null_Record.List'Last_Bit;
++extern void abort (void);
++int a[6][9] = { }, b = 1, *c = &a[3][5];
 +
-+end Last_Bit;
++int
++main ()
++{
++  if (b && (*c = *c + *c))
++    abort ();
++  return 0;
++}
 Index: gcc/testsuite/ChangeLog
 ===================================================================
 --- a/src/gcc/testsuite/ChangeLog	(revision
 +++ b/src/gcc/testsuite/ChangeLog	(revision
-@@ -1,3 +1,12 @@
-+2013-05-26  Eric Botcazou  <ebotcazou@adacore.com>
+@@ -1,3 +1,16 @@
++2013-06-09  Jakub Jelinek  <jakub@redhat.com>
 +
-+	* gnat.dg/specs/last_bit.ads: New test.
++	PR target/57568
++	* gcc.c-torture/execute/pr57568.c: New test.
 +
-+2013-05-13  Uros Bizjak  <ubizjak@gmail.com>
++2013-06-06  Tobias Burnus  <burnus@net-b.de>
 +
-+	PR target/57264
-+	* gcc.target/i386/pr57264.c: New test.
-+
- 2013-05-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
- 
- 	Backport from trunk
-Index: gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C
-===================================================================
---- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C	(revision
-+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C	(revision
-@@ -0,0 +1,54 @@
-+// PR c++/57047
-+// { dg-require-effective-target c++11 }
-+
-+template <typename>
-+struct A;
-+template <typename T>
-+struct A <T &>
-+{
-+  typedef T type;
-+};
-+template <typename T>
-+constexpr T && foo (typename A <T>::type & __t) noexcept
-+{
-+  return static_cast <T &&>(__t);
-+}
-+template <class T1, class T2>
-+struct B
-+{
-+  T1 t1;
-+  T2 t2;
-+  template <class U>
-+  constexpr B (U && __x, const T2 & __y) : t1 (foo <U> (__x)), t2 (__y) {}
-+};
-+static inline constexpr bool
-+fn1 (const char c)
-+{
-+  return ('0' <= c) && (c <= '9');
-+}
-+static inline constexpr bool
-+fn2 (const char c)
-+{
-+  return (('A' <= c) && (c <= 'Z')) || (('a' <= c) && (c <= 'z'));
-+}
-+static constexpr bool
-+fn3 (const char *const x)
-+{
-+  return (x[1] == '\0' && x[0] == ']') ? true : (!fn1 (x[0])) ? false : fn3 (&x[1]);
-+}
-+static constexpr bool
-+fn4 (const char *const x)
-+{
-+  return (x[0] == '\0') ? fn3 (&x[1]) : fn4 (&x[1]);
-+}
-+static inline constexpr bool
-+fn5 (const char *const x)
-+{
-+  return fn2 (x[0]) ? fn4 (x) : false;
-+}
-+struct C final
-+{
-+  constexpr C (const char *const t1) : c (fn5 (t1) ? 199 : 69) {}
-+  unsigned c;
-+};
-+B <C, C> p ("a", "b");
-Index: gcc/testsuite/g++.dg/template/array26.C
-===================================================================
---- a/src/gcc/testsuite/g++.dg/template/array26.C	(revision
-+++ b/src/gcc/testsuite/g++.dg/template/array26.C	(revision
-@@ -0,0 +1,40 @@
-+// PR c++/57325
-+
-+class valarray { int _M_data; };
-+template < typename > struct SimpleJet { valarray partials; };
-+
-+template < class C > struct scoped_ptr_impl
-+{
-+    scoped_ptr_impl (C *):data_ () { }
-+    struct Data
-+    {
-+        C ptr;
-+    };
-+    Data data_;
-+};
-+
-+template < class, class = int >struct scoped_ptr;
-+template < class C, class D > struct scoped_ptr <C[], D >
-+{
-+    scoped_ptr ():impl_ (0) { }
-+    scoped_ptr_impl < C > impl_;
-+};
-+
-+template < typename JetsT > void
-+TestJets (JetsT *)
-+{
-+    typedef typename JetsT::JetType JetT;
-+    scoped_ptr < JetT[] > a;
-+}
-+
-+template < typename T > struct SimpleJets
-+{
-+    typedef SimpleJet < T > JetType;
-+    scoped_ptr < SimpleJet < T >[] > vars_;
-+};
-+
-+void fn ()
-+{
-+    SimpleJets < double >b;
-+    TestJets (&b);
-+}
-Index: gcc/cp/tree.c
-===================================================================
---- a/src/gcc/cp/tree.c	(revision
-+++ b/src/gcc/cp/tree.c	(revision
-@@ -816,10 +816,12 @@
- 
-       if (TYPE_MAIN_VARIANT (t) != m)
- 	{
--	  if (COMPLETE_TYPE_P (t) && !COMPLETE_TYPE_P (m))
-+	  if (COMPLETE_TYPE_P (TREE_TYPE (t)) && !COMPLETE_TYPE_P (m))
- 	    {
- 	      /* m was built before the element type was complete, so we
--		 also need to copy the layout info from t.  */
-+		 also need to copy the layout info from t.  We might
-+	         end up doing this multiple times if t is an array of
-+	         unknown bound.  */
- 	      tree size = TYPE_SIZE (t);
- 	      tree size_unit = TYPE_SIZE_UNIT (t);
- 	      unsigned int align = TYPE_ALIGN (t);
-Index: gcc/cp/ChangeLog
-===================================================================
---- a/src/gcc/cp/ChangeLog	(revision
-+++ b/src/gcc/cp/ChangeLog	(revision
-@@ -1,3 +1,14 @@
-+2013-05-20  Jason Merrill  <jason@redhat.com>
-+
-+	PR c++/57325
-+	* tree.c (build_cplus_array_type): Copy layout info if element
-+	type is complete.
-+
-+2013-05-09  Jason Merrill  <jason@redhat.com>
-+
-+	PR c++/57047
-+	* semantics.c (cxx_fold_indirect_ref): Fix thinko.
-+
- 2013-04-21  Eric Botcazou  <ebotcazou@adacore.com>
- 
- 	* parser.c (cp_parser_late_return_type_opt): Fix C++ism.
-Index: gcc/cp/semantics.c
-===================================================================
---- a/src/gcc/cp/semantics.c	(revision
-+++ b/src/gcc/cp/semantics.c	(revision
-@@ -7412,15 +7412,17 @@
- 	    }
- 	}
-     }
--  /* *(foo *)fooarrptreturn> (*fooarrptr)[0] */
-+  /* *(foo *)fooarrptr => (*fooarrptr)[0] */
-   else if (TREE_CODE (TREE_TYPE (subtype)) == ARRAY_TYPE
- 	   && (same_type_ignoring_top_level_qualifiers_p
- 	       (type, TREE_TYPE (TREE_TYPE (subtype)))))
-     {
-       tree type_domain;
-       tree min_val = size_zero_node;
--      sub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL);
--      if (!sub)
-+      tree newsub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL);
-+      if (newsub)
-+	sub = newsub;
-+      else
- 	sub = build1_loc (loc, INDIRECT_REF, TREE_TYPE (subtype), sub);
-       type_domain = TYPE_DOMAIN (TREE_TYPE (sub));
-       if (type_domain && TYPE_MIN_VALUE (type_domain))
-Index: gcc/ada/ChangeLog
-===================================================================
---- a/src/gcc/ada/ChangeLog	(revision
-+++ b/src/gcc/ada/ChangeLog	(revision
-@@ -1,3 +1,8 @@
-+2013-05-26  Eric Botcazou  <ebotcazou@adacore.com>
++	Backport from mainline
++	2012-08-27  Tobias Burnus  <burnus@net-b.de>
 +
-+	* gcc-interface/trans.c (Attribute_to_gnu) <Attr_Last_Bit>: Add kludge
-+	to avoid generating an overflow for -1.
++	PR fortran/54370
++	* gfortran.dg/do_5.f90: New.
 +
- 2013-04-11  Release Manager
- 
- 	* GCC 4.7.3 released.
-Index: gcc/ada/gcc-interface/trans.c
-===================================================================
---- a/src/gcc/ada/gcc-interface/trans.c	(revision
-+++ b/src/gcc/ada/gcc-interface/trans.c	(revision
-@@ -1901,14 +1901,19 @@
- 	    gnu_result = bitsize_int (bitpos % BITS_PER_UNIT);
- 	    gnu_result = size_binop (PLUS_EXPR, gnu_result,
- 				     TYPE_SIZE (TREE_TYPE (gnu_prefix)));
--	    gnu_result = size_binop (MINUS_EXPR, gnu_result,
--				     bitsize_one_node);
-+	    /* ??? Avoid a large unsigned result that will overflow when
-+	       converted to the signed universal_integer.  */
-+	    if (integer_zerop (gnu_result))
-+	      gnu_result = integer_minus_one_node;
-+	    else
-+	      gnu_result
-+		= size_binop (MINUS_EXPR, gnu_result, bitsize_one_node);
- 	    break;
+ 2013-06-01  Janus Weil  <janus@gcc.gnu.org>
+ 	    Tobias Burnus  <burnus@net-b.de>
  
- 	  case Attr_Bit_Position:
- 	    gnu_result = gnu_field_bitpos;
- 	    break;
--		}
-+	  }
- 
- 	/* If this has a PLACEHOLDER_EXPR, qualify it by the object we are
- 	   handling.  */
 Index: gcc/fortran/ChangeLog
 ===================================================================
 --- a/src/gcc/fortran/ChangeLog	(revision
 +++ b/src/gcc/fortran/ChangeLog	(revision
-@@ -1,3 +1,7 @@
-+2013-05-22  Janne Blomqvist  <jb@gcc.gnu.org>
+@@ -1,3 +1,12 @@
++2013-06-06  Tobias Burnus  <burnus@net-b.de>
 +
-+	* intrinsic.texi (RANDOM_SEED): Improve example.
++	Backport from mainline
++	2012-08-27  Tobias Burnus  <burnus@net-b.de>
 +
- 2013-05-07  Tobias Burnus  <burnus@net-b.de>
- 
- 	Backport from mainline
-Index: gcc/coverage.c
-===================================================================
---- a/src/gcc/coverage.c	(revision
-+++ b/src/gcc/coverage.c	(revision
-@@ -1099,6 +1099,9 @@
-   memcpy (da_file_name + prefix_len, filename, len);
-   strcpy (da_file_name + prefix_len + len, GCOV_DATA_SUFFIX);
- 
-+  if (flag_branch_probabilities)
-+    read_counts_file ();
++	PR fortran/54370
++	* trans-stmt.c (gfc_trans_do_while): Don't change the logical
++	kind for negation of the condition.
 +
-   /* Name of bbg file.  */
-   if (flag_test_coverage && !flag_compare_debug)
-     {
-@@ -1118,9 +1121,6 @@
- 	  gcov_write_unsigned (local_tick);
- 	}
-     }
--
--  if (flag_branch_probabilities)
--    read_counts_file ();
- }
+ 2013-06-01  Janus Weil  <janus@gcc.gnu.org>
+ 	    Tobias Burnus  <burnus@net-b.de>
  
- /* Performs file-level cleanup.  Close graph file, generate coverage
-Index: gcc/config/i386/i386.md
+Index: gcc/fortran/trans-stmt.c
 ===================================================================
---- a/src/gcc/config/i386/i386.md	(revision
-+++ b/src/gcc/config/i386/i386.md	(revision
-@@ -109,6 +109,7 @@
-   UNSPEC_CALL_NEEDS_VZEROUPPER
-   UNSPEC_PAUSE
-   UNSPEC_LEA_ADDR
-+  UNSPEC_STOS
- 
-   ;; For SSE/MMX support:
-   UNSPEC_FIX_NOTRUNC
-@@ -1855,18 +1856,16 @@
-   [(set_attr "type" "*,*,sselog1,ssemov,ssemov")
-    (set_attr "prefix" "*,*,maybe_vex,maybe_vex,maybe_vex")
-    (set (attr "mode")
--   	(cond [(eq_attr "alternative" "2,3")
--		 (if_then_else
--		   (match_test "optimize_function_for_size_p (cfun)")
--		   (const_string "V4SF")
--		   (const_string "TI"))
--	       (eq_attr "alternative" "4")
--		 (if_then_else
--		   (ior (match_test "TARGET_SSE_TYPELESS_STORES")
--			(match_test "optimize_function_for_size_p (cfun)"))
--		   (const_string "V4SF")
--		   (const_string "TI"))]
--	       (const_string "DI")))])
-+   	(cond [(eq_attr "alternative" "0,1")
-+		 (const_string "DI")
-+	       (ior (not (match_test "TARGET_SSE2"))
-+		    (match_test "optimize_function_for_size_p (cfun)"))
-+	         (const_string "V4SF")
-+	       (and (eq_attr "alternative" "4")
-+		    (match_test "TARGET_SSE_TYPELESS_STORES"))
-+		 (const_string "V4SF")
-+	       ]
-+	       (const_string "TI")))])
- 
- (define_split
-   [(set (match_operand:TI 0 "nonimmediate_operand" "")
-@@ -15912,7 +15911,8 @@
-   [(parallel [(set (match_operand 1 "memory_operand" "")
- 		   (match_operand 2 "register_operand" ""))
- 	      (set (match_operand 0 "register_operand" "")
--		   (match_operand 3 "" ""))])]
-+		   (match_operand 3 "" ""))
-+	      (unspec [(const_int 0)] UNSPEC_STOS)])]
-   ""
-   "ix86_current_function_needs_cld = 1;")
- 
-@@ -15921,7 +15921,8 @@
- 	(match_operand:DI 2 "register_operand" "a"))
-    (set (match_operand:DI 0 "register_operand" "=D")
- 	(plus:DI (match_dup 1)
--		 (const_int 8)))]
-+		 (const_int 8)))
-+   (unspec [(const_int 0)] UNSPEC_STOS)]
-   "TARGET_64BIT
-    && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
-   "stosq"
-@@ -15934,7 +15935,8 @@
- 	(match_operand:SI 2 "register_operand" "a"))
-    (set (match_operand:P 0 "register_operand" "=D")
- 	(plus:P (match_dup 1)
--		(const_int 4)))]
-+		(const_int 4)))
-+   (unspec [(const_int 0)] UNSPEC_STOS)]
-   "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
-   "stos{l|d}"
-   [(set_attr "type" "str")
-@@ -15946,7 +15948,8 @@
- 	(match_operand:HI 2 "register_operand" "a"))
-    (set (match_operand:P 0 "register_operand" "=D")
- 	(plus:P (match_dup 1)
--		(const_int 2)))]
-+		(const_int 2)))
-+   (unspec [(const_int 0)] UNSPEC_STOS)]
-   "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
-   "stosw"
-   [(set_attr "type" "str")
-@@ -15958,7 +15961,8 @@
- 	(match_operand:QI 2 "register_operand" "a"))
-    (set (match_operand:P 0 "register_operand" "=D")
- 	(plus:P (match_dup 1)
--		(const_int 1)))]
-+		(const_int 1)))
-+   (unspec [(const_int 0)] UNSPEC_STOS)]
-   "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
-   "stosb"
-   [(set_attr "type" "str")
-Index: gcc/config/i386/driver-i386.c
-===================================================================
---- a/src/gcc/config/i386/driver-i386.c	(revision
-+++ b/src/gcc/config/i386/driver-i386.c	(revision
-@@ -350,7 +350,10 @@
- enum vendor_signatures
- {
-   SIG_INTEL =	0x756e6547 /* Genu */,
--  SIG_AMD =	0x68747541 /* Auth */
-+  SIG_AMD =	0x68747541 /* Auth */,
-+  SIG_CENTAUR =	0x746e6543 /* Cent */,
-+  SIG_CYRIX =	0x69727943 /* Cyri */,
-+  SIG_NSC =	0x646f6547 /* Geod */
- };
- 
- enum processor_signatures
-@@ -510,7 +513,10 @@
- 
-   if (!arch)
-     {
--      if (vendor == SIG_AMD)
-+      if (vendor == SIG_AMD
-+	  || vendor == SIG_CENTAUR
-+	  || vendor == SIG_CYRIX
-+	  || vendor == SIG_NSC)
- 	cache = detect_caches_amd (ext_level);
-       else if (vendor == SIG_INTEL)
- 	{
-@@ -549,6 +555,37 @@
-       else
- 	processor = PROCESSOR_PENTIUM;
-     }
-+  else if (vendor == SIG_CENTAUR)
-+    {
-+      if (arch)
-+	{
-+	  switch (family)
-+	    {
-+	    case 6:
-+	      if (model > 9)
-+		/* Use the default detection procedure.  */
-+		processor = PROCESSOR_GENERIC32;
-+	      else if (model == 9)
-+		cpu = "c3-2";
-+	      else if (model >= 6)
-+		cpu = "c3";
-+	      else
-+		processor = PROCESSOR_GENERIC32;
-+	      break;
-+	    case 5:
-+	      if (has_3dnow)
-+		cpu = "winchip2";
-+	      else if (has_mmx)
-+		cpu = "winchip2-c6";
-+	      else
-+		processor = PROCESSOR_GENERIC32;
-+	      break;
-+	    default:
-+	      /* We have no idea.  */
-+	      processor = PROCESSOR_GENERIC32;
-+	    }
-+	}
-+    }
-   else
-     {
-       switch (family)
-Index: gcc/config/i386/i386.c
-===================================================================
---- a/src/gcc/config/i386/i386.c	(revision
-+++ b/src/gcc/config/i386/i386.c	(revision
-@@ -2979,7 +2979,7 @@
- 	| PTA_SSSE3 | PTA_CX16},
-       {"corei7", PROCESSOR_COREI7_64, CPU_COREI7,
- 	PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
--	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16},
-+	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT},
-       {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7,
- 	PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
- 	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX
-Index: gcc/config/arm/thumb2.md
-===================================================================
---- a/src/gcc/config/arm/thumb2.md	(revision
-+++ b/src/gcc/config/arm/thumb2.md	(revision
-@@ -182,7 +182,7 @@
-    str%?\\t%1, %0"
-   [(set_attr "type" "*,*,*,*,load1,load1,store1,store1")
-    (set_attr "predicable" "yes")
--   (set_attr "pool_range" "*,*,*,*,1020,4096,*,*")
-+   (set_attr "pool_range" "*,*,*,*,1018,4094,*,*")
-    (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")]
- )
- 
-@@ -217,7 +217,7 @@
-    ldr%(h%)\\t%0, %1\\t%@ movhi"
-   [(set_attr "type" "*,*,store1,load1")
-    (set_attr "predicable" "yes")
--   (set_attr "pool_range" "*,*,*,4096")
-+   (set_attr "pool_range" "*,*,*,4094")
-    (set_attr "neg_pool_range" "*,*,*,250")]
- )
- 
-@@ -570,7 +570,7 @@
-    ldr%(sb%)\\t%0, %1"
-   [(set_attr "type" "alu_shift,load_byte")
-    (set_attr "predicable" "yes")
--   (set_attr "pool_range" "*,4096")
-+   (set_attr "pool_range" "*,4094")
-    (set_attr "neg_pool_range" "*,250")]
- )
- 
-@@ -583,7 +583,7 @@
-    ldr%(h%)\\t%0, %1"
-   [(set_attr "type" "alu_shift,load_byte")
-    (set_attr "predicable" "yes")
--   (set_attr "pool_range" "*,4096")
-+   (set_attr "pool_range" "*,4094")
-    (set_attr "neg_pool_range" "*,250")]
- )
- 
-@@ -596,7 +596,7 @@
-    ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
-   [(set_attr "type" "alu_shift,load_byte")
-    (set_attr "predicable" "yes")
--   (set_attr "pool_range" "*,4096")
-+   (set_attr "pool_range" "*,4094")
-    (set_attr "neg_pool_range" "*,250")]
- )
- 
-Index: gcc/config/arm/vfp.md
-===================================================================
---- a/src/gcc/config/arm/vfp.md	(revision
-+++ b/src/gcc/config/arm/vfp.md	(revision
-@@ -126,7 +126,7 @@
-   [(set_attr "predicable" "yes")
-    (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores")
-    (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*")
--   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
-+   (set_attr "pool_range"     "*,*,*,*,1018,4094,*,*,*,*,*,1018,*")
-    (set_attr "neg_pool_range" "*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
- )
- 
-@@ -177,7 +177,8 @@
-                                  (const_int 8)
-                                  (const_int 4))]
-                               (const_int 4)))
--   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
-+   (set_attr "arm_pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
-+   (set_attr "thumb2_pool_range"     "*,*,*,*,1018,4094,*,*,*,*,1018,*")
-    (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*")
-    (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
- )
-@@ -222,7 +223,8 @@
-                                  * 4")]
-                               (const_int 4)))
-    (set_attr "predicable"    "yes")
--   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
-+   (set_attr "arm_pool_range"     "*,*,*,*,1018,4094,*,*,*,*,1018,*")
-+   (set_attr "thumb2_pool_range"     "*,*,*,*,1018,4094,*,*,*,*,1018,*")
-    (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*")
-    (set (attr "ce_count") 
- 	(symbol_ref "get_attr_length (insn) / 4"))
-@@ -409,7 +411,7 @@
-    (set_attr "type"
-      "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*")
-    (set_attr "insn" "*,*,*,*,*,*,*,*,mov")
--   (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*")
-+   (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*")
-    (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")]
- )
- 
-@@ -501,7 +503,7 @@
- 				 (const_int 8)
- 				 (const_int 4))]
- 			      (const_int 4)))
--   (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*")
-+   (set_attr "pool_range" "*,*,*,1018,*,4094,*,*,*")
-    (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")]
- )
- 
-Index: gcc/config/arm/neon.md
-===================================================================
---- a/src/gcc/config/arm/neon.md	(revision
-+++ b/src/gcc/config/arm/neon.md	(revision
-@@ -201,7 +201,8 @@
-   (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu,load2,store2")
-   (set_attr "insn" "*,*,*,*,*,*,mov,*,*")
-   (set_attr "length" "4,4,4,4,4,4,8,8,8")
--  (set_attr "pool_range"     "*,*,*,1020,*,*,*,1020,*")
-+  (set_attr "arm_pool_range"     "*,*,*,1020,*,*,*,1020,*")
-+  (set_attr "thumb2_pool_range"     "*,*,*,1018,*,*,*,1018,*")
-   (set_attr "neg_pool_range" "*,*,*,1004,*,*,*,1004,*")])
- 
- (define_insn "*neon_mov<mode>"
-@@ -246,7 +247,8 @@
-    (set_attr "type" "*,*,*,*,*,*,alu,load4,store4")
-    (set_attr "insn" "*,*,*,*,*,*,mov,*,*")
-    (set_attr "length" "4,8,4,8,8,8,16,8,16")
--   (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*")
-+   (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*")
-+   (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*")
-    (set_attr "neg_pool_range" "*,*,*,996,*,*,*,996,*")])
- 
- (define_expand "movti"
-Index: gcc/config/arm/arm.md
+--- a/src/gcc/fortran/trans-stmt.c	(revision
++++ b/src/gcc/fortran/trans-stmt.c	(revision
+@@ -1743,7 +1743,7 @@
+   gfc_conv_expr_val (&cond, code->expr1);
+   gfc_add_block_to_block (&block, &cond.pre);
+   cond.expr = fold_build1_loc (code->expr1->where.lb->location,
+-			       TRUTH_NOT_EXPR, boolean_type_node, cond.expr);
++			       TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr);
+ 
+   /* Build "IF (! cond) GOTO exit_label".  */
+   tmp = build1_v (GOTO_EXPR, exit_label);
+Index: gcc/config/alpha/alpha.md
 ===================================================================
---- a/src/gcc/config/arm/arm.md	(revision
-+++ b/src/gcc/config/arm/arm.md	(revision
-@@ -256,6 +256,9 @@
- ; POOL_RANGE is how far away from a constant pool entry that this insn
- ; can be placed.  If the distance is zero, then this insn will never
- ; reference the pool.
-+; Note that for Thumb constant pools the PC value is rounded down to the
-+; nearest multiple of four.  Therefore, THUMB2_POOL_RANGE (and POOL_RANGE for
-+; Thumb insns) should be set to <max_range> - 2.
- ; NEG_POOL_RANGE is nonzero for insns that can reference a constant pool entry
- ; before its address.  It is set to <max_range> - (8 + <data_size>).
- (define_attr "arm_pool_range" "" (const_int 0))
-@@ -5058,7 +5058,7 @@
- 					(const_int 2) (const_int 4))
- 			  (const_int 4)])
-    (set_attr "type" "simple_alu_shift,load_byte")
--   (set_attr "pool_range" "*,1020")]
-+   (set_attr "pool_range" "*,1018")]
- )
- 
- ;; This pattern will only be used when ldsh is not available
-@@ -5239,7 +5242,7 @@
-    (set_attr "type" "*,*,*,load2,store2")
-    (set_attr "arm_pool_range" "*,*,*,1020,*")
-    (set_attr "arm_neg_pool_range" "*,*,*,1004,*")
--   (set_attr "thumb2_pool_range" "*,*,*,4096,*")
-+   (set_attr "thumb2_pool_range" "*,*,*,4094,*")
-    (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")]
- )
- 
-@@ -5379,7 +5382,7 @@
-   [(set_attr "length" "4,4,6,2,2,6,4,4")
-    (set_attr "type" "*,*,*,load2,store2,load2,store2,*")
-    (set_attr "insn" "*,mov,*,*,*,*,*,mov")
--   (set_attr "pool_range" "*,*,*,*,*,1020,*,*")]
-+   (set_attr "pool_range" "*,*,*,*,*,1018,*,*")]
- )
- 
- (define_expand "movsi"
-@@ -5539,7 +5542,7 @@
-    mov\\t%0, %1"
-   [(set_attr "length" "2,2,4,4,2,2,2,2,2")
-    (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*")
--   (set_attr "pool_range" "*,*,*,*,*,*,1020,*,*")
-+   (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*")
-    (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")])
- 
- (define_split 
-@@ -5632,7 +5635,7 @@
-        		     		 (match_dup 2)] UNSPEC_PIC_BASE))]
-  "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);"
-  [(set_attr "type" "load1,load1,load1")
--  (set_attr "pool_range" "4096,4096,1024")
-+  (set_attr "pool_range" "4096,4094,1022")
-   (set_attr "neg_pool_range" "4084,0,0")
-   (set_attr "arch"  "a,t2,t1")    
-   (set_attr "length" "8,6,4")]
-@@ -5648,7 +5651,10 @@
-   "TARGET_32BIT && flag_pic"
-   "ldr%?\\t%0, %1"
-   [(set_attr "type" "load1")
--   (set_attr "pool_range" "4096")
-+   (set (attr "pool_range")
-+	(if_then_else (eq_attr "is_thumb" "no")
-+		      (const_int 4096)
-+		      (const_int 4094)))
-    (set (attr "neg_pool_range")
- 	(if_then_else (eq_attr "is_thumb" "no")
- 		      (const_int 4084)
-@@ -5661,7 +5667,7 @@
-   "TARGET_THUMB1 && flag_pic"
-   "ldr\\t%0, %1"
-   [(set_attr "type" "load1")
--   (set (attr "pool_range") (const_int 1024))]
-+   (set (attr "pool_range") (const_int 1018))]
- )
- 
- (define_insn "pic_add_dot_plus_four"
-@@ -6456,7 +6462,7 @@
-   [(set_attr "length" "2")
-    (set_attr "type" "*,load1,store1,*,*")
-    (set_attr "insn" "mov,*,*,mov,mov")
--   (set_attr "pool_range" "*,1020,*,*,*")
-+   (set_attr "pool_range" "*,1018,*,*,*")
-    (set_attr "conds" "clob,nocond,nocond,nocond,nocond")])
- 
- (define_expand "movsf"
-@@ -6511,7 +6517,8 @@
-   [(set_attr "predicable" "yes")
-    (set_attr "type" "*,load1,store1")
-    (set_attr "insn" "mov,*,*")
--   (set_attr "pool_range" "*,4096,*")
-+   (set_attr "arm_pool_range" "*,4096,*")
-+   (set_attr "thumb2_pool_range" "*,4094,*")
-    (set_attr "arm_neg_pool_range" "*,4084,*")
-    (set_attr "thumb2_neg_pool_range" "*,0,*")]
- )
-@@ -6533,7 +6540,7 @@
-    mov\\t%0, %1"
-   [(set_attr "length" "2")
-    (set_attr "type" "*,load1,store1,load1,store1,*,*")
--   (set_attr "pool_range" "*,*,*,1020,*,*,*")
-+   (set_attr "pool_range" "*,*,*,1018,*,*,*")
-    (set_attr "insn" "*,*,*,*,*,mov,mov")
-    (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")]
- )
-@@ -6622,7 +6629,8 @@
-   "
-   [(set_attr "length" "8,12,16,8,8")
-    (set_attr "type" "*,*,*,load2,store2")
--   (set_attr "pool_range" "*,*,*,1020,*")
-+   (set_attr "arm_pool_range" "*,*,*,1020,*")
-+   (set_attr "thumb2_pool_range" "*,*,*,1018,*")
-    (set_attr "arm_neg_pool_range" "*,*,*,1004,*")
-    (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")]
- )
-@@ -6665,7 +6673,7 @@
-   [(set_attr "length" "4,2,2,6,4,4")
-    (set_attr "type" "*,load2,store2,load2,store2,*")
-    (set_attr "insn" "*,*,*,*,*,mov")
--   (set_attr "pool_range" "*,*,*,1020,*,*")]
-+   (set_attr "pool_range" "*,*,*,1018,*,*")]
- )
- 
- (define_expand "movxf"
-Index: gcc/config/arm/t-rtems-eabi
+--- a/src/gcc/config/alpha/alpha.md	(revision
++++ b/src/gcc/config/alpha/alpha.md	(revision
+@@ -25,6 +25,7 @@
+ ;; Uses of UNSPEC in this file:
+ 
+ (define_c_enum "unspec" [
++  UNSPEC_XFLT_COMPARE
+   UNSPEC_ARG_HOME
+   UNSPEC_LDGP1
+   UNSPEC_INSXH
+Index: gcc/config/alpha/alpha.c
 ===================================================================
---- a/src/gcc/config/arm/t-rtems-eabi	(revision
-+++ b/src/gcc/config/arm/t-rtems-eabi	(revision
-@@ -1,8 +1,47 @@
- # Custom RTEMS EABI multilibs
- 
--MULTILIB_OPTIONS    = mthumb march=armv6-m/march=armv7/march=armv7-m
--MULTILIB_DIRNAMES   = thumb armv6-m armv7 armv7-m
--MULTILIB_EXCEPTIONS = march=armv6-m march=armv7 march=armv7-m
--MULTILIB_MATCHES    =
--MULTILIB_EXCLUSIONS =
--MULTILIB_OSDIRNAMES =
-+MULTILIB_OPTIONS  = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard
-+MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard
-+
-+# Enumeration of multilibs
-+
-+MULTILIB_EXCEPTIONS =
-+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon
-+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
-+# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m
-+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard
-+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard
-+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon
-+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard
-+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m
-+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
-+MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard
-+# MULTILIB_EXCEPTIONS += mthumb
-+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon
-+MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv6-m
-+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon
-+MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-a
-+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon
-+MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-r
-+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon
-+MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += march=armv7-m
-+MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard
-+MULTILIB_EXCEPTIONS += mfpu=neon
-+MULTILIB_EXCEPTIONS += mfloat-abi=hard
-Index: gcc/config/v850/t-rtems
+--- a/src/gcc/config/alpha/alpha.c	(revision
++++ b/src/gcc/config/alpha/alpha.c	(revision
+@@ -2658,12 +2658,12 @@
+       break;
+ 
+     case GE:  case GT:  case GEU:  case GTU:
+-      /* These must be swapped.  */
+-      if (op1 != CONST0_RTX (cmp_mode))
+-	{
+-	  code = swap_condition (code);
+-	  tem = op0, op0 = op1, op1 = tem;
+-	}
++      /* These normally need swapping, but for integer zero we have
++	 special patterns that recognize swapped operands.  */
++      if (cmp_mode == DImode && op1 == const0_rtx)
++	break;
++      code = swap_condition (code);
++      tem = op0, op0 = op1, op1 = tem;
+       break;
+ 
+     default:
+@@ -3025,12 +3025,9 @@
+   operands[1] = op1;
+   out = gen_reg_rtx (DImode);
+ 
+-  /* What's actually returned is -1,0,1, not a proper boolean value,
+-     so use an EXPR_LIST as with a generic libcall instead of a 
+-     comparison type expression.  */
+-  note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX);
+-  note = gen_rtx_EXPR_LIST (VOIDmode, op0, note);
+-  note = gen_rtx_EXPR_LIST (VOIDmode, func, note);
++  /* What's actually returned is -1,0,1, not a proper boolean value.  */
++  note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1);
++  note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE);
+   alpha_emit_xfloating_libcall (func, out, operands, 2, note);
+ 
+   return out;
+Index: gcc/config/i386/i386.md
 ===================================================================
---- a/src/gcc/config/v850/t-rtems	(revision
-+++ b/src/gcc/config/v850/t-rtems	(revision
-@@ -1,3 +1,7 @@
- # Custom multilibs for RTEMS
- 
-+MULTILIB_OPTIONS  = mv850/mv850e/mv850e2/mv850e2v3
-+MULTILIB_DIRNAMES = v850 v850e v850e2 v850e2v3
-+MULTILIB_MATCHES  = mv850e=mv850e1 
-+
- MULTILIB_MATCHES  += mv850e=mv850es
+--- a/src/gcc/config/i386/i386.md	(revision
++++ b/src/gcc/config/i386/i386.md	(revision
+@@ -17194,6 +17194,7 @@
+   "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
+    && peep2_reg_dead_p (4, operands[0])
+    && !reg_overlap_mentioned_p (operands[0], operands[1])
++   && !reg_overlap_mentioned_p (operands[0], operands[2])
+    && (<MODE>mode != QImode
+        || immediate_operand (operands[2], QImode)
+        || q_regs_operand (operands[2], QImode))
+@@ -17258,6 +17259,7 @@
+        || immediate_operand (operands[2], SImode)
+        || q_regs_operand (operands[2], SImode))
+    && !reg_overlap_mentioned_p (operands[0], operands[1])
++   && !reg_overlap_mentioned_p (operands[0], operands[2])
+    && ix86_match_ccmode (peep2_next_insn (3),
+ 			 (GET_CODE (operands[3]) == PLUS
+ 			  || GET_CODE (operands[3]) == MINUS)