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authorGordon Ross <gwr@nexenta.com>2015-05-02 16:01:22 -0400
committerGordon Ross <gwr@nexenta.com>2015-12-07 20:47:26 -0500
commitbc0e91320069f0bcaee43e80a7ea686d9efa2d08 (patch)
treeb146b6ef39954d351da2785aa940b4ea3c78b5de
parent5878fad70d76d8711f6608c1f80b0447601261c6 (diff)
downloadillumos-gate-bc0e91320069f0bcaee43e80a7ea686d9efa2d08.tar.gz
5876 sys/regset.h pollutes name space (try 2)
Reviewed by: Josef 'Jeff' Sipek <jeffpc@josefsipek.net> Reviewed by: Jonathan Perkin <jperkin@joyent.com> Reviewed by: Alexander Pyhalov <alp@sfedu.ru> Reviewed by: Garrett D'Amore <garrett@damore.org> Approved by: Dan McDonald <danmcd@omniti.com>
-rw-r--r--usr/src/cmd/csh/i386/signal.c4
-rw-r--r--usr/src/cmd/csh/sparc/signal.c4
-rw-r--r--usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c2
-rw-r--r--usr/src/head/ucontext.h13
-rw-r--r--usr/src/lib/libc/port/threads/sigaction.c2
-rw-r--r--usr/src/lib/libc/sparc/gen/makectxt.c4
-rw-r--r--usr/src/lib/libc/sparcv9/gen/makectxt.c4
-rw-r--r--usr/src/lib/libproc/common/P32ton.c6
-rw-r--r--usr/src/pkg/manifests/system-header.mf1
-rw-r--r--usr/src/test/libc-tests/cfg/symbols/ucontext_h.cfg7
-rw-r--r--usr/src/uts/common/sys/core.h8
-rw-r--r--usr/src/uts/common/sys/prsystm.h4
-rw-r--r--usr/src/uts/intel/ia32/os/archdep.c4
-rw-r--r--usr/src/uts/intel/ia32/os/fpu.c2
-rw-r--r--usr/src/uts/intel/sys/Makefile1
-rw-r--r--usr/src/uts/intel/sys/fp.h90
-rw-r--r--usr/src/uts/intel/sys/mcontext.h191
-rw-r--r--usr/src/uts/intel/sys/pcb.h3
-rw-r--r--usr/src/uts/intel/sys/procfs_isa.h6
-rw-r--r--usr/src/uts/intel/sys/regset.h313
-rw-r--r--usr/src/uts/intel/sys/ucontext.h4
-rw-r--r--usr/src/uts/sparc/fpu/fpu_simulator.c1
-rw-r--r--usr/src/uts/sparc/sys/Makefile3
-rw-r--r--usr/src/uts/sparc/sys/fpu/fpu_simulator.h2
-rw-r--r--usr/src/uts/sparc/sys/fpu/fpusystm.h4
-rw-r--r--usr/src/uts/sparc/sys/mcontext.h304
-rw-r--r--usr/src/uts/sparc/sys/procfs_isa.h6
-rw-r--r--usr/src/uts/sparc/sys/regset.h427
-rw-r--r--usr/src/uts/sparc/sys/ucontext.h6
-rw-r--r--usr/src/uts/sparc/syscall/getcontext.c8
-rw-r--r--usr/src/uts/sparc/v7/sys/machpcb.h6
-rw-r--r--usr/src/uts/sparc/v9/fpu/fpu.c14
-rw-r--r--usr/src/uts/sparc/v9/os/v9dep.c14
-rw-r--r--usr/src/uts/sparc/v9/sys/machpcb.h2
-rw-r--r--usr/src/uts/sun4/os/trap.c4
35 files changed, 682 insertions, 792 deletions
diff --git a/usr/src/cmd/csh/i386/signal.c b/usr/src/cmd/csh/i386/signal.c
index d023a9bd88..98250ad7e5 100644
--- a/usr/src/cmd/csh/i386/signal.c
+++ b/usr/src/cmd/csh/i386/signal.c
@@ -12,8 +12,6 @@
* specifies the terms and conditions for redistribution.
*/
-#pragma ident "%Z%%M% %I% %E% SMI"
-
/*
* 4.3BSD signal compatibility functions
*
@@ -27,7 +25,7 @@
#include <sys/types.h>
#include <sys/siginfo.h>
-#include <sys/ucontext.h>
+#include <ucontext.h>
#include <signal.h>
#include "signal.h"
#include <errno.h>
diff --git a/usr/src/cmd/csh/sparc/signal.c b/usr/src/cmd/csh/sparc/signal.c
index 9502940859..b2dd299ec4 100644
--- a/usr/src/cmd/csh/sparc/signal.c
+++ b/usr/src/cmd/csh/sparc/signal.c
@@ -12,8 +12,6 @@
* specifies the terms and conditions for redistribution.
*/
-#pragma ident "%Z%%M% %I% %E% SMI"
-
/*
* 4.3BSD signal compatibility functions
*
@@ -27,7 +25,7 @@
#include <sys/types.h>
#include <sys/siginfo.h>
-#include <sys/ucontext.h>
+#include <ucontext.h>
#include <signal.h>
#include "signal.h"
#include <errno.h>
diff --git a/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c b/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c
index ed61bade77..c11e08ba0d 100644
--- a/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c
+++ b/usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c
@@ -448,7 +448,7 @@ pt_fpregs(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv)
mdb_tgt_t *t = mdb.m_target;
mdb_tgt_tid_t tid;
prfpregset_t fprs;
- struct fpchip_state fps;
+ struct _fpchip_state fps;
char buf[256];
uint_t top;
int i;
diff --git a/usr/src/head/ucontext.h b/usr/src/head/ucontext.h
index 6d96a18ad5..c569f634fd 100644
--- a/usr/src/head/ucontext.h
+++ b/usr/src/head/ucontext.h
@@ -33,8 +33,19 @@
#define _UCONTEXT_H
#include <sys/ucontext.h>
-
+/*
+ * The file sys/regset.h defines indices in the gregset_t array,
+ * such as EIP on i386. Those defines were historically exposed
+ * via sys/ucontext.h, sys/signal.h, etc. which caused surprises
+ * due to those defines unexpectedly polluting the namespace.
+ * On the other hand, several existing applications assume that
+ * the regset names are defined after an include <ucontext.h>.
+ * To solve both problems at once: <ucontext.h> (this file)
+ * DOES include sys/regset.h for you but <sys/ucontext.h>
+ * does NOT include sys/regset.h anymore.
+ */
#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
+#include <sys/regset.h>
#include <sys/siginfo.h>
#endif
diff --git a/usr/src/lib/libc/port/threads/sigaction.c b/usr/src/lib/libc/port/threads/sigaction.c
index 8e9df7ab60..571e211f97 100644
--- a/usr/src/lib/libc/port/threads/sigaction.c
+++ b/usr/src/lib/libc/port/threads/sigaction.c
@@ -208,7 +208,7 @@ call_user_handler(int sig, siginfo_t *sip, ucontext_t *ucp)
if (--fp->fpu_qcnt > 0) {
unsigned char i;
- struct fq *fqp;
+ struct _fq *fqp;
fqp = fp->fpu_q;
for (i = 0; i < fp->fpu_qcnt; i++)
diff --git a/usr/src/lib/libc/sparc/gen/makectxt.c b/usr/src/lib/libc/sparc/gen/makectxt.c
index 7519bdabcb..497c642516 100644
--- a/usr/src/lib/libc/sparc/gen/makectxt.c
+++ b/usr/src/lib/libc/sparc/gen/makectxt.c
@@ -27,15 +27,15 @@
/* Copyright (c) 1988 AT&T */
/* All Rights Reserved */
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#pragma weak _makecontext = makecontext
#pragma weak ___makecontext_v2 = __makecontext_v2
#include "lint.h"
#include <stdarg.h>
#include <strings.h>
+/* Can't just use <ucontext.h> due to redefine_extname stuff. */
#include <sys/ucontext.h>
+#include <sys/regset.h>
#include <sys/stack.h>
#include <sys/frame.h>
diff --git a/usr/src/lib/libc/sparcv9/gen/makectxt.c b/usr/src/lib/libc/sparcv9/gen/makectxt.c
index 7519bdabcb..497c642516 100644
--- a/usr/src/lib/libc/sparcv9/gen/makectxt.c
+++ b/usr/src/lib/libc/sparcv9/gen/makectxt.c
@@ -27,15 +27,15 @@
/* Copyright (c) 1988 AT&T */
/* All Rights Reserved */
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#pragma weak _makecontext = makecontext
#pragma weak ___makecontext_v2 = __makecontext_v2
#include "lint.h"
#include <stdarg.h>
#include <strings.h>
+/* Can't just use <ucontext.h> due to redefine_extname stuff. */
#include <sys/ucontext.h>
+#include <sys/regset.h>
#include <sys/stack.h>
#include <sys/frame.h>
diff --git a/usr/src/lib/libproc/common/P32ton.c b/usr/src/lib/libproc/common/P32ton.c
index 78219550c8..acb52058c9 100644
--- a/usr/src/lib/libproc/common/P32ton.c
+++ b/usr/src/lib/libproc/common/P32ton.c
@@ -24,8 +24,6 @@
* Use is subject to license terms.
*/
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#include <sys/types.h>
#include <sys/mkdev.h>
#include <sys/regset.h>
@@ -267,7 +265,7 @@ prfpregset_32_to_n(const prfpregset32_t *src, prfpregset_t *dst)
#elif defined(__amd64)
struct _fpstate32 *src32 = (struct _fpstate32 *)src;
- struct fpchip_state *dst64 = (struct fpchip_state *)dst;
+ struct _fpchip_state *dst64 = (struct _fpchip_state *)dst;
int i;
(void) memcpy(dst64->st, src32->_st, sizeof (src32->_st));
@@ -598,7 +596,7 @@ prfpregset_n_to_32(const prfpregset_t *src, prfpregset32_t *dst)
#elif defined(__amd64)
struct _fpstate32 *dst32 = (struct _fpstate32 *)dst;
- struct fpchip_state *src64 = (struct fpchip_state *)src;
+ struct _fpchip_state *src64 = (struct _fpchip_state *)src;
uint32_t top;
int i;
diff --git a/usr/src/pkg/manifests/system-header.mf b/usr/src/pkg/manifests/system-header.mf
index 697b75b6c2..b152b2179e 100644
--- a/usr/src/pkg/manifests/system-header.mf
+++ b/usr/src/pkg/manifests/system-header.mf
@@ -1222,6 +1222,7 @@ $(i386_ONLY)file path=usr/include/sys/mc_amd.h
$(i386_ONLY)file path=usr/include/sys/mc_intel.h
$(i386_ONLY)file path=usr/include/sys/mca_amd.h
$(i386_ONLY)file path=usr/include/sys/mca_x86.h
+file path=usr/include/sys/mcontext.h
file path=usr/include/sys/md4.h
file path=usr/include/sys/md5.h
file path=usr/include/sys/md5_consts.h
diff --git a/usr/src/test/libc-tests/cfg/symbols/ucontext_h.cfg b/usr/src/test/libc-tests/cfg/symbols/ucontext_h.cfg
index f013b08228..3c51d3b755 100644
--- a/usr/src/test/libc-tests/cfg/symbols/ucontext_h.cfg
+++ b/usr/src/test/libc-tests/cfg/symbols/ucontext_h.cfg
@@ -11,6 +11,7 @@
#
# Copyright 2015 Garrett D'Amore <garrett@damore.org>
+# Copyright 2015 Nexenta Systems, Inc. All rights reserved.
#
#
@@ -20,10 +21,16 @@
#
# Types.
#
+type | sigset_t | ucontext.h | -POSIX+ SUS+
+type | stack_t | ucontext.h | -POSIX+ SUS+
+type | mcontext_t | ucontext.h | -POSIX+ SUS+
+type | ucontext_t | ucontext.h | -POSIX+ SUS+
#
# Values.
#
+value | REG_SP | int | ucontext.h | -POSIX+ -SUS+
+value | GETCONTEXT | int | ucontext.h | -POSIX+ -SUS+
#
# Functions
diff --git a/usr/src/uts/common/sys/core.h b/usr/src/uts/common/sys/core.h
index 28ee6faaff..543ed5fada 100644
--- a/usr/src/uts/common/sys/core.h
+++ b/usr/src/uts/common/sys/core.h
@@ -20,6 +20,8 @@
* CDDL HEADER END
*/
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -27,8 +29,6 @@
#ifndef _SYS_CORE_H
#define _SYS_CORE_H
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#ifndef _KERNEL
#include <sys/reg.h>
#endif /* _KERNEL */
@@ -63,9 +63,9 @@ struct core {
int c_dsize; /* Data size (bytes) */
int c_ssize; /* Stack size (bytes) */
char c_cmdname[CORE_NAMELEN + 1]; /* Command name */
- struct fpu c_fpu; /* external FPU state */
+ struct _fpu c_fpu; /* external FPU state */
#if defined(__sparc)
- struct fq c_fpu_q[MAXFPQ]; /* fpu exception queue */
+ struct _fq c_fpu_q[_MAXFPQ]; /* fpu exception queue */
#endif
int c_ucode; /* Exception no. from u_code */
};
diff --git a/usr/src/uts/common/sys/prsystm.h b/usr/src/uts/common/sys/prsystm.h
index ebded76dce..6f5d4b914f 100644
--- a/usr/src/uts/common/sys/prsystm.h
+++ b/usr/src/uts/common/sys/prsystm.h
@@ -108,9 +108,9 @@ extern int pr_watch_emul(struct regs *, caddr_t, enum seg_rw);
extern void pr_free_watched_pages(proc_t *);
extern int pr_allstopped(proc_t *, int);
#if defined(__sparc)
-struct gwindows;
+struct _gwindows;
extern int prnwindows(klwp_t *);
-extern void prgetwindows(klwp_t *, struct gwindows *);
+extern void prgetwindows(klwp_t *, struct _gwindows *);
#if defined(__sparcv9) /* 32-bit adb macros should not see these defs */
extern void prgetasregs(klwp_t *, asrset_t);
extern void prsetasregs(klwp_t *, asrset_t);
diff --git a/usr/src/uts/intel/ia32/os/archdep.c b/usr/src/uts/intel/ia32/os/archdep.c
index d83b16d673..2a33f306c2 100644
--- a/usr/src/uts/intel/ia32/os/archdep.c
+++ b/usr/src/uts/intel/ia32/os/archdep.c
@@ -193,7 +193,7 @@ fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx)
#if defined(__amd64)
bcopy(fp, fx, sizeof (*fx));
#else
- const struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
+ const struct _fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
fx->fx_mxcsr = fc->mxcsr;
@@ -214,7 +214,7 @@ fxsave_to_fpregset(const struct fxsave_state *fx, fpregset_t *fp)
#if defined(__amd64)
bcopy(fx, fp, sizeof (*fx));
#else
- struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
+ struct _fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
fc->mxcsr = fx->fx_mxcsr;
diff --git a/usr/src/uts/intel/ia32/os/fpu.c b/usr/src/uts/intel/ia32/os/fpu.c
index b7022cf0e5..dc3e286ad5 100644
--- a/usr/src/uts/intel/ia32/os/fpu.c
+++ b/usr/src/uts/intel/ia32/os/fpu.c
@@ -416,7 +416,7 @@ fpnoextflt(struct regs *rp)
ASSERT(sizeof (struct xsave_state) >= AVX_XSAVE_SIZE);
#if defined(__i386)
- ASSERT(sizeof (struct fpu) == sizeof (struct __old_fpu));
+ ASSERT(sizeof (struct _fpu) == sizeof (struct __old_fpu));
#endif /* __i386 */
#endif /* !__lint */
diff --git a/usr/src/uts/intel/sys/Makefile b/usr/src/uts/intel/sys/Makefile
index 192ada41a5..5cfbdec4fc 100644
--- a/usr/src/uts/intel/sys/Makefile
+++ b/usr/src/uts/intel/sys/Makefile
@@ -56,6 +56,7 @@ HDRS = \
mc_intel.h \
mca_amd.h \
mca_x86.h \
+ mcontext.h \
mutex_impl.h \
obpdefs.h \
old_procfs.h \
diff --git a/usr/src/uts/intel/sys/fp.h b/usr/src/uts/intel/sys/fp.h
index 4956e2d318..3373484dec 100644
--- a/usr/src/uts/intel/sys/fp.h
+++ b/usr/src/uts/intel/sys/fp.h
@@ -19,6 +19,8 @@
* CDDL HEADER END
*/
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
*/
@@ -168,6 +170,91 @@ extern "C" {
"\20\20fz\17ru\16rd\15pm\14um\13om\12zm\11dm" \
"\10im\7daz\6pe\5ue\4oe\3ze\2de\1ie"
+/*
+ * This structure is written to memory by an 'fnsave' instruction
+ */
+struct fnsave_state {
+ uint16_t f_fcw;
+ uint16_t __f_ign0;
+ uint16_t f_fsw;
+ uint16_t __f_ign1;
+ uint16_t f_ftw;
+ uint16_t __f_ign2;
+ uint32_t f_eip;
+ uint16_t f_cs;
+ uint16_t f_fop;
+ uint32_t f_dp;
+ uint16_t f_ds;
+ uint16_t __f_ign3;
+ union {
+ uint16_t fpr_16[5]; /* 80-bits of x87 state */
+ } f_st[8];
+}; /* 108 bytes */
+
+/*
+ * This structure is written to memory by an 'fxsave' instruction
+ * Note the variant behaviour of this instruction between long mode
+ * and legacy environments!
+ */
+struct fxsave_state {
+ uint16_t fx_fcw;
+ uint16_t fx_fsw;
+ uint16_t fx_fctw; /* compressed tag word */
+ uint16_t fx_fop;
+#if defined(__amd64)
+ uint64_t fx_rip;
+ uint64_t fx_rdp;
+#else
+ uint32_t fx_eip;
+ uint16_t fx_cs;
+ uint16_t __fx_ign0;
+ uint32_t fx_dp;
+ uint16_t fx_ds;
+ uint16_t __fx_ign1;
+#endif
+ uint32_t fx_mxcsr;
+ uint32_t fx_mxcsr_mask;
+ union {
+ uint16_t fpr_16[5]; /* 80-bits of x87 state */
+ u_longlong_t fpr_mmx; /* 64-bit mmx register */
+ uint32_t __fpr_pad[4]; /* (pad out to 128-bits) */
+ } fx_st[8];
+#if defined(__amd64)
+ upad128_t fx_xmm[16]; /* 128-bit registers */
+ upad128_t __fx_ign2[6];
+#else
+ upad128_t fx_xmm[8]; /* 128-bit registers */
+ upad128_t __fx_ign2[14];
+#endif
+}; /* 512 bytes */
+
+/*
+ * This structure is written to memory by an 'xsave' instruction.
+ * First 512 byte is compatible with the format of an 'fxsave' area.
+ */
+struct xsave_state {
+ struct fxsave_state xs_fxsave;
+ uint64_t xs_xstate_bv; /* 512 */
+ uint64_t xs_rsv_mbz[2];
+ uint64_t xs_reserved[5];
+ upad128_t xs_ymm[16]; /* avx - 576 */
+}; /* 832 bytes, asserted in fpnoextflt() */
+
+/*
+ * Kernel's FPU save area
+ */
+typedef struct {
+ union _kfpu_u {
+ struct fxsave_state kfpu_fx;
+#if defined(__i386)
+ struct fnsave_state kfpu_fn;
+#endif
+ struct xsave_state kfpu_xs;
+ } kfpu_u;
+ uint32_t kfpu_status; /* saved at #mf exception */
+ uint32_t kfpu_xstatus; /* saved at #xm exception */
+} kfpu_t;
+
extern int fp_kind; /* kind of fp support */
extern int fp_save_mech; /* fp save/restore mechanism */
extern int fpu_exists; /* FPU hw exists */
@@ -188,9 +275,6 @@ extern void fpxsave_ctxt(void *);
extern void xsave_ctxt(void *);
extern void (*fpsave_ctxt)(void *);
-struct fnsave_state;
-struct fxsave_state;
-struct xsave_state;
extern void fxsave_insn(struct fxsave_state *);
extern void fpsave(struct fnsave_state *);
extern void fprestore(struct fnsave_state *);
diff --git a/usr/src/uts/intel/sys/mcontext.h b/usr/src/uts/intel/sys/mcontext.h
new file mode 100644
index 0000000000..23d0aba364
--- /dev/null
+++ b/usr/src/uts/intel/sys/mcontext.h
@@ -0,0 +1,191 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
+ * Copyright (c) 1989, 2010, Oracle and/or its affiliates. All rights reserved.
+ */
+/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
+
+/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
+/* All Rights Reserved */
+
+/*
+ * Essential struct definitions for mcontext_t needed by ucontext.h
+ * These were formerly in regset.h, which now includes this file.
+ */
+
+#ifndef _SYS_MCONTEXT_H
+#define _SYS_MCONTEXT_H
+
+#include <sys/feature_tests.h>
+
+#if !defined(_ASM)
+#include <sys/types.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * A gregset_t is defined as an array type for compatibility with the reference
+ * source. This is important due to differences in the way the C language
+ * treats arrays and structures as parameters.
+ */
+#if defined(__amd64)
+#define _NGREG 28
+#else
+#define _NGREG 19
+#endif
+
+#if !defined(_ASM)
+
+#if defined(_LP64) || defined(_I32LPx)
+typedef long greg_t;
+#else
+typedef int greg_t;
+#endif
+
+#if defined(_SYSCALL32)
+
+typedef int32_t greg32_t;
+typedef int64_t greg64_t;
+
+#endif /* _SYSCALL32 */
+
+typedef greg_t gregset_t[_NGREG];
+
+#if defined(_SYSCALL32)
+
+#define _NGREG32 19
+#define _NGREG64 28
+
+typedef greg32_t gregset32_t[_NGREG32];
+typedef greg64_t gregset64_t[_NGREG64];
+
+#endif /* _SYSCALL32 */
+
+/*
+ * Floating point definitions.
+ */
+
+#if defined(__amd64)
+
+typedef struct _fpu {
+ union {
+ struct _fpchip_state {
+ uint16_t cw;
+ uint16_t sw;
+ uint8_t fctw;
+ uint8_t __fx_rsvd;
+ uint16_t fop;
+ uint64_t rip;
+ uint64_t rdp;
+ uint32_t mxcsr;
+ uint32_t mxcsr_mask;
+ union {
+ uint16_t fpr_16[5];
+ upad128_t __fpr_pad;
+ } st[8];
+ upad128_t xmm[16];
+ upad128_t __fx_ign2[6];
+ uint32_t status; /* sw at exception */
+ uint32_t xstatus; /* mxcsr at exception */
+ } fpchip_state;
+ uint32_t f_fpregs[130];
+ } fp_reg_set;
+} fpregset_t;
+
+#else /* __i386 */
+
+/*
+ * This definition of the floating point structure is binary
+ * compatible with the Intel386 psABI definition, and source
+ * compatible with that specification for x87-style floating point.
+ * It also allows SSE/SSE2 state to be accessed on machines that
+ * possess such hardware capabilities.
+ */
+typedef struct _fpu {
+ union {
+ struct _fpchip_state {
+ uint32_t state[27]; /* 287/387 saved state */
+ uint32_t status; /* saved at exception */
+ uint32_t mxcsr; /* SSE control and status */
+ uint32_t xstatus; /* SSE mxcsr at exception */
+ uint32_t __pad[2]; /* align to 128-bits */
+ upad128_t xmm[8]; /* %xmm0-%xmm7 */
+ } fpchip_state;
+ struct _fp_emul_space { /* for emulator(s) */
+ uint8_t fp_emul[246];
+ uint8_t fp_epad[2];
+ } fp_emul_space;
+ uint32_t f_fpregs[95]; /* union of the above */
+ } fp_reg_set;
+} fpregset_t;
+
+#endif /* __i386 */
+
+#if defined(_SYSCALL32)
+
+/* Kernel view of user i386 fpu structure */
+
+typedef struct fpu32 {
+ union {
+ struct fpchip32_state {
+ uint32_t state[27]; /* 287/387 saved state */
+ uint32_t status; /* saved at exception */
+ uint32_t mxcsr; /* SSE control and status */
+ uint32_t xstatus; /* SSE mxcsr at exception */
+ uint32_t __pad[2]; /* align to 128-bits */
+ uint32_t xmm[8][4]; /* %xmm0-%xmm7 */
+ } fpchip_state;
+ uint32_t f_fpregs[95]; /* union of the above */
+ } fp_reg_set;
+} fpregset32_t;
+
+#endif /* _SYSCALL32 */
+
+/*
+ * Structure mcontext defines the complete hardware machine state.
+ * (This structure is specified in the i386 ABI suppl.)
+ */
+typedef struct {
+ gregset_t gregs; /* general register set */
+ fpregset_t fpregs; /* floating point register set */
+} mcontext_t;
+
+#if defined(_SYSCALL32)
+
+typedef struct {
+ gregset32_t gregs; /* general register set */
+ fpregset32_t fpregs; /* floating point register set */
+} mcontext32_t;
+
+#endif /* _SYSCALL32 */
+
+#endif /* _ASM */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYS_MCONTEXT_H */
diff --git a/usr/src/uts/intel/sys/pcb.h b/usr/src/uts/intel/sys/pcb.h
index 3a690bd980..defd116eba 100644
--- a/usr/src/uts/intel/sys/pcb.h
+++ b/usr/src/uts/intel/sys/pcb.h
@@ -28,6 +28,9 @@
#include <sys/regset.h>
#include <sys/segments.h>
+#ifndef _ASM
+#include <sys/fp.h> /* kfpu_t */
+#endif
#ifdef __cplusplus
extern "C" {
diff --git a/usr/src/uts/intel/sys/procfs_isa.h b/usr/src/uts/intel/sys/procfs_isa.h
index b7a6cc3582..5af0386d9b 100644
--- a/usr/src/uts/intel/sys/procfs_isa.h
+++ b/usr/src/uts/intel/sys/procfs_isa.h
@@ -27,8 +27,6 @@
#ifndef _SYS_PROCFS_ISA_H
#define _SYS_PROCFS_ISA_H
-#pragma ident "%Z%%M% %I% %E% SMI"
-
/*
* Instruction Set Architecture specific component of <sys/procfs.h>
* i386 version
@@ -69,7 +67,7 @@ typedef uchar_t instr_t;
#define NPRGREG _NGREG
#define prgreg_t greg_t
#define prgregset_t gregset_t
-#define prfpregset fpu
+#define prfpregset _fpu
#define prfpregset_t fpregset_t
#if defined(_SYSCALL32)
@@ -87,7 +85,7 @@ typedef uchar_t instr32_t;
#define NPRGREG32 _NGREG
#define prgreg32_t greg_t
#define prgregset32_t gregset_t
-#define prfpregset32 fpu
+#define prfpregset32 _fpu
#define prfpregset32_t fpregset_t
#endif
#endif /* _SYSCALL32 */
diff --git a/usr/src/uts/intel/sys/regset.h b/usr/src/uts/intel/sys/regset.h
index 5436ae0be3..12b8f9e888 100644
--- a/usr/src/uts/intel/sys/regset.h
+++ b/usr/src/uts/intel/sys/regset.h
@@ -19,6 +19,8 @@
* CDDL HEADER END
*/
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright (c) 1989, 2010, Oracle and/or its affiliates. All rights reserved.
*/
/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
@@ -34,13 +36,12 @@
#if !defined(_ASM)
#include <sys/types.h>
#endif
+#include <sys/mcontext.h>
#ifdef __cplusplus
extern "C" {
#endif
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
-
/*
* The names and offsets defined here should be specified by the
* AMD64 ABI suppl.
@@ -134,181 +135,16 @@ extern "C" {
#endif /* __i386 */
-#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
-
-/*
- * A gregset_t is defined as an array type for compatibility with the reference
- * source. This is important due to differences in the way the C language
- * treats arrays and structures as parameters.
- */
-#if defined(__amd64)
-#define _NGREG 28
-#else
-#define _NGREG 19
-#endif
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
#define NGREG _NGREG
-#endif
#if !defined(_ASM)
-#if defined(_LP64) || defined(_I32LPx)
-typedef long greg_t;
-#else
-typedef int greg_t;
-#endif
-
-#if defined(_SYSCALL32)
-
-typedef int32_t greg32_t;
-typedef int64_t greg64_t;
-
-#endif /* _SYSCALL32 */
-
-typedef greg_t gregset_t[_NGREG];
-
-#if defined(_SYSCALL32)
-
-#define _NGREG32 19
-#define _NGREG64 28
-
-typedef greg32_t gregset32_t[_NGREG32];
-typedef greg64_t gregset64_t[_NGREG64];
-
-#endif /* _SYSCALL32 */
-
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
-
-/*
- * Floating point definitions.
- */
-
-/*
- * This structure is written to memory by an 'fnsave' instruction
- */
-struct fnsave_state {
- uint16_t f_fcw;
- uint16_t __f_ign0;
- uint16_t f_fsw;
- uint16_t __f_ign1;
- uint16_t f_ftw;
- uint16_t __f_ign2;
- uint32_t f_eip;
- uint16_t f_cs;
- uint16_t f_fop;
- uint32_t f_dp;
- uint16_t f_ds;
- uint16_t __f_ign3;
- union {
- uint16_t fpr_16[5]; /* 80-bits of x87 state */
- } f_st[8];
-}; /* 108 bytes */
-
-/*
- * This structure is written to memory by an 'fxsave' instruction
- * Note the variant behaviour of this instruction between long mode
- * and legacy environments!
- */
-struct fxsave_state {
- uint16_t fx_fcw;
- uint16_t fx_fsw;
- uint16_t fx_fctw; /* compressed tag word */
- uint16_t fx_fop;
-#if defined(__amd64)
- uint64_t fx_rip;
- uint64_t fx_rdp;
-#else
- uint32_t fx_eip;
- uint16_t fx_cs;
- uint16_t __fx_ign0;
- uint32_t fx_dp;
- uint16_t fx_ds;
- uint16_t __fx_ign1;
-#endif
- uint32_t fx_mxcsr;
- uint32_t fx_mxcsr_mask;
- union {
- uint16_t fpr_16[5]; /* 80-bits of x87 state */
- u_longlong_t fpr_mmx; /* 64-bit mmx register */
- uint32_t __fpr_pad[4]; /* (pad out to 128-bits) */
- } fx_st[8];
-#if defined(__amd64)
- upad128_t fx_xmm[16]; /* 128-bit registers */
- upad128_t __fx_ign2[6];
-#else
- upad128_t fx_xmm[8]; /* 128-bit registers */
- upad128_t __fx_ign2[14];
-#endif
-}; /* 512 bytes */
-
-/*
- * This structure is written to memory by an 'xsave' instruction.
- * First 512 byte is compatible with the format of an 'fxsave' area.
- */
-struct xsave_state {
- struct fxsave_state xs_fxsave;
- uint64_t xs_xstate_bv; /* 512 */
- uint64_t xs_rsv_mbz[2];
- uint64_t xs_reserved[5];
- upad128_t xs_ymm[16]; /* avx - 576 */
-}; /* 832 bytes, asserted in fpnoextflt() */
-
-#if defined(__amd64)
-
-typedef struct fpu {
- union {
- struct fpchip_state {
- uint16_t cw;
- uint16_t sw;
- uint8_t fctw;
- uint8_t __fx_rsvd;
- uint16_t fop;
- uint64_t rip;
- uint64_t rdp;
- uint32_t mxcsr;
- uint32_t mxcsr_mask;
- union {
- uint16_t fpr_16[5];
- upad128_t __fpr_pad;
- } st[8];
- upad128_t xmm[16];
- upad128_t __fx_ign2[6];
- uint32_t status; /* sw at exception */
- uint32_t xstatus; /* mxcsr at exception */
- } fpchip_state;
- uint32_t f_fpregs[130];
- } fp_reg_set;
-} fpregset_t;
-
-#else /* __i386 */
-
-/*
- * This definition of the floating point structure is binary
- * compatible with the Intel386 psABI definition, and source
- * compatible with that specification for x87-style floating point.
- * It also allows SSE/SSE2 state to be accessed on machines that
- * possess such hardware capabilities.
- */
-typedef struct fpu {
- union {
- struct fpchip_state {
- uint32_t state[27]; /* 287/387 saved state */
- uint32_t status; /* saved at exception */
- uint32_t mxcsr; /* SSE control and status */
- uint32_t xstatus; /* SSE mxcsr at exception */
- uint32_t __pad[2]; /* align to 128-bits */
- upad128_t xmm[8]; /* %xmm0-%xmm7 */
- } fpchip_state;
- struct fp_emul_space { /* for emulator(s) */
- uint8_t fp_emul[246];
- uint8_t fp_epad[2];
- } fp_emul_space;
- uint32_t f_fpregs[95]; /* union of the above */
- } fp_reg_set;
-} fpregset_t;
-
+#ifdef __i386
/*
* (This structure definition is specified in the i386 ABI supplement)
+ * It's likely we can just get rid of the struct __old_fpu or maybe
+ * move it to $SRC/uts/intel/ia32/os/fpu.c which appears to be the
+ * only place that uses it. See: www.illumos.org/issues/6284
*/
typedef struct __old_fpu {
union {
@@ -327,74 +163,19 @@ typedef struct __old_fpu {
} fp_reg_set;
long f_wregs[33]; /* saved weitek state */
} __old_fpregset_t;
-
#endif /* __i386 */
-#if defined(_SYSCALL32)
-
-/* Kernel view of user i386 fpu structure */
-
-typedef struct fpu32 {
- union {
- struct fpchip32_state {
- uint32_t state[27]; /* 287/387 saved state */
- uint32_t status; /* saved at exception */
- uint32_t mxcsr; /* SSE control and status */
- uint32_t xstatus; /* SSE mxcsr at exception */
- uint32_t __pad[2]; /* align to 128-bits */
- uint32_t xmm[8][4]; /* %xmm0-%xmm7 */
- } fpchip_state;
- uint32_t f_fpregs[95]; /* union of the above */
- } fp_reg_set;
-} fpregset32_t;
-
-#endif /* _SYSCALL32 */
-
-/*
- * Kernel's FPU save area
- */
-typedef struct {
- union _kfpu_u {
- struct fxsave_state kfpu_fx;
-#if defined(__i386)
- struct fnsave_state kfpu_fn;
-#endif
- struct xsave_state kfpu_xs;
- } kfpu_u;
- uint32_t kfpu_status; /* saved at #mf exception */
- uint32_t kfpu_xstatus; /* saved at #xm exception */
-} kfpu_t;
-
#if defined(__amd64)
-#define NDEBUGREG 16
+#define _NDEBUGREG 16
#else
-#define NDEBUGREG 8
+#define _NDEBUGREG 8
#endif
typedef struct dbregset {
- unsigned long debugreg[NDEBUGREG];
+ unsigned long debugreg[_NDEBUGREG];
} dbregset_t;
-/*
- * Structure mcontext defines the complete hardware machine state.
- * (This structure is specified in the i386 ABI suppl.)
- */
-typedef struct {
- gregset_t gregs; /* general register set */
- fpregset_t fpregs; /* floating point register set */
-} mcontext_t;
-
-#if defined(_SYSCALL32)
-
-typedef struct {
- gregset32_t gregs; /* general register set */
- fpregset32_t fpregs; /* floating point register set */
-} mcontext32_t;
-
-#endif /* _SYSCALL32 */
-
#endif /* _ASM */
-#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
/*
* The version of privregs.h that is used on implementations that run on
@@ -420,80 +201,6 @@ typedef struct {
#include <sys/privregs.h>
#endif /* __i386 (!_KERNEL && !_XPG4_2 || __EXTENSIONS__) */
-/*
- * The following is here for XPG4.2 standards compliance.
- * regset.h is included in ucontext.h for the definition of
- * mcontext_t, all of which breaks XPG4.2 namespace.
- */
-
-#if defined(_XPG4_2) && !defined(__EXTENSIONS__) && !defined(_ASM)
-
-/*
- * The following is here for UNIX 95 compliance (XPG Issue 4, Version 2
- * System Interfaces and Headers). The structures included here are identical
- * to those visible elsewhere in this header except that the structure
- * element names have been changed in accordance with the X/Open namespace
- * rules. Specifically, depending on the name and scope, the names have
- * been prepended with a single or double underscore (_ or __). See the
- * structure definitions in the non-X/Open namespace for more detailed
- * comments describing each of these structures.
- */
-
-#if defined(__amd64)
-
-typedef struct __fpu {
- union {
- struct __fpchip_state {
- uint16_t __fx_cw;
- uint16_t __fx_sw;
- uint16_t __fx_ctw;
- uint16_t __fx_op;
- uint64_t __fx_rip;
- uint64_t __fx_rdp;
- uint32_t __fx_mxcsr;
- uint32_t __fx_mxcsr_mask;
- union {
- uint16_t __fpr_16[5];
- upad128_t __fpr_pad;
- } __fx_st[8];
- upad128_t __fx_xmm[16];
- upad128_t __fx_ign2[6];
- uint32_t __status;
- uint32_t __xstatus;
- } __fpchip_state;
- uint32_t __f_fpregs[130];
- } __fp_reg_set;
-} fpregset_t;
-
-#else /* __i386 */
-
-typedef struct __fpu {
- union {
- struct __fpchip_state {
- uint32_t __state[27]; /* 287/387 saved state */
- uint32_t __status; /* saved at exception */
- uint32_t __mxcsr; /* SSE control and status */
- uint32_t __xstatus; /* SSE mxcsr at exception */
- uint32_t __pad[2]; /* align to 128-bits */
- upad128_t __xmm[8]; /* %xmm0-%xmm7 */
- } __fpchip_state;
- struct __fp_emul_space { /* for emulator(s) */
- uint8_t __fp_emul[246];
- uint8_t __fp_epad[2];
- } __fp_emul_space;
- uint32_t __f_fpregs[95]; /* union of the above */
- } __fp_reg_set;
-} fpregset_t;
-
-#endif /* __i386 */
-
-typedef struct {
- gregset_t __gregs; /* general register set */
- fpregset_t __fpregs; /* floating point register set */
-} mcontext_t;
-
-#endif /* _XPG4_2 && !__EXTENSIONS__ && !_ASM */
-
#ifdef __cplusplus
}
#endif
diff --git a/usr/src/uts/intel/sys/ucontext.h b/usr/src/uts/intel/sys/ucontext.h
index acd6ddc99e..5f64fa9393 100644
--- a/usr/src/uts/intel/sys/ucontext.h
+++ b/usr/src/uts/intel/sys/ucontext.h
@@ -20,6 +20,8 @@
*/
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -33,7 +35,7 @@
#include <sys/feature_tests.h>
#include <sys/types.h>
-#include <sys/regset.h>
+#include <sys/mcontext.h>
#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
#include <sys/signal.h>
#endif
diff --git a/usr/src/uts/sparc/fpu/fpu_simulator.c b/usr/src/uts/sparc/fpu/fpu_simulator.c
index aeafdc515d..7a5a7adc73 100644
--- a/usr/src/uts/sparc/fpu/fpu_simulator.c
+++ b/usr/src/uts/sparc/fpu/fpu_simulator.c
@@ -35,6 +35,7 @@
#include <sys/cpuvar.h>
#include <sys/cmn_err.h>
#include <sys/atomic.h>
+#include <sys/regset.h>
#include <sys/privregs.h>
#include <sys/vis_simulator.h>
diff --git a/usr/src/uts/sparc/sys/Makefile b/usr/src/uts/sparc/sys/Makefile
index 1ae69ac3cc..975639fa06 100644
--- a/usr/src/uts/sparc/sys/Makefile
+++ b/usr/src/uts/sparc/sys/Makefile
@@ -22,8 +22,6 @@
# Copyright 2008 Sun Microsystems, Inc. All rights reserved.
# Use is subject to license terms.
#
-#ident "%Z%%M% %I% %E% SMI"
-#
include ../../../Makefile.master
@@ -41,6 +39,7 @@ HDRS= \
machlock.h \
machsig.h \
machtypes.h \
+ mcontext.h \
old_procfs.h \
pcb.h \
procfs_isa.h \
diff --git a/usr/src/uts/sparc/sys/fpu/fpu_simulator.h b/usr/src/uts/sparc/sys/fpu/fpu_simulator.h
index 4d83a2c795..0087877f55 100644
--- a/usr/src/uts/sparc/sys/fpu/fpu_simulator.h
+++ b/usr/src/uts/sparc/sys/fpu/fpu_simulator.h
@@ -455,7 +455,7 @@ extern enum ftt_type fp_emulator(
fp_inst_type *pinst, /* Pointer to FPU instruction to simulate. */
struct regs *pregs, /* Pointer to PCB image of registers. */
struct rwindow *pwindow, /* Pointer to locals and ins. */
- struct fpu *pfpu); /* Pointer to FPU register block. */
+ struct _fpu *pfpu); /* Pointer to FPU register block. */
/*
* fp_traps handles passing exception conditions to the kernel.
diff --git a/usr/src/uts/sparc/sys/fpu/fpusystm.h b/usr/src/uts/sparc/sys/fpu/fpusystm.h
index 6b013aa52d..cf178fa87f 100644
--- a/usr/src/uts/sparc/sys/fpu/fpusystm.h
+++ b/usr/src/uts/sparc/sys/fpu/fpusystm.h
@@ -27,8 +27,6 @@
#ifndef _SYS_FPU_FPUSYSTM_H
#define _SYS_FPU_FPUSYSTM_H
-#pragma ident "%Z%%M% %I% %E% SMI"
-
/*
* ISA-dependent FPU interfaces
*/
@@ -39,7 +37,7 @@ extern "C" {
#ifdef _KERNEL
-struct fpu;
+struct _fpu;
struct regs;
#if !defined(DEBUG) && !defined(NEED_FPU_EXISTS)
diff --git a/usr/src/uts/sparc/sys/mcontext.h b/usr/src/uts/sparc/sys/mcontext.h
new file mode 100644
index 0000000000..f35d0c1d22
--- /dev/null
+++ b/usr/src/uts/sparc/sys/mcontext.h
@@ -0,0 +1,304 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
+/* All Rights Reserved */
+
+
+/*
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
+ * Use is subject to license terms.
+ *
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ */
+
+/*
+ * Essential struct definitions for mcontext_t needed by ucontext.h
+ * These were formerly in regset.h, which now includes this file.
+ */
+
+#ifndef _SYS_MCONTEXT_H
+#define _SYS_MCONTEXT_H
+
+#include <sys/feature_tests.h>
+
+#if !defined(_ASM)
+#include <sys/int_types.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * A gregset_t is defined as an array type for compatibility with the reference
+ * source. This is important due to differences in the way the C language
+ * treats arrays and structures as parameters.
+ *
+ * Note that NGREG is really (sizeof (struct regs) / sizeof (greg_t)),
+ * but that the SPARC V8 ABI defines it absolutely to be 19.
+ */
+#if defined(__sparcv9)
+#define _NGREG 21
+#else /* __sparcv9 */
+#define _NGREG 19
+#endif /* __sparcv9 */
+
+#ifndef _ASM
+
+#if defined(_LP64) || defined(_I32LPx)
+typedef long greg_t;
+#else
+typedef int greg_t;
+#endif
+
+#if defined(_SYSCALL32)
+
+typedef int32_t greg32_t;
+typedef int64_t greg64_t;
+
+#endif /* _SYSCALL32 */
+
+typedef greg_t gregset_t[_NGREG];
+
+#if defined(_SYSCALL32)
+
+#define _NGREG32 19
+#define _NGREG64 21
+
+typedef greg32_t gregset32_t[_NGREG32];
+typedef greg64_t gregset64_t[_NGREG64];
+
+#endif /* _SYSCALL32 */
+
+/*
+ * Floating point definitions.
+ */
+
+#define _MAXFPQ 16 /* max # of fpu queue entries currently supported */
+
+/*
+ * struct _fq defines the minimal format of a floating point instruction queue
+ * entry. The size of entries in the floating point queue are implementation
+ * dependent. The union FQu is guarenteed to be the first field in any ABI
+ * conformant system implementation. Any additional fields provided by an
+ * implementation should not be used applications designed to be ABI conformant.
+ */
+
+struct _fpq {
+ unsigned int *fpq_addr; /* address */
+ unsigned int fpq_instr; /* instruction */
+};
+
+struct _fq {
+ union { /* FPU inst/addr queue */
+ double whole;
+ struct _fpq fpq;
+ } FQu;
+};
+
+#if defined(_SYSCALL32)
+
+struct fpq32 {
+ caddr32_t fpq_addr; /* address */
+ uint32_t fpq_instr; /* instruction */
+};
+
+struct fq32 {
+ union { /* FPU inst/addr queue */
+ double whole;
+ struct fpq32 fpq;
+ } FQu;
+};
+
+#endif /* _SYSCALL32 */
+
+/*
+ * struct fpu is the floating point processor state. struct fpu is the sum
+ * total of all possible floating point state which includes the state of
+ * external floating point hardware, fpa registers, etc..., if it exists.
+ *
+ * A floating point instuction queue may or may not be associated with
+ * the floating point processor state. If a queue does exist, the field
+ * fpu_q will point to an array of fpu_qcnt entries where each entry is
+ * fpu_q_entrysize long. fpu_q_entry has a lower bound of sizeof (union FQu)
+ * and no upper bound. If no floating point queue entries are associated
+ * with the processor state, fpu_qcnt will be zeo and fpu_q will be NULL.
+ */
+
+#if defined(__sparcv9)
+
+struct _fpu {
+ union { /* FPU floating point regs */
+ uint32_t fpu_regs[32]; /* 32 singles */
+ double fpu_dregs[32]; /* 32 doubles */
+ long double fpu_qregs[16]; /* 16 quads */
+ } fpu_fr;
+ struct _fq *fpu_q; /* ptr to array of FQ entries */
+ uint64_t fpu_fsr; /* FPU status register */
+ uint8_t fpu_qcnt; /* # of entries in saved FQ */
+ uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
+ uint8_t fpu_en; /* flag specifying fpu in use */
+};
+
+#else /* __sparcv9 */
+
+struct _fpu {
+ union { /* FPU floating point regs */
+ uint32_t fpu_regs[32]; /* 32 singles */
+ double fpu_dregs[16]; /* 16 doubles */
+ } fpu_fr;
+ struct _fq *fpu_q; /* ptr to array of FQ entries */
+ uint32_t fpu_fsr; /* FPU status register */
+ uint8_t fpu_qcnt; /* # of entries in saved FQ */
+ uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
+ uint8_t fpu_en; /* flag signifying fpu in use */
+};
+
+#endif /* __sparcv9 */
+
+typedef struct _fpu fpregset_t;
+
+#if defined(_SYSCALL32)
+
+/* Kernel view of user sparcv7/v8 fpu structure */
+
+struct fpu32 {
+ union { /* FPU floating point regs */
+ uint32_t fpu_regs[32]; /* 32 singles */
+ double fpu_dregs[16]; /* 16 doubles */
+ } fpu_fr;
+ caddr32_t fpu_q; /* ptr to array of FQ entries */
+ uint32_t fpu_fsr; /* FPU status register */
+ uint8_t fpu_qcnt; /* # of entries in saved FQ */
+ uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
+ uint8_t fpu_en; /* flag signifying fpu in use */
+};
+
+typedef struct fpu32 fpregset32_t;
+
+#endif /* _SYSCALL32 */
+
+#if defined(_KERNEL) || defined(_KMDB)
+/*
+ * The ABI uses struct fpu, so we use this to describe the kernel's view of the
+ * fpu.
+ */
+typedef struct {
+ union _fpu_fr { /* V9 FPU floating point regs */
+ uint32_t fpu_regs[32]; /* 32 singles */
+ uint64_t fpu_dregs[32]; /* 32 doubles */
+ long double fpu_qregs[16]; /* 16 quads */
+ } fpu_fr;
+ uint64_t fpu_fsr; /* FPU status register */
+ uint32_t fpu_fprs; /* fprs register */
+ struct _fq *fpu_q;
+ uint8_t fpu_qcnt;
+ uint8_t fpu_q_entrysize;
+ uint8_t fpu_en; /* flag signifying fpu in use */
+} kfpu_t;
+#endif /* _KERNEL || _KMDB */
+
+/*
+ * The following structure is for associating extra register state with
+ * the ucontext structure and is kept within the uc_mcontext filler area.
+ *
+ * If (xrs_id == XRS_ID) then the xrs_ptr field is a valid pointer to
+ * extra register state. The exact format of the extra register state
+ * pointed to by xrs_ptr is platform-dependent.
+ *
+ * Note: a platform may or may not manage extra register state.
+ */
+typedef struct {
+ unsigned int xrs_id; /* indicates xrs_ptr validity */
+ caddr_t xrs_ptr; /* ptr to extra reg state */
+} xrs_t;
+
+#define _XRS_ID 0x78727300 /* the string "xrs" */
+
+#if defined(_SYSCALL32)
+
+typedef struct {
+ uint32_t xrs_id; /* indicates xrs_ptr validity */
+ caddr32_t xrs_ptr; /* ptr to extra reg state */
+} xrs32_t;
+
+#endif /* _SYSCALL32 */
+
+#if defined(__sparcv9)
+
+/*
+ * Ancillary State Registers
+ *
+ * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31.
+ * ASRs 16 through 31 are available to user programs, though the meaning
+ * and content of these registers is implementation dependent.
+ */
+typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */
+
+#endif /* __sparcv9 */
+
+/*
+ * Structure mcontext defines the complete hardware machine state. If
+ * the field `gwins' is non NULL, it points to a save area for register
+ * window frames. If `gwins' is NULL, the register windows were saved
+ * on the user's stack.
+ *
+ * The filler of 21 longs is historical (now filler[19] plus the xrs_t
+ * field). The value was selected to provide binary compatibility with
+ * statically linked ICL binaries. It is in the ABI (do not change). It
+ * actually appears in the ABI as a single filler of 44 is in the field
+ * uc_filler of struct ucontext. It is split here so that ucontext.h can
+ * (hopefully) remain architecture independent.
+ *
+ * Note that 2 longs of the filler are used to hold extra register state info.
+ */
+typedef struct {
+ gregset_t gregs; /* general register set */
+ struct _gwindows *gwins; /* POSSIBLE pointer to register windows */
+ fpregset_t fpregs; /* floating point register set */
+ xrs_t xrs; /* POSSIBLE extra register state association */
+#if defined(__sparcv9)
+ asrset_t asrs; /* ancillary registers */
+ long filler[4]; /* room for expansion */
+#else /* __sparcv9 */
+ long filler[19];
+#endif /* __sparcv9 */
+} mcontext_t;
+
+#if defined(_SYSCALL32)
+
+typedef struct {
+ gregset32_t gregs; /* general register set */
+ caddr32_t gwins; /* POSSIBLE pointer to register windows */
+ fpregset32_t fpregs; /* floating point register set */
+ xrs32_t xrs; /* POSSIBLE extra register state association */
+ int32_t filler[19];
+} mcontext32_t;
+
+#endif /* _SYSCALL32 */
+
+#endif /* _ASM */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYS_MCONTEXT_H */
diff --git a/usr/src/uts/sparc/sys/procfs_isa.h b/usr/src/uts/sparc/sys/procfs_isa.h
index a1c98655b5..4c9ffec7c1 100644
--- a/usr/src/uts/sparc/sys/procfs_isa.h
+++ b/usr/src/uts/sparc/sys/procfs_isa.h
@@ -27,8 +27,6 @@
#ifndef _SYS_PROCFS_ISA_H
#define _SYS_PROCFS_ISA_H
-#pragma ident "%Z%%M% %I% %E% SMI"
-
/*
* Instruction Set Architecture specific component of <sys/procfs.h>
* sparc v8/v9 version
@@ -169,7 +167,7 @@ typedef struct prfpregset {
uint8_t pr_q_entrysize; /* # of bytes per FQ entry */
uint8_t pr_en; /* flag signifying fpu in use */
char pr_pad[13]; /* ensure sizeof(prfpregset)%16 == 0 */
- struct fq pr_q[16]; /* contains the FQ array */
+ struct _fq pr_q[16]; /* contains the FQ array */
} prfpregset_t;
#else
typedef struct prfpregset {
@@ -182,7 +180,7 @@ typedef struct prfpregset {
uint8_t pr_qcnt; /* # of entries in saved FQ */
uint8_t pr_q_entrysize; /* # of bytes per FQ entry */
uint8_t pr_en; /* flag signifying fpu in use */
- struct fq pr_q[32]; /* contains the FQ array */
+ struct _fq pr_q[32]; /* contains the FQ array */
} prfpregset_t;
#endif /* __sparcv9 */
diff --git a/usr/src/uts/sparc/sys/regset.h b/usr/src/uts/sparc/sys/regset.h
index 26e7119a38..cebf5939a3 100644
--- a/usr/src/uts/sparc/sys/regset.h
+++ b/usr/src/uts/sparc/sys/regset.h
@@ -23,6 +23,8 @@
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -30,13 +32,12 @@
#ifndef _SYS_REGSET_H
#define _SYS_REGSET_H
-#pragma ident "%Z%%M% %I% %E% SMI" /* SVr4.0 1.1 */
-
#include <sys/feature_tests.h>
#if !defined(_ASM)
#include <sys/int_types.h>
#endif
+#include <sys/mcontext.h>
#ifdef __cplusplus
extern "C" {
@@ -46,8 +47,6 @@ extern "C" {
* Location of the users' stored registers relative to R0.
* Usage is as an index into a gregset_t array or as u.u_ar0[XX].
*/
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
-
#if defined(__sparcv9)
#define REG_CCR (0)
#if defined(_SYSCALL32)
@@ -87,53 +86,12 @@ extern "C" {
#define REG_SP REG_O6
#define REG_R0 REG_O0
#define REG_R1 REG_O1
-#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
-
-/*
- * A gregset_t is defined as an array type for compatibility with the reference
- * source. This is important due to differences in the way the C language
- * treats arrays and structures as parameters.
- *
- * Note that NGREG is really (sizeof (struct regs) / sizeof (greg_t)),
- * but that the SPARC V8 ABI defines it absolutely to be 19.
- */
-#if defined(__sparcv9)
-#define _NGREG 21
-#else /* __sparcv9 */
-#define _NGREG 19
-#endif /* __sparcv9 */
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
-#define NGREG _NGREG
-#endif
#ifndef _ASM
-#if defined(_LP64) || defined(_I32LPx)
-typedef long greg_t;
-#else
-typedef int greg_t;
-#endif
-
-#if defined(_SYSCALL32)
-
-typedef int32_t greg32_t;
-typedef int64_t greg64_t;
-
-#endif /* _SYSCALL32 */
-
-typedef greg_t gregset_t[_NGREG];
-
-#if defined(_SYSCALL32)
-
-#define _NGREG32 19
-#define _NGREG64 21
-
-typedef greg32_t gregset32_t[_NGREG32];
-typedef greg64_t gregset64_t[_NGREG64];
-
-#endif /* _SYSCALL32 */
+#define NGREG _NGREG
+#define MAXFPQ _MAXFPQ
-#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
/*
* The following structures define how a register window can appear on the
* stack. This structure is available (when required) through the `gwins'
@@ -143,7 +101,7 @@ typedef greg64_t gregset64_t[_NGREG64];
*/
#define SPARC_MAXREGWINDOW 31 /* max windows in SPARC arch. */
-struct rwindow {
+struct rwindow {
greg_t rw_local[8]; /* locals */
greg_t rw_in[8]; /* ins */
};
@@ -170,7 +128,7 @@ extern void rwindow_32ton(struct rwindow32 *, struct rwindow *);
#define rw_fp rw_in[6] /* frame pointer */
#define rw_rtn rw_in[7] /* return address */
-typedef struct gwindows {
+typedef struct _gwindows {
int wbcnt;
greg_t *spbuf[SPARC_MAXREGWINDOW];
struct rwindow wbuf[SPARC_MAXREGWINDOW];
@@ -192,62 +150,6 @@ typedef struct gwindows64 {
#endif /* _SYSCALL32 */
-
-/*
- * Floating point definitions.
- */
-
-#define MAXFPQ 16 /* max # of fpu queue entries currently supported */
-
-/*
- * struct fq defines the minimal format of a floating point instruction queue
- * entry. The size of entries in the floating point queue are implementation
- * dependent. The union FQu is guarenteed to be the first field in any ABI
- * conformant system implementation. Any additional fields provided by an
- * implementation should not be used applications designed to be ABI conformant.
- */
-
-struct fpq {
- unsigned int *fpq_addr; /* address */
- unsigned int fpq_instr; /* instruction */
-};
-
-struct fq {
- union { /* FPU inst/addr queue */
- double whole;
- struct fpq fpq;
- } FQu;
-};
-
-#if defined(_SYSCALL32)
-
-struct fpq32 {
- caddr32_t fpq_addr; /* address */
- uint32_t fpq_instr; /* instruction */
-};
-
-struct fq32 {
- union { /* FPU inst/addr queue */
- double whole;
- struct fpq32 fpq;
- } FQu;
-};
-
-#endif /* _SYSCALL32 */
-
-/*
- * struct fpu is the floating point processor state. struct fpu is the sum
- * total of all possible floating point state which includes the state of
- * external floating point hardware, fpa registers, etc..., if it exists.
- *
- * A floating point instuction queue may or may not be associated with
- * the floating point processor state. If a queue does exist, the field
- * fpu_q will point to an array of fpu_qcnt entries where each entry is
- * fpu_q_entrysize long. fpu_q_entry has a lower bound of sizeof (union FQu)
- * and no upper bound. If no floating point queue entries are associated
- * with the processor state, fpu_qcnt will be zeo and fpu_q will be NULL.
- */
-
/*
* The following #define's are obsolete and may be removed in a future release.
* The corresponding integer types should be used instead (i.e. uint64_t).
@@ -258,160 +160,9 @@ struct fq32 {
#define V9_FPU_FSR_TYPE uint64_t
#define V9_FPU_FPRS_TYPE uint32_t
-#if defined(__sparcv9)
-
-struct fpu {
- union { /* FPU floating point regs */
- uint32_t fpu_regs[32]; /* 32 singles */
- double fpu_dregs[32]; /* 32 doubles */
- long double fpu_qregs[16]; /* 16 quads */
- } fpu_fr;
- struct fq *fpu_q; /* ptr to array of FQ entries */
- uint64_t fpu_fsr; /* FPU status register */
- uint8_t fpu_qcnt; /* # of entries in saved FQ */
- uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
- uint8_t fpu_en; /* flag specifying fpu in use */
-};
-
-#else /* __sparcv9 */
-
-struct fpu {
- union { /* FPU floating point regs */
- uint32_t fpu_regs[32]; /* 32 singles */
- double fpu_dregs[16]; /* 16 doubles */
- } fpu_fr;
- struct fq *fpu_q; /* ptr to array of FQ entries */
- uint32_t fpu_fsr; /* FPU status register */
- uint8_t fpu_qcnt; /* # of entries in saved FQ */
- uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
- uint8_t fpu_en; /* flag signifying fpu in use */
-};
-
-#endif /* __sparcv9 */
-
-typedef struct fpu fpregset_t;
-
-#if defined(_SYSCALL32)
-
-/* Kernel view of user sparcv7/v8 fpu structure */
-
-struct fpu32 {
- union { /* FPU floating point regs */
- uint32_t fpu_regs[32]; /* 32 singles */
- double fpu_dregs[16]; /* 16 doubles */
- } fpu_fr;
- caddr32_t fpu_q; /* ptr to array of FQ entries */
- uint32_t fpu_fsr; /* FPU status register */
- uint8_t fpu_qcnt; /* # of entries in saved FQ */
- uint8_t fpu_q_entrysize; /* # of bytes per FQ entry */
- uint8_t fpu_en; /* flag signifying fpu in use */
-};
-
-typedef struct fpu32 fpregset32_t;
-
-#endif /* _SYSCALL32 */
+#define XRS_ID _XRS_ID
-#if defined(_KERNEL) || defined(_KMDB)
-/*
- * The ABI uses struct fpu, so we use this to describe the kernel's view of the
- * fpu.
- */
-typedef struct {
- union _fpu_fr { /* V9 FPU floating point regs */
- uint32_t fpu_regs[32]; /* 32 singles */
- uint64_t fpu_dregs[32]; /* 32 doubles */
- long double fpu_qregs[16]; /* 16 quads */
- } fpu_fr;
- uint64_t fpu_fsr; /* FPU status register */
- uint32_t fpu_fprs; /* fprs register */
- struct fq *fpu_q;
- uint8_t fpu_qcnt;
- uint8_t fpu_q_entrysize;
- uint8_t fpu_en; /* flag signifying fpu in use */
-} kfpu_t;
-#endif /* _KERNEL || _KMDB */
-
-/*
- * The following structure is for associating extra register state with
- * the ucontext structure and is kept within the uc_mcontext filler area.
- *
- * If (xrs_id == XRS_ID) then the xrs_ptr field is a valid pointer to
- * extra register state. The exact format of the extra register state
- * pointed to by xrs_ptr is platform-dependent.
- *
- * Note: a platform may or may not manage extra register state.
- */
-typedef struct {
- unsigned int xrs_id; /* indicates xrs_ptr validity */
- caddr_t xrs_ptr; /* ptr to extra reg state */
-} xrs_t;
-
-#define XRS_ID 0x78727300 /* the string "xrs" */
-
-#if defined(_SYSCALL32)
-
-typedef struct {
- uint32_t xrs_id; /* indicates xrs_ptr validity */
- caddr32_t xrs_ptr; /* ptr to extra reg state */
-} xrs32_t;
-
-#endif /* _SYSCALL32 */
-
-#if defined(__sparcv9)
-
-/*
- * Ancillary State Registers
- *
- * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31.
- * ASRs 16 through 31 are available to user programs, though the meaning
- * and content of these registers is implementation dependent.
- */
-typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */
-
-#endif /* __sparcv9 */
-
-/*
- * Structure mcontext defines the complete hardware machine state. If
- * the field `gwins' is non NULL, it points to a save area for register
- * window frames. If `gwins' is NULL, the register windows were saved
- * on the user's stack.
- *
- * The filler of 21 longs is historical (now filler[19] plus the xrs_t
- * field). The value was selected to provide binary compatibility with
- * statically linked ICL binaries. It is in the ABI (do not change). It
- * actually appears in the ABI as a single filler of 44 is in the field
- * uc_filler of struct ucontext. It is split here so that ucontext.h can
- * (hopefully) remain architecture independent.
- *
- * Note that 2 longs of the filler are used to hold extra register state info.
- */
-typedef struct {
- gregset_t gregs; /* general register set */
- gwindows_t *gwins; /* POSSIBLE pointer to register windows */
- fpregset_t fpregs; /* floating point register set */
- xrs_t xrs; /* POSSIBLE extra register state association */
-#if defined(__sparcv9)
- asrset_t asrs; /* ancillary registers */
- long filler[4]; /* room for expansion */
-#else /* __sparcv9 */
- long filler[19];
-#endif /* __sparcv9 */
-} mcontext_t;
-
-#if defined(_SYSCALL32)
-
-typedef struct {
- gregset32_t gregs; /* general register set */
- caddr32_t gwins; /* POSSIBLE pointer to register windows */
- fpregset32_t fpregs; /* floating point register set */
- xrs32_t xrs; /* POSSIBLE extra register state association */
- int32_t filler[19];
-} mcontext32_t;
-
-#endif /* _SYSCALL32 */
-
-#endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
-#endif /* _ASM */
+#endif /* !_ASM */
/*
* The version of privregs.h that is used on implementations that run
@@ -428,7 +179,7 @@ typedef struct {
* 'struct regs' to match the content of a 32-bit core file, or a ucontext_t.
*
* Note that the ucontext_t actually describes the general registers in
- * terms of the gregset_t data type, as described in this file. Note also
+ * terms of the gregset_t data type, as described in mcontex.h. Note also
* that the core file content is defined by core(4) in terms of data types
* defined by procfs -- see proc(4).
*/
@@ -438,164 +189,6 @@ typedef struct {
#endif /* !_KERNEL && !_XPG4_2 || __EXTENSIONS__ */
#endif /* __sparcv9 */
-/*
- * The following is here for XPG4.2 standards compliance.
- * regset.h is included in ucontext.h for the definition of
- * mcontext_t, all of which breaks XPG4.2 namespace.
- */
-
-#if defined(_XPG4_2) && !defined(__EXTENSIONS__)
-/*
- * The following is here for UNIX 95 compliance (XPG Issue 4, Version 2
- * System Interfaces and Headers. The structures included here are identical
- * to those visible elsewhere in this header except that the structure
- * element names have been changed in accordance with the X/Open namespace
- * rules. Specifically, depending on the name and scope, the names have
- * been prepended with a single or double underscore (_ or __). See the
- * structure definitions in the non-X/Open namespace for more detailed
- * comments describing each of these structures.
- */
-
-#ifndef _ASM
-
-/*
- * The following structures define how a register window can appear on the
- * stack.
- */
-#define _SPARC_MAXREGWINDOW 31 /* max windows in SPARC arch. */
-
-struct __rwindow {
- greg_t __rw_local[8]; /* locals */
- greg_t __rw_in[8]; /* ins */
-};
-
-#define __rw_fp __rw_in[6] /* frame pointer */
-#define __rw_rtn __rw_in[7] /* return address */
-
-struct __gwindows {
- int __wbcnt;
- greg_t *__spbuf[_SPARC_MAXREGWINDOW];
- struct __rwindow __wbuf[_SPARC_MAXREGWINDOW];
-};
-
-typedef struct __gwindows gwindows_t;
-
-/*
- * The fq structure defines the minimal format of a floating point
- * instruction queue entry.
- */
-
-struct __fpq {
- unsigned int *__fpq_addr; /* address */
- unsigned int __fpq_instr; /* instruction */
-};
-
-struct __fq {
- union { /* FPU inst/addr queue */
- double __whole;
- struct __fpq __fpq;
- } _FQu;
-};
-
-/*
- * The fpu structure is the floating point processor state.
- */
-
-/*
- * The following #define's are obsolete and may be removed in a future release.
- * The corresponding integer types should be used instead (i.e. uint64_t).
- */
-#define _FPU_REGS_TYPE uint32_t
-#define _FPU_DREGS_TYPE uint64_t
-#define _V7_FPU_FSR_TYPE uint32_t
-#define _V9_FPU_FSR_TYPE uint64_t
-#define _V9_FPU_FPRS_TYPE uint32_t
-
-#if defined(__sparcv9)
-
-/*
- * SPARC Version 9 floating point
- */
-
-struct __fpu {
- union { /* FPU floating point regs */
- uint32_t __fpu_regs[32]; /* 32 singles */
- double __fpu_dregs[32]; /* 32 doubles */
- long double __fpu_qregs[16]; /* 16 quads */
- } __fpu_fr;
- struct __fq *__fpu_q; /* ptr to array of FQ entries */
- uint64_t __fpu_fsr; /* FPU status register */
- uint8_t __fpu_qcnt; /* # of entries in saved FQ */
- uint8_t __fpu_q_entrysize; /* # of bytes per FQ entry */
- uint8_t __fpu_en; /* flag signifying fpu in use */
-};
-
-#else /* __sparcv9 */
-
-/*
- * SPARC Version 7 and 8 floating point
- */
-
-struct __fpu {
- union { /* FPU floating point regs */
- uint32_t __fpu_regs[32]; /* 32 singles */
- double __fpu_dregs[16]; /* 16 doubles */
- } __fpu_fr;
- struct __fq *__fpu_q; /* ptr to array of FQ entries */
- uint32_t __fpu_fsr; /* FPU status register */
- uint8_t __fpu_qcnt; /* # of entries in saved FQ */
- uint8_t __fpu_q_entrysize; /* # of bytes per FQ entry */
- uint8_t __fpu_en; /* flag signifying fpu in use */
-};
-
-#endif /* __sparcv9 */
-
-typedef struct __fpu fpregset_t;
-
-/*
- * The xrs_t structure is for associating extra register state with
- * the ucontext structure and is kept within the uc_mcontext filler area.
- */
-typedef struct {
- unsigned int __xrs_id; /* indicates xrs_ptr validity */
- caddr_t __xrs_ptr; /* ptr to extra reg state */
-} xrs_t;
-
-#define _XRS_ID 0x78727300 /* the string "xrs" */
-
-#if defined(__sparcv9)
-
-/*
- * Ancillary State Registers
- *
- * The SPARC V9 architecture defines 25 ASRs, numbered from 7 through 31.
- * ASRs 16 through 31 are available to user programs, though the meaning
- * and content of these registers is implementation dependent.
- */
-typedef int64_t asrset_t[16]; /* %asr16 - > %asr31 */
-
-#endif /* __sparcv9 */
-
-/*
- * Structure mcontext defines the complete hardware machine state.
- */
-typedef struct {
- gregset_t __gregs; /* general register set */
- gwindows_t *__gwins; /* POSSIBLE pointer to register windows */
- fpregset_t __fpregs; /* floating point register set */
- xrs_t __xrs; /* POSSIBLE extra register state association */
-#if defined(__sparcv9)
- asrset_t __asrs; /* ancillary registers */
- long __filler[4]; /* room for expansion */
-#else /* __sparcv9 */
- long __filler[19];
-#endif /* __sparcv9 */
-} mcontext_t;
-
-#endif /* _ASM */
-#endif /* defined(_XPG4_2) && !defined(__EXTENSIONS__) */
-
-
#ifdef __cplusplus
}
#endif
diff --git a/usr/src/uts/sparc/sys/ucontext.h b/usr/src/uts/sparc/sys/ucontext.h
index e0cfea55bd..35eff287af 100644
--- a/usr/src/uts/sparc/sys/ucontext.h
+++ b/usr/src/uts/sparc/sys/ucontext.h
@@ -20,6 +20,8 @@
*/
/*
+ * Copyright 2015 Nexenta Systems, Inc. All rights reserved.
+ *
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -33,7 +35,7 @@
#include <sys/feature_tests.h>
#include <sys/types.h>
-#include <sys/regset.h>
+#include <sys/mcontext.h>
#if !defined(_XPG4_2) || defined(__EXTENSIONS__)
#include <sys/signal.h>
#endif
@@ -105,7 +107,7 @@ typedef struct ucontext32 {
#ifdef _KERNEL
extern void ucontext_32ton(const ucontext32_t *, ucontext_t *,
- const struct fq32 *, struct fq *);
+ const struct fq32 *, struct _fq *);
extern void fpuregset_nto32(const fpregset_t *, fpregset32_t *, struct fq32 *);
#endif
diff --git a/usr/src/uts/sparc/syscall/getcontext.c b/usr/src/uts/sparc/syscall/getcontext.c
index 437eef5e1a..c9adb54b86 100644
--- a/usr/src/uts/sparc/syscall/getcontext.c
+++ b/usr/src/uts/sparc/syscall/getcontext.c
@@ -176,7 +176,7 @@ int
getsetcontext(int flag, void *arg)
{
ucontext_t uc;
- struct fq fpu_q[MAXFPQ]; /* to hold floating queue */
+ struct _fq fpu_q[MAXFPQ]; /* to hold floating queue */
fpregset_t *fpp;
gwindows_t *gwin = NULL; /* to hold windows */
caddr_t xregs = NULL;
@@ -214,7 +214,7 @@ getsetcontext(int flag, void *arg)
* a later setcontext(2).
*/
uc.uc_mcontext.fpregs.fpu_qcnt = 0;
- uc.uc_mcontext.fpregs.fpu_q = (struct fq *)NULL;
+ uc.uc_mcontext.fpregs.fpu_q = (struct _fq *)NULL;
if (copyout(&uc, arg, sizeof (ucontext_t)))
return (set_errno(EFAULT));
@@ -255,7 +255,7 @@ getsetcontext(int flag, void *arg)
if ((fpp->fpu_q) && (fpp->fpu_qcnt)) {
if (fpp->fpu_qcnt > MAXFPQ ||
fpp->fpu_q_entrysize <= 0 ||
- fpp->fpu_q_entrysize > sizeof (struct fq))
+ fpp->fpu_q_entrysize > sizeof (struct _fq))
return (set_errno(EINVAL));
if (copyin(fpp->fpu_q, fpu_q,
fpp->fpu_qcnt * fpp->fpu_q_entrysize))
@@ -424,7 +424,7 @@ getsetcontext32(int flag, void *arg)
{
ucontext32_t uc;
ucontext_t ucnat;
- struct fq fpu_qnat[MAXFPQ]; /* to hold "native" floating queue */
+ struct _fq fpu_qnat[MAXFPQ]; /* to hold "native" floating queue */
struct fq32 fpu_q[MAXFPQ]; /* to hold 32 bit floating queue */
fpregset32_t *fpp;
gwindows32_t *gwin = NULL; /* to hold windows */
diff --git a/usr/src/uts/sparc/v7/sys/machpcb.h b/usr/src/uts/sparc/v7/sys/machpcb.h
index a964018519..f0b76ee7a6 100644
--- a/usr/src/uts/sparc/v7/sys/machpcb.h
+++ b/usr/src/uts/sparc/v7/sys/machpcb.h
@@ -26,8 +26,6 @@
#ifndef _SYS_MACHPCB_H
#define _SYS_MACHPCB_H
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#include <sys/stack.h>
#include <sys/regset.h>
#include <sys/privregs.h>
@@ -71,8 +69,8 @@ typedef struct machpcb {
int mpcb_uwm; /* user window mask */
int mpcb_swm; /* shared user/kernel window mask */
int mpcb_wbcnt; /* number of saved windows in pcb_wbuf */
- struct fpu mpcb_fpu; /* fpu state */
- struct fq mpcb_fpu_q[MAXFPQ]; /* fpu exception queue */
+ struct _fpu mpcb_fpu; /* fpu state */
+ struct _fq mpcb_fpu_q[_MAXFPQ]; /* fpu exception queue */
int mpcb_flags; /* various state flags */
int mpcb_wocnt; /* window overflow count */
int mpcb_wucnt; /* window underflow count */
diff --git a/usr/src/uts/sparc/v9/fpu/fpu.c b/usr/src/uts/sparc/v9/fpu/fpu.c
index a341eb120d..a84612e030 100644
--- a/usr/src/uts/sparc/v9/fpu/fpu.c
+++ b/usr/src/uts/sparc/v9/fpu/fpu.c
@@ -24,8 +24,6 @@
* Use is subject to license terms.
*/
-#pragma ident "%Z%%M% %I% %E% SMI"
-
#include <sys/types.h>
#include <sys/param.h>
#include <sys/signal.h>
@@ -291,7 +289,7 @@ fp_disabled(struct regs *rp)
}
if (ftt = fp_emulator(&fpsd, (fp_inst_type *)rp->r_pc,
rp, (ulong_t *)rp->r_sp, fp)) {
- fp->fpu_q_entrysize = sizeof (struct fpq);
+ fp->fpu_q_entrysize = sizeof (struct _fpq);
fp_traps(&fpsd, ftt, rp);
}
}
@@ -320,7 +318,7 @@ void
fp_runq(struct regs *rp)
{
kfpu_t *fp = lwptofpu(curthread->t_lwp);
- struct fq *fqp = fp->fpu_q;
+ struct _fq *fqp = fp->fpu_q;
fp_simd_type fpsd;
uint64_t gsr = get_gsr(fp);
@@ -345,7 +343,7 @@ fp_runq(struct regs *rp)
*/
if (fqp != fp->fpu_q) {
int i;
- struct fq *fqdp;
+ struct _fq *fqdp;
/*
* We need to normalize the floating queue so
@@ -359,7 +357,7 @@ fp_runq(struct regs *rp)
}
fqp = fp->fpu_q;
}
- fp->fpu_q_entrysize = sizeof (struct fpq);
+ fp->fpu_q_entrysize = sizeof (struct _fpq);
/*
* fpu_simulator uses the fp registers directly but it
@@ -467,14 +465,14 @@ fp_precise(struct regs *rp)
* problem for a restorecontext of a v8 fp queue on a
* v9 system, which seems like the .000000001% case (on v9)!
*/
- struct fpq *pfpq = &fp->fpu_q->FQu.fpq;
+ struct _fpq *pfpq = &fp->fpu_q->FQu.fpq;
fp_simd_type fpsd;
int fptrap;
pfpq->fpq_addr = (uint_t *)rp->r_pc;
pfpq->fpq_instr = kluge.i;
fp->fpu_qcnt = 1;
- fp->fpu_q_entrysize = sizeof (struct fpq);
+ fp->fpu_q_entrysize = sizeof (struct _fpq);
kpreempt_disable();
(void) flush_user_windows_to_stack(NULL);
diff --git a/usr/src/uts/sparc/v9/os/v9dep.c b/usr/src/uts/sparc/v9/os/v9dep.c
index 751837788e..f54dab4f5d 100644
--- a/usr/src/uts/sparc/v9/os/v9dep.c
+++ b/usr/src/uts/sparc/v9/os/v9dep.c
@@ -73,7 +73,7 @@ static uint_t mkpsr(uint64_t tstate, uint32_t fprs);
#ifdef _SYSCALL32_IMPL
static void fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
- const struct fq32 *sfq, struct fq *dfq);
+ const struct fq32 *sfq, struct _fq *dfq);
#endif /* _SYSCALL32_IMPL */
/*
@@ -122,7 +122,7 @@ setfpregs(klwp_t *lwp, fpregset_t *fp)
*/
if (fp->fpu_qcnt > MAXFPQ) /* plug security holes */
fp->fpu_qcnt = MAXFPQ;
- fp->fpu_q_entrysize = sizeof (struct fq);
+ fp->fpu_q_entrysize = sizeof (struct _fq);
/*
* For v9 kernel, copy all of the fp regs.
@@ -1098,7 +1098,7 @@ sendsig(int sig, k_siginfo_t *sip, void (*hdlr)())
sulword_noerr(&fp->uc.uc_mcontext.gwins, (ulong_t)NULL);
if (fpq_size != 0) {
- struct fq *fqp = (struct fq *)sp;
+ struct _fq *fqp = (struct _fq *)sp;
sulword_noerr(&fp->uc.uc_mcontext.fpregs.fpu_q, (ulong_t)fqp);
copyout_noerr(mpcb->mpcb_fpu_q, fqp, fpq_size);
@@ -1730,7 +1730,7 @@ fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq)
dest->fpu_en = src->fpu_en;
if ((src->fpu_qcnt) && (dfq != NULL)) {
- struct fq *sfq = src->fpu_q;
+ struct _fq *sfq = src->fpu_q;
for (i = 0; i < src->fpu_qcnt; i++, dfq++, sfq++) {
dfq->FQu.fpq.fpq_addr =
(caddr32_t)(uintptr_t)sfq->FQu.fpq.fpq_addr;
@@ -1748,7 +1748,7 @@ fpuregset_nto32(const fpregset_t *src, fpregset32_t *dest, struct fq32 *dfq)
*/
static void
fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
- const struct fq32 *sfq, struct fq *dfq)
+ const struct fq32 *sfq, struct _fq *dfq)
{
int i;
@@ -1758,7 +1758,7 @@ fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
dest->fpu_q = dfq;
dest->fpu_fsr = (uint64_t)src->fpu_fsr;
if ((dest->fpu_qcnt = src->fpu_qcnt) > 0)
- dest->fpu_q_entrysize = sizeof (struct fpq);
+ dest->fpu_q_entrysize = sizeof (struct _fpq);
else
dest->fpu_q_entrysize = 0;
dest->fpu_en = src->fpu_en;
@@ -1774,7 +1774,7 @@ fpuregset_32ton(const fpregset32_t *src, fpregset_t *dest,
void
ucontext_32ton(const ucontext32_t *src, ucontext_t *dest,
- const struct fq32 *sfq, struct fq *dfq)
+ const struct fq32 *sfq, struct _fq *dfq)
{
int i;
diff --git a/usr/src/uts/sparc/v9/sys/machpcb.h b/usr/src/uts/sparc/v9/sys/machpcb.h
index 298dae5100..e4b1972d8a 100644
--- a/usr/src/uts/sparc/v9/sys/machpcb.h
+++ b/usr/src/uts/sparc/v9/sys/machpcb.h
@@ -72,7 +72,7 @@ typedef struct machpcb {
int mpcb_wbcnt; /* number of saved windows in pcb_wbuf */
uint_t mpcb_wstate; /* per-lwp %wstate */
kfpu_t *mpcb_fpu; /* fpu state */
- struct fq mpcb_fpu_q[MAXFPQ]; /* fpu exception queue */
+ struct _fq mpcb_fpu_q[_MAXFPQ]; /* fpu exception queue */
caddr_t mpcb_illexcaddr; /* address of last illegal instruction */
uint_t mpcb_illexcinsn; /* last illegal instruction */
uint_t mpcb_illexccnt; /* count of illegal instruction attempts */
diff --git a/usr/src/uts/sun4/os/trap.c b/usr/src/uts/sun4/os/trap.c
index 654b83c953..094620625a 100644
--- a/usr/src/uts/sun4/os/trap.c
+++ b/usr/src/uts/sun4/os/trap.c
@@ -1366,7 +1366,7 @@ fpu_trap(struct regs *rp, caddr_t addr, uint32_t type, uint32_t code)
int mstate;
char *badaddr;
kfpu_t *fp;
- struct fpq *pfpq;
+ struct _fpq *pfpq;
uint32_t inst;
utrap_handler_t *utrapp;
@@ -1431,7 +1431,7 @@ fpu_trap(struct regs *rp, caddr_t addr, uint32_t type, uint32_t code)
pfpq->fpq_addr = (uint32_t *)rp->r_pc;
pfpq->fpq_instr = inst;
fp->fpu_qcnt = 1;
- fp->fpu_q_entrysize = sizeof (struct fpq);
+ fp->fpu_q_entrysize = sizeof (struct _fpq);
#ifdef SF_V9_TABLE_28
/*
* Spitfire and blackbird followed the SPARC V9 manual