diff options
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/ipal-current/Makefile | 4 | ||||
| -rw-r--r-- | cad/verilog-current/Makefile | 6 | ||||
| -rw-r--r-- | cad/verilog/Makefile | 6 |
3 files changed, 8 insertions, 8 deletions
diff --git a/cad/ipal-current/Makefile b/cad/ipal-current/Makefile index ec2d86a01f0..4689e4f1d2b 100644 --- a/cad/ipal-current/Makefile +++ b/cad/ipal-current/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.7 2001/02/16 13:46:24 wiz Exp $ +# $NetBSD: Makefile,v 1.8 2001/03/27 03:19:47 hubertf Exp $ # DISTNAME= ipal-20001210 @@ -10,7 +10,7 @@ MAINTAINER= dmcmahill@netbsd.org HOMEPAGE= http://www.icarus.com/eda/ipal/index.html COMMENT= Libs and utils for manipulating PAL designs (development version) -BUILD_DEPENDS+= bison:../../devel/bison +BUILD_DEPENDS+= bison-*:../../devel/bison DEPENDS+= gtk+>=1.2.7:../../x11/gtk GNU_CONFIGURE= YES diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile index 4466ae56e70..9e1d7a290c7 100644 --- a/cad/verilog-current/Makefile +++ b/cad/verilog-current/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.12 2001/02/16 13:46:30 wiz Exp $ +# $NetBSD: Makefile,v 1.13 2001/03/27 03:19:47 hubertf Exp $ # DISTNAME= verilog-20010113 @@ -10,8 +10,8 @@ MAINTAINER= dmcmahill@netbsd.org HOMEPAGE= http://icarus.com/eda/verilog/index.html COMMENT= Verilog simulation and synthesis tool (development snapshot version) -BUILD_DEPENDS+= bison:../../devel/bison -BUILD_DEPENDS+= gperf:../../devel/gperf +BUILD_DEPENDS+= bison-*:../../devel/bison +BUILD_DEPENDS+= gperf-2.7.2:../../devel/gperf DEPENDS+= ipal-current>=20001210:../../cad/ipal-current CONFLICTS+= verilog diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile index 80c4a0aac8e..d3a0ea56896 100644 --- a/cad/verilog/Makefile +++ b/cad/verilog/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.6 2001/02/16 13:46:29 wiz Exp $ +# $NetBSD: Makefile,v 1.7 2001/03/27 03:19:47 hubertf Exp $ # DISTNAME= verilog-0.4 @@ -9,8 +9,8 @@ MAINTAINER= dmcmahill@netbsd.org HOMEPAGE= http://icarus.com/eda/verilog/index.html COMMENT= Verilog simulation and synthesis tool (stable release version) -BUILD_DEPENDS+= bison:../../devel/bison -BUILD_DEPENDS+= gperf:../../devel/gperf +BUILD_DEPENDS+= bison-*:../../devel/bison +BUILD_DEPENDS+= gperf-2.7.2:../../devel/gperf DEPENDS+= ipal-current>=20001210:../../cad/ipal-current CONFLICTS+= verilog-current |