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authoresaxe <none@none>2005-07-22 15:00:13 -0700
committeresaxe <none@none>2005-07-22 15:00:13 -0700
commit70f54ead78cbbb40e97bd3ff9f175c5c71783c3c (patch)
tree10dd52567c158eec0781313236b8fa6f775a8559 /usr/src/uts/sun4v/cpu/generic.c
parentf806f48b34ca6e130b04ec995ecd4e4a8ef123f0 (diff)
downloadillumos-gate-70f54ead78cbbb40e97bd3ff9f175c5c71783c3c.tar.gz
6279871 need interim core level load balancing solution for Niagara
Diffstat (limited to 'usr/src/uts/sun4v/cpu/generic.c')
-rw-r--r--usr/src/uts/sun4v/cpu/generic.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/usr/src/uts/sun4v/cpu/generic.c b/usr/src/uts/sun4v/cpu/generic.c
index b56a51e0ce..8c29c18b42 100644
--- a/usr/src/uts/sun4v/cpu/generic.c
+++ b/usr/src/uts/sun4v/cpu/generic.c
@@ -215,6 +215,12 @@ dtrace_flush_sec(uintptr_t addr)
void
cpu_init_private(struct cpu *cp)
{
+ /*
+ * The cpu_ipipe field is initialized based on the execution
+ * unit sharing information from the Machine Description table.
+ * It defaults to the CPU id in the absence of such information.
+ */
+ cp->cpu_m.cpu_ipipe = (id_t)(cp->cpu_id);
}
void